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JP2900764B2 - Evaluation method of semiconductor surface thin film - Google Patents
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JP2900764B2 - Evaluation method of semiconductor surface thin film - Google Patents

Evaluation method of semiconductor surface thin film

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Publication number
JP2900764B2
JP2900764B2 JP21411093A JP21411093A JP2900764B2 JP 2900764 B2 JP2900764 B2 JP 2900764B2 JP 21411093 A JP21411093 A JP 21411093A JP 21411093 A JP21411093 A JP 21411093A JP 2900764 B2 JP2900764 B2 JP 2900764B2
Authority
JP
Japan
Prior art keywords
thin film
semiconductor surface
current
surface thin
evaluating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP21411093A
Other languages
Japanese (ja)
Other versions
JPH0766250A (en
Inventor
良樹 山西
隆彦 大麻
清三 森田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Steel Corp
Original Assignee
Sumitomo Metal Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Metal Industries Ltd filed Critical Sumitomo Metal Industries Ltd
Priority to JP21411093A priority Critical patent/JP2900764B2/en
Publication of JPH0766250A publication Critical patent/JPH0766250A/en
Application granted granted Critical
Publication of JP2900764B2 publication Critical patent/JP2900764B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
  • Length Measuring Devices With Unspecified Measuring Means (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は半導体表面薄膜の評価方
法に関し、より詳細には、シリコン酸化膜あるいはシリ
コン窒化膜など半導体表面に形成される絶縁膜の電気的
特性の評価を行なう半導体表面薄膜の評価方法に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for evaluating a semiconductor surface thin film, and more particularly, to a semiconductor surface thin film for evaluating an electrical characteristic of an insulating film formed on a semiconductor surface such as a silicon oxide film or a silicon nitride film. The evaluation method.

【0002】[0002]

【従来の技術】従来、シリコン酸化膜およびシリコン窒
化膜等、半導体表面に形成される絶縁膜の電気的特性に
関する評価は、定電流または定電圧のTDDB試験によ
り行なわれていた。TDDB(Time Dependent Dielect
ric Breakdown )試験とは、材料に破壊耐量以下の電圧
を長時間印加し続けると経過時間に依存して絶縁破壊す
るという現象を利用して前記絶縁膜の信頼性の評価を行
なう試験方法である。例えば定電流TDDB試験方法
は、前記絶縁膜に定電流を流し、該定電流を流すのに必
要な電圧の経時変化を測定して前記絶縁膜の信頼性評価
を行なう試験方法である。その場合、前記絶縁膜が絶縁
破壊を起こすと前記電圧が急激に低下する。したがっ
て、定電流を流し始めてから前記電圧が急激に低下する
時点までの時間が、前記定電流のもとで前記絶縁膜が絶
縁破壊するのに要した時間になる。このような定電流T
DDB試験方法を用いて例えばMOS構造の絶縁膜にお
ける欠陥の有無を観察する場合、数μm四方〜数mm四
方の特定領域を観察・評価することができる。
2. Description of the Related Art Heretofore, evaluation of electrical characteristics of an insulating film formed on a semiconductor surface such as a silicon oxide film and a silicon nitride film has been performed by a TDDB test at a constant current or a constant voltage. TDDB (Time Dependent Dielect
The ric Breakdown) test is a test method for evaluating the reliability of the insulating film by utilizing a phenomenon that when a voltage lower than the breakdown voltage is continuously applied to a material for a long time, a dielectric breakdown occurs depending on an elapsed time. . For example, a constant current TDDB test method is a test method in which a constant current is applied to the insulating film, and a time-dependent change in a voltage required to flow the constant current is measured to evaluate the reliability of the insulating film. In this case, when the insulating film causes dielectric breakdown, the voltage sharply decreases. Therefore, the time from the start of the supply of the constant current to the time when the voltage sharply decreases is the time required for the insulating film to break down under the constant current. Such a constant current T
For example, when observing the presence or absence of a defect in an insulating film having a MOS structure using the DDB test method, a specific region of several μm square to several mm square can be observed and evaluated.

【0003】[0003]

【発明が解決しようとする課題】前記特定領域の大きさ
は定電流を流すために前記絶縁膜上に形成される電極面
積の大きさによって決定される。現在の微細加工技術を
用いれば上記数値よりも小さい0.1μmオ−ダ−の直
径の電極を作成することも可能である。さらに走査トン
ネル顕微鏡(STM:Scanning Tunneling Microscope
)を絶縁膜評価に用いれば、STMは数nm2 の極微
小領域に電流を流して該極微小領域における電流−電圧
特性を測定することができるので、nmオ−ダ−の微小
領域における絶縁破壊特性を測定することが可能である
(例えば、Y.FUKANO et al, Jpn. J.Appl.Phys. 32(199
3)290 )。
The size of the specific region is determined by the size of the electrode area formed on the insulating film to allow a constant current to flow. If the current fine processing technology is used, it is possible to produce an electrode having a diameter of the order of 0.1 μm smaller than the above numerical value. Scanning Tunneling Microscope (STM)
) Is used for the evaluation of the insulating film, the STM can apply a current to a very small area of several nm 2 and measure the current-voltage characteristic in the very small area. It is possible to measure the fracture properties (eg, Y. FUKANO et al, Jpn. J. Appl. Phys. 32 (199
3) 290).

【0004】ところが、通常の定電流TDDB試験方法
では10μA/cm2 〜1A/cm2 の定電流を流す
が、該電流を前記0.1μmオ−ダ−の直径の電極また
は前記STMに直接流すには、該電極または前記STM
のプロ−ブに極微小な電流を流さなければならず、通常
の定電流TDDB試験方法で絶縁破壊特性を観察・評価
することができるのは、どうしても上記した数μm四方
〜数mm四方が限度である。例えば、前記STMプロ−
ブの接触面積を1nm2 とすると、10-19 A〜10
-14 Aの極微小電流をSTMに流すことになるが、これ
は毎秒、約0.6個〜6万個の電子を注入することに相
当する。このような極微小電流を現在の電子回路技術で
制御することは不可能である。
However, in the normal constant current TDDB test method, a constant current of 10 μA / cm 2 to 1 A / cm 2 flows, but the current flows directly to the electrode having a diameter of the order of 0.1 μm or to the STM. The electrode or the STM
A very small current must be passed through the probe, and the dielectric breakdown characteristics can be observed and evaluated by the ordinary constant current TDDB test method only in the range of several μm square to several mm square described above. It is. For example, the STM pro-
Assuming that the contact area of the probe is 1 nm 2 , 10 −19 A to 10
A very small current of -14 A flows through the STM, which is equivalent to injecting about 0.6 to 60,000 electrons per second. It is impossible to control such an extremely small current with current electronic circuit technology.

【0005】本発明はこのような課題に鑑みなされたも
のであり、従来の定電流TDDB試験方法ではなしえな
い微小領域における絶縁破壊特性を測定・観察すること
ができる半導体表面薄膜の評価方法を提供することを目
的としている。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a method of evaluating a semiconductor surface thin film capable of measuring and observing a dielectric breakdown characteristic in a minute area which cannot be achieved by a conventional constant current TDDB test method. It is intended to provide.

【0006】[0006]

【課題を達成するための手段】上記目的を達成するため
に本発明に係る半導体表面薄膜の評価方法は、導電性プ
ローブと半導体表面の薄膜とを接触させた後、接触帯電
量の経時変化を原子間力顕微鏡で測定することを特徴と
している。
In order to achieve the above object, a method for evaluating a thin film on a semiconductor surface according to the present invention comprises: contacting a conductive probe with a thin film on a semiconductor surface; It is characterized by measurement with an atomic force microscope.

【0007】[0007]

【作用】本発明に係る半導体表面薄膜の評価方法は、導
電性のプロ−ブを接触させて絶縁膜を帯電させ、帯電さ
せた電荷ΔQの(散逸による)減少を原子間力顕微鏡
(AFM:Atomic Force Microscope)で静電気力ΔF
の減少として測定し、その経時変化を観察する方法であ
る。その場合、絶縁破壊が生じると静電気力ΔFが急激
に減少することとなる。
According to the method for evaluating a semiconductor surface thin film according to the present invention, an insulating film is charged by contacting a conductive probe, and a decrease in the charged charge ΔQ (due to dissipation) is measured by an atomic force microscope (AFM: Atomic Force Microscope) with electrostatic force ΔF
This is a method in which the change is measured and the change with time is observed. In this case, when the dielectric breakdown occurs, the electrostatic force ΔF sharply decreases.

【0008】以下、本発明に係る半導体表面薄膜の評価
方法の原理を説明する。まず、以下のことを仮定する。 ・帯電した電荷ΔQを点電荷とする。 ・帯電した電荷ΔQによりAFMのてこ側や半導体基板
側に誘起される電荷の影響は、AFMのてこと半導体基
板間に印加されるバイアス電圧Vb に比べて無視でき
る。 ・点電荷ΔQはバイアス電圧Vb が作る電界Eb により
静電気力ΔF(=ΔQ×Eb )を受け、該静電気力ΔF
に対する反作用をAFMのてこ側に及ぼす。 ・バイアス電圧Vb が作る電界Eb の大きさは、静電気
力ΔFが最大となる点電荷ΔQの真上では点電荷ΔQと
AFMのてこの先端との距離Zにのみ依存する。したが
って、距離Zが一定なら電界Eb も一定である。
The principle of the method for evaluating a semiconductor thin film according to the present invention will be described below. First, assume the following. -The charged charge ΔQ is defined as a point charge. The influence of the electric charge induced on the lever side or the semiconductor substrate side of the AFM by the charged electric charge ΔQ is negligible compared to the bias voltage Vb applied between the AFM and the semiconductor substrate. The point charge ΔQ receives an electrostatic force ΔF (= ΔQ × Eb) due to an electric field Eb generated by the bias voltage Vb, and the electrostatic charge ΔF
On the lever side of the AFM. The magnitude of the electric field Eb created by the bias voltage Vb depends only on the point charge ΔQ and the distance Z between the tip of the AFM and the lever just above the point charge ΔQ at which the electrostatic force ΔF is maximized. Therefore, if the distance Z is constant, the electric field Eb is also constant.

【0009】これらの仮定から、 最大の静電気力ΔFmax ( t)=ΔQ(t)×Eb … (1) となる。ここで、tは時間である。点電荷ΔQの散逸
は、すべて半導体基板側との電荷の流入出(電流i
(t))によるとすると、 ΔQ(t)=ΔQ(0)−∫i(t)dt … (2) ΔFmax ( t)=Eb ×[ΔQ(0)−∫i(t)dt] … (3) となる。したがって(3)式より、帯電した電荷ΔQに
よる静電気力ΔFmax (t)の経時変化を測定すれば、
点電荷ΔQがバイアス電圧Vb の下で作る電流i(t)
の経時変化を測定することができることになる。
From these assumptions, the maximum electrostatic force ΔF max (t) = ΔQ (t) × Eb (1). Here, t is time. Dissipation of the point charge ΔQ is caused by charge inflow and outflow (current i
(T) when due to), ΔQ (t) = ΔQ (0) -∫i (t) dt ... (2) ΔF max (t) = Eb × [ΔQ (0) -∫i (t) dt] ... (3) Therefore, from the equation (3), if the change over time of the electrostatic force ΔF max (t) due to the charged electric charge ΔQ is measured,
The current i (t) generated by the point charge ΔQ under the bias voltage Vb
Can be measured over time.

【0010】ここで、絶縁破壊による経時変化が起こら
ず絶縁抵抗R(t)が一定であるとすると、その場合に
は、i(t)=ic ( 一定)として、 ΔFmax ( t)=Eb ×[ΔQ(0)−ic ×t] … (4) となる。逆に、ΔFmax ( t)の経時変化が一定の速度
で起こっていれば、流れる電流は一定であると考えるこ
とができる。したがって、ΔFmax ( t)の経時変化が
急激になると絶縁破壊したと考えることができる。
Here, assuming that the insulation resistance R (t) is constant without a change with time due to insulation breakdown, in this case, i (t) = ic (constant) and ΔF max (t) = Eb × [ΔQ (0) -i c × t] ... is (4). Conversely, if the change with time of ΔF max (t) occurs at a constant speed, the flowing current can be considered to be constant. Therefore, it can be considered that the dielectric breakdown has occurred when the change with time of ΔF max (t) is abrupt.

【0011】[0011]

【実施例】以下、本発明に係る半導体表面薄膜の評価方
法の実施例を図面に基づいて説明する。図1は実施例に
係る半導体表面薄膜の評価方法に用いるAFM装置10
を概略的に示したブロック図である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a method for evaluating a semiconductor surface thin film according to the present invention will be described below with reference to the drawings. FIG. 1 shows an AFM apparatus 10 used in a method for evaluating a semiconductor surface thin film according to an embodiment.
FIG. 2 is a block diagram schematically showing

【0012】図中、3はシリコン基板を示しており、シ
リコン基板3上には熱酸化法で成長させたシリコン酸化
膜2が形成されている。シリコン基板3はシリコン基板
3をX、Y、Z方向に移動させるPZTチュ−ブ式走査
系4上に載置されており、PZTチュ−ブ式走査系4の
走査に関する情報はAFM(トポグラフィ−)5に提供
されるようになっている。制御駆動系6は干渉計7に接
続され、干渉計7からの情報に基づいてPZTチュ−ブ
式走査系4を駆動するようになっており、干渉計7は光
ファイバ−8を介して導電性カンチレバ−1の変位量を
測定することができるようになっている。導電性カンチ
レバ−1の先端には導電性プロ−ブ1aが装備されてお
り、導電性カンチレバ−1の後端にはバイアス電源9が
接続されている。なお、AFM装置10において、測定
時における導電性プロ−ブ1aの先端とシリコン酸化膜
2との距離Zは制御駆動系6により一定値に保たれるよ
うになっている。
In FIG. 1, reference numeral 3 denotes a silicon substrate, on which a silicon oxide film 2 grown by a thermal oxidation method is formed. The silicon substrate 3 is mounted on a PZT tube type scanning system 4 for moving the silicon substrate 3 in the X, Y, and Z directions. ) 5). The control drive system 6 is connected to the interferometer 7 and drives the PZT tube type scanning system 4 based on information from the interferometer 7, and the interferometer 7 is electrically conductive via an optical fiber-8. The amount of displacement of the cantilever-1 can be measured. The tip of the conductive cantilever 1 is provided with a conductive probe 1a, and the rear end of the conductive cantilever 1 is connected to a bias power supply 9. In the AFM device 10, the distance Z between the tip of the conductive probe 1a and the silicon oxide film 2 at the time of measurement is kept constant by the control drive system 6.

【0013】実施例に係る半導体表面薄膜の評価方法に
よるシリコン酸化膜2の評価は、上記の如く構成された
AFM装置10を用いて以下のように行なう。まず、電
圧が印加された導電性プロ−ブ1aでシリコン酸化膜2
上の測定したい箇所に接触帯電させた後、導電性プロ−
ブ1aを離間する。次に、導電性プロ−ブ1aにバイア
ス電圧Vb を印加する。次いで導電性プロ−ブ1aとシ
リコン酸化膜2表面の電荷ΔQとの間の静電気力が測定
できる距離(数nm〜数10nm)にまで導電性プロ−
ブ1aの先端を近づける。そして、接触帯電させた領域
を走査し、静電気力ΔFの分布を繰り返し測定する。測
定した静電気力の最大値ΔFmax の経時変化から(3)
式により点電荷ΔQから流れた電流値を求める。
The evaluation of the silicon oxide film 2 by the method for evaluating a semiconductor surface thin film according to the embodiment is performed as follows using the AFM apparatus 10 configured as described above. First, a silicon oxide film 2 is applied by a conductive probe 1a to which a voltage is applied.
After contacting and charging the above point to be measured, the conductive probe
The blade 1a is separated. Next, a bias voltage Vb is applied to the conductive probe 1a. Next, the conductive probe is moved to a distance (several nm to several tens nm) where the electrostatic force can be measured between the conductive probe 1a and the electric charge ΔQ on the surface of the silicon oxide film 2.
The tip of the valve 1a is brought closer. Then, the contact-charged area is scanned, and the distribution of the electrostatic force ΔF is repeatedly measured. From the change with time of the maximum value ΔF max of the measured electrostatic force (3)
The value of the current flowing from the point charge ΔQ is obtained by the equation.

【0014】なお、接触帯電させる際、実際に接触する
のは導電性プロ−ブ1a先端の原子とシリコン酸化膜2
表面の原子であるため、接触面積は導電性プロ−ブ1a
先端の曲率半径よりも小さくなる。例えば、導電性プロ
−ブ1a先端の曲率半径が1μmであっても、接触面積
は数nm2 程度になる。また、静電気力ΔFを測定する
際の静電気力ΔFの空間分解能は、静電気力ΔFの空間
的広がりのため、静電気力ΔFの分布の半値幅で0.数
〜1μmになる。
When contact charging is performed, the actual contact between the atom at the tip of the conductive probe 1a and the silicon oxide film 2 is made.
Because of the atoms on the surface, the contact area is the conductive probe 1a.
It becomes smaller than the radius of curvature at the tip. For example, even if the radius of curvature of the tip of the conductive probe 1a is 1 μm, the contact area is about several nm 2 . In addition, the spatial resolution of the electrostatic force ΔF when measuring the electrostatic force ΔF is 0. 5 in the half width of the distribution of the electrostatic force ΔF due to the spatial spread of the electrostatic force ΔF. It becomes several μm.

【0015】図2は実施例に係る半導体表面薄膜の評価
方法を、P型シリコン基板3(面方位(100))上に
熱酸化法で成長させた厚さ5nmのシリコン酸化膜2に
適用した場合の測定結果を概略的に示したグラフであ
る。縦軸には静電気力(nN)、横軸には時間(秒)を
とっている。
FIG. 2 shows that the method for evaluating a semiconductor surface thin film according to the embodiment is applied to a 5 nm thick silicon oxide film 2 grown on a P-type silicon substrate 3 (plane orientation (100)) by a thermal oxidation method. It is the graph which showed the measurement result in the case schematically. The vertical axis represents electrostatic force (nN), and the horizontal axis represents time (second).

【0016】図2に示したグラフは、先端曲率半径が約
0.1μmの導電性プロ−ブ1aを用い、最初に導電性
プロ−ブ1aに−4Vの電圧を印加して接触帯電させた
後、導電性プロ−ブ1aに+4Vのバイアス電圧を印加
してシリコン酸化膜2表面から約35nm離して走査
し、導電性プロ−ブ1aにかかる静電気力の最大値ΔF
max の経時変化を測定した結果を示したものである。図
2のグラフから分かるように、時間に対して静電気力が
ほぼ直線的に減少している。このことは、「作用」のと
ころで示した(4)式が成り立っていることを示してい
る。(4)式を用いて計算すると、接触帯電による電荷
ΔQを電流源として流れる電流値は約4×10-16 Aと
見積もることができる。これは、従来技術では直接制御
することが不可能な極微小電流を実施例に係る方法では
ほぼ一定値で流すことができることを示している。
In the graph shown in FIG. 2, a conductive probe 1a having a tip radius of curvature of about 0.1 μm was used, and a voltage of -4 V was first applied to the conductive probe 1a for contact charging. Thereafter, a bias voltage of +4 V is applied to the conductive probe 1a and scanning is performed at a distance of about 35 nm from the surface of the silicon oxide film 2, and the maximum value ΔF of the electrostatic force applied to the conductive probe 1a.
It shows the result of measuring the change over time of max . As can be seen from the graph of FIG. 2, the electrostatic force decreases almost linearly with time. This indicates that the expression (4) shown in the “action” holds. Calculating using equation (4), the value of the current flowing using the charge ΔQ due to contact charging as a current source can be estimated to be about 4 × 10 −16 A. This indicates that an extremely small current, which cannot be directly controlled by the prior art, can be flowed at a substantially constant value by the method according to the embodiment.

【0017】図3は実施例に係る半導体表面薄膜の評価
方法を用いて別の半導体表面薄膜の評価を行なった結果
を示したグラフであり、具体的には上記実施例における
測定と同様の測定を同一試料の別の箇所に対して行なっ
た場合の測定結果を示したグラフである。今回の測定方
法と前回の測定方法とで異なっている点は、今回の場
合、シリコン酸化膜2表面と導電性プロ−ブ1a先端と
の距離が約90nmと前回の場合(約35nm)に比べ
て離れている点のみである。
FIG. 3 is a graph showing the result of evaluation of another semiconductor surface thin film using the method for evaluating a semiconductor surface thin film according to the embodiment, and specifically, the same measurement as the measurement in the above embodiment. Is a graph showing the measurement results when the measurement is performed on another portion of the same sample. The difference between the present measurement method and the previous measurement method is that in this case, the distance between the surface of the silicon oxide film 2 and the tip of the conductive probe 1a is about 90 nm, which is smaller than the previous case (about 35 nm). Only those points that are far apart.

【0018】図3から分かるように今回の測定において
は、静電気力ΔFmax が測定時間85秒付近から急激に
減少し、急激な電流の増加が起こっている。これは、導
電性プロ−ブ1aで接触帯電させた箇所にシリコン酸化
膜2の欠陥があり、該箇所において絶縁破壊が生じるこ
とにより電流値が急激に増加したことを意味している。
このように、接触帯電による電荷ΔQを供給源として微
小な電流を流し、この電流値の変化をAFM装置10に
より静電気力ΔFmax の変化として測定することで、シ
リコン酸化膜2における微小領域の評価を行なうことが
できる。
As can be seen from FIG. 3, in the present measurement, the electrostatic force ΔF max rapidly decreases from around the measurement time of 85 seconds, and a sharp increase in current occurs. This means that there was a defect in the silicon oxide film 2 at the place where the conductive probe 1a contact-charged the silicon oxide film 2 and dielectric breakdown occurred at the place, and the current value increased sharply.
As described above, a minute current is caused to flow by using the charge ΔQ due to contact charging as a supply source, and a change in the current value is measured by the AFM device 10 as a change in the electrostatic force ΔF max to evaluate a small area in the silicon oxide film 2. Can be performed.

【0019】以上説明したように実施例に係る半導体表
面薄膜の評価方法は、接触帯電による点電荷ΔQからの
電荷の散逸を電流源としているので、従来の技術では制
御することが不可能であった極微小な電流による定電流
TDDB評価を行なうことができる。また、導電性プロ
−ブ1aによる接触帯電であるため、極微小領域の帯電
が可能であり、極微小領域での定電流TDDB評価を行
なうことができる。例えば、上記実施例における接触帯
電により与えた電荷ΔQの空間分布は、静電気力ΔFの
分布の測定値の半値幅で約400nmである。これは従
来のMOSキャパシタ等による評価方法では成しえない
微小領域の測定である。なお、実施例において、流す電
流値は、最初に接触帯電を与える際の接触時間および接
触帯電させるときの電圧で制御することができる。
As described above, in the method for evaluating a semiconductor surface thin film according to the embodiment, since the current source is the dissipation of the charge from the point charge ΔQ due to the contact charging, it cannot be controlled by the conventional technology. The constant current TDDB can be evaluated with a very small current. Further, since contact charging is performed by the conductive probe 1a, charging in an extremely small area is possible, and constant current TDDB evaluation in the extremely small area can be performed. For example, the spatial distribution of the charge ΔQ given by the contact charging in the above embodiment is about 400 nm as the half width of the measured value of the distribution of the electrostatic force ΔF. This is a measurement of a minute area which cannot be achieved by a conventional evaluation method using a MOS capacitor or the like. In the embodiment, the value of the flowing current can be controlled by the contact time and the voltage at the time of first applying the contact charging.

【0020】また、実施例に係る半導体表面薄膜の評価
方法を用いれば、シリコン酸化膜2等の絶縁膜の厚さに
は関係なく半導体表面薄膜における微小領域の評価・測
定を行なうことができる。
Further, if the method for evaluating a semiconductor surface thin film according to the embodiment is used, it is possible to evaluate and measure a minute region in the semiconductor surface thin film regardless of the thickness of the insulating film such as the silicon oxide film 2.

【0021】[0021]

【発明の効果】以上詳述したように本発明に係る半導体
表面薄膜の評価方法を用いれば、従来技術では制御不可
能であった極微小電流を、従来技術では測定不可能であ
った極微小面積に流すことができ、今までにない空間分
解能でシリコン酸化膜等の半導体表面薄膜の定電流TD
DB評価を行なうことができる。
As described in detail above, when the method for evaluating a semiconductor surface thin film according to the present invention is used, an extremely small current which cannot be controlled by the conventional technique can be replaced by an extremely small current which cannot be measured by the conventional technique. Constant current TD of semiconductor surface thin film such as silicon oxide film with unprecedented spatial resolution
DB evaluation can be performed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施例に係る半導体表面薄膜の評価方
法を実施する際に使用するAFM装置を概略的に示した
ブロック図である。
FIG. 1 is a block diagram schematically showing an AFM apparatus used when performing a method for evaluating a semiconductor surface thin film according to an embodiment of the present invention.

【図2】実施例に係る半導体表面薄膜の評価方法を用い
てシリコン酸化膜の評価を行なった結果を示したグラフ
である。
FIG. 2 is a graph showing a result of evaluating a silicon oxide film by using a method for evaluating a semiconductor surface thin film according to an example.

【図3】実施例に係る半導体表面薄膜の評価方法を用い
て別のシリコン酸化膜の評価を行なった結果を示したグ
ラフである。
FIG. 3 is a graph showing the results of evaluation of another silicon oxide film using the semiconductor surface thin film evaluation method according to the example.

【符号の説明】 1 導電性カンチレバ− 1a 導電性プロ−ブ 2 シリコン酸化膜 3 シリコン基板 5 AFM(トポグラフィ−) 9 バイアス電源 10 AFM装置[Description of Signs] 1 conductive cantilever 1a conductive probe 2 silicon oxide film 3 silicon substrate 5 AFM (topography) 9 bias power supply 10 AFM device

フロントページの続き (56)参考文献 特開 平3−277903(JP,A) 特開 平4−270903(JP,A) 特開 平4−12547(JP,A) 特開 平4−330752(JP,A) 特開 平4−137644(JP,A) 特開 平6−26855(JP,A) 特開 平6−273155(JP,A) 特開 平6−201373(JP,A) 特開 平2−212702(JP,A) 特開 平6−273159(JP,A) (58)調査した分野(Int.Cl.6,DB名) H01L 21/66 G01B 7/34 102 G01B 21/30 Continuation of the front page (56) References JP-A-3-277903 (JP, A) JP-A-4-270903 (JP, A) JP-A-4-12547 (JP, A) JP-A-4-330752 (JP JP-A-4-137644 (JP, A) JP-A-6-26855 (JP, A) JP-A-6-273155 (JP, A) JP-A-6-201373 (JP, A) 2-212702 (JP, A) JP-A-6-273159 (JP, A) (58) Fields investigated (Int. Cl. 6 , DB name) H01L 21/66 G01B 7/34 102 G01B 21/30

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 導電性プロ−ブと半導体表面の薄膜とを
接触させた後、接触帯電量の経時変化を原子間力顕微鏡
で測定することを特徴とする半導体表面薄膜の評価方
法。
1. A method for evaluating a thin film on a semiconductor surface, comprising: contacting a conductive probe with a thin film on a semiconductor surface, and then measuring a change over time in a contact charge amount with an atomic force microscope.
JP21411093A 1993-08-30 1993-08-30 Evaluation method of semiconductor surface thin film Expired - Fee Related JP2900764B2 (en)

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Application Number Priority Date Filing Date Title
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KR20010110885A (en) * 2000-06-09 2001-12-15 박병국 Method for measuring thickness of thin film
JP4598300B2 (en) * 2001-04-26 2010-12-15 エスアイアイ・ナノテクノロジー株式会社 Scanning probe microscope and physical property measurement method using the same
US7023231B2 (en) * 2004-05-14 2006-04-04 Solid State Measurements, Inc. Work function controlled probe for measuring properties of a semiconductor wafer and method of use thereof
JP4696022B2 (en) * 2006-05-09 2011-06-08 キヤノン株式会社 Probe microscope and measuring method using probe microscope
JP2010016078A (en) 2008-07-02 2010-01-21 Shin Etsu Handotai Co Ltd Silicon monocrystal wafer, method for manufacturing the silicon monocrystal wafer and method for evaluating the silicon monocrystal wafer
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