JP2901280B2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JP2901280B2 JP2901280B2 JP1254168A JP25416889A JP2901280B2 JP 2901280 B2 JP2901280 B2 JP 2901280B2 JP 1254168 A JP1254168 A JP 1254168A JP 25416889 A JP25416889 A JP 25416889A JP 2901280 B2 JP2901280 B2 JP 2901280B2
- Authority
- JP
- Japan
- Prior art keywords
- external terminal
- semiconductor device
- circuit element
- present
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title claims description 13
- 230000015556 catabolic process Effects 0.000 claims description 9
- 239000002184 metal Substances 0.000 description 9
- 238000010586 diagram Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置に関し、特に静電破壊に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to electrostatic discharge.
従来、この種の半導体装置は、数個の素子によって回
路的に接続されている外部端子の金属配線同士の交差は
行っていなかった。Conventionally, in this type of semiconductor device, metal wires of external terminals connected in a circuit by several elements have not crossed each other.
前述した従来の半導体装置は、数個の素子によって回
路的に接続されている外部端子の金属配線同士が交差し
ていなかった為、第４図のような回路において、外部端
子，の間で静電破壊試験を行うと、外部端子−抵
抗R1-npnトランジスタQ1-npnトランジスタQ2−抵抗R2−
外部端子の経路のみで電流が流れる為、抵抗R1,R2,ト
ランジスタQ1,Q2などが破壊してしまうという欠点があ
った。In the conventional semiconductor device described above, the metal wires of the external terminals connected in a circuit by several elements do not cross each other. Therefore, in the circuit as shown in FIG. When an electrical breakdown test is performed, the external terminal-resistance R1-npn transistor Q1-npn transistor Q2-resistance R2-
Since the current flows only through the path of the external terminal, there is a disadvantage that the resistors R1 and R2 and the transistors Q1 and Q2 are destroyed.
本発明の目的は、前記欠点が解決され、回路素子が静
電破壊試験の際、破壊されないようにした半導体装置を
提供することにある。SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor device which solves the above-mentioned drawbacks and prevents a circuit element from being destroyed in an electrostatic breakdown test.
［課題を解決するための手段］ 本発明による半導体装置は、第１及び第２の外部端子
と、第１及び第２の回路素子と、前記第１の外部端子か
ら前記第１の回路素子に至る第１の配線と、前記第２の
外部端子から前記第２の回路素子に至る第２の配線とを
有し、前記第１及び第２の外部端子の間に印加される静
電破壊電圧に対して、前記第１及び第２の配線並びに前
記第１及び第２の回路素子を介する電流経路が形成され
るものに対し、前記第１及び第２の配線を絶縁膜を介し
て交差させて両者の間に容量を構成し、前記静電破壊電
圧に対して前記容量を介する電流経路を形成するように
なしたことを特徴としている。[Means for Solving the Problems] A semiconductor device according to the present invention includes a first and a second external terminal, a first and a second circuit element, and the first external terminal to the first circuit element. A first wiring extending from the second external terminal to the second circuit element, and an electrostatic breakdown voltage applied between the first and second external terminals. On the other hand, the first and second wirings are crossed via an insulating film with respect to a current path formed through the first and second wirings and the first and second circuit elements. Thus, a capacitance is formed between the two, and a current path through the capacitance is formed for the electrostatic breakdown voltage.
［実施例］ 次に本発明について図面を参照して説明する。Example Next, the present invention will be described with reference to the drawings.
第１図は本発明の一実施例の半導体装置の平面図、第
２図は第１図のＡ−Ａ′線に沿って切断して見た断面
図、第３図は本発明の実施例の等価回路図である。これ
ら第１図，第２図，第３図において、本実施例は、外部
端子と抵抗R1とを結ぶ金属配線４と、外部端子と抵
抗R2とを結ぶ金属配線５とが、半導体基板上で絶縁膜３
を間に挾んで互いに交差している為、金属配線４と金属
配線５との間に、MOS容量C1が構成されている。1 is a plan view of a semiconductor device according to one embodiment of the present invention, FIG. 2 is a cross-sectional view taken along line AA 'of FIG. 1, and FIG. 3 is an embodiment of the present invention. 3 is an equivalent circuit diagram of FIG. In FIGS. 1, 2 and 3, in the present embodiment, a metal wiring 4 connecting an external terminal and a resistor R1 and a metal wiring 5 connecting an external terminal and a resistor R2 are formed on a semiconductor substrate. Insulating film 3
, And intersect each other, so that a MOS capacitor C 1 is formed between the metal wiring 4 and the metal wiring 5.
また、エミッタを共通接続した一対のnpnトランジス
タQ1,Q2を設け、これらトランジスタQ1,Q2のベースはそ
れぞれ抵抗R1,R2に接続されている。金属配線4,5の交叉
部分容量C1があるため、特に高い周波数成分は、ここを
通して流れるため、トランジスタQ1,Q2の破壊の心配が
ない。Further, a pair of npn transistors Q1 and Q2 having emitters connected in common is provided, and the bases of these transistors Q1 and Q2 are connected to resistors R1 and R2, respectively. Because of the crossover portion capacitance C 1 of the metal wires 4 and 5, particularly high frequency components to flow through here, there is no fear of breakdown of the transistor Q1, Q2.
以上説明したように、本発明は、数個の素子によって
回路的に接続されている外部端子の金属配線同士が絶縁
膜を間に挾んで交叉することにより、両配線間に容量が
発生しているため、外部端子同士の間で、静電破壊試験
を行うと、破壊試験の電圧波形がパルス状の為、前記容
量を介した電流経路が発生し、回路素子を保護する効果
がある。As described above, according to the present invention, since the metal wirings of the external terminals connected in a circuit by several elements cross each other with the insulating film interposed therebetween, a capacitance is generated between the two wirings. Therefore, when the electrostatic breakdown test is performed between the external terminals, the voltage waveform of the breakdown test is pulse-shaped, so that a current path is generated via the capacitor, which has an effect of protecting the circuit element.
第１図は本発明の一実施例の半導体装置の平面図、第２
図は第１図のＡ−Ａ′線に沿って切断して見た断面図、
第３図は本発明の一実施例の半導体装置の等価回路図、
第４図は従来の半導体装置の等価回路図である。 1,2……外部端子、３……絶縁膜、4,5……外部端子と内
部素子とを結ぶ金属配線、R1,R2……抵抗、Q1,Q2……np
nトランジスタ。FIG. 1 is a plan view of a semiconductor device according to one embodiment of the present invention, and FIG.
The figure is a sectional view taken along the line AA 'of FIG.
FIG. 3 is an equivalent circuit diagram of a semiconductor device according to one embodiment of the present invention,
FIG. 4 is an equivalent circuit diagram of a conventional semiconductor device. 1,2 ... external terminal, 3 ... insulating film, 4,5 ... metal wiring connecting external terminal and internal element, R1, R2 ... resistance, Q1, Q2 ... np
n transistor.
Claims (1)
の回路素子と、前記第１の外部端子から前記第１の回路
素子に至る第１の配線と、前記第２の外部端子から前記
第２の回路素子に至る第２の配線とを有し、前記第１及
び第２の外部端子の間に印加される静電破壊電圧に対し
て、前記第１及び第２の配線並びに前記第１及び第２の
回路素子を介する電流経路が形成される半導体装置にお
いて、前記第１及び第２の配線を絶縁膜を介して交差さ
せて両者の間に容量を構成し、前記静電破壊電圧に対し
て前記容量を介する電流経路を形成するようになしたこ
とを特徴とする半導体装置。A first external terminal; a first external terminal; a second external terminal;
Circuit element, a first wiring from the first external terminal to the first circuit element, and a second wiring from the second external terminal to the second circuit element, A semiconductor in which a current path through the first and second wirings and the first and second circuit elements is formed with respect to an electrostatic breakdown voltage applied between the first and second external terminals. In the device, the first and second wirings intersect via an insulating film to form a capacitance therebetween, and a current path through the capacitance for the electrostatic breakdown voltage is formed. A semiconductor device characterized by the above-mentioned.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1254168A JP2901280B2 (en) | 1989-09-28 | 1989-09-28 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1254168A JP2901280B2 (en) | 1989-09-28 | 1989-09-28 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03116758A JPH03116758A (en) | 1991-05-17 |
| JP2901280B2 true JP2901280B2 (en) | 1999-06-07 |
Family
ID=17261180
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1254168A Expired - Lifetime JP2901280B2 (en) | 1989-09-28 | 1989-09-28 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2901280B2 (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5824948B2 (en) * | 1977-08-08 | 1983-05-24 | 日本電信電話株式会社 | Manufacturing method of cross-wiring structure |
| JPS60109259A (en) * | 1983-11-18 | 1985-06-14 | Hitachi Ltd | Electronic device |
| JPH01228145A (en) * | 1988-03-08 | 1989-09-12 | Nec Corp | Semiconductor integrated circuit device |
-
1989
- 1989-09-28 JP JP1254168A patent/JP2901280B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH03116758A (en) | 1991-05-17 |
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