JP2901536B2 - Susceptor - Google Patents
SusceptorInfo
- Publication number
- JP2901536B2 JP2901536B2 JP4114996A JP4114996A JP2901536B2 JP 2901536 B2 JP2901536 B2 JP 2901536B2 JP 4114996 A JP4114996 A JP 4114996A JP 4114996 A JP4114996 A JP 4114996A JP 2901536 B2 JP2901536 B2 JP 2901536B2
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- susceptor
- recess
- case
- present
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 claims description 7
- 239000004065 semiconductor Substances 0.000 claims description 5
- 238000001459 lithography Methods 0.000 claims description 2
- 238000010438 heat treatment Methods 0.000 description 6
- 238000005488 sandblasting Methods 0.000 description 5
- 238000012986 modification Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 230000003746 surface roughness Effects 0.000 description 4
- 239000004576 sand Substances 0.000 description 3
- 238000005299 abrasion Methods 0.000 description 2
- 230000001788 irregular Effects 0.000 description 2
- 230000002035 prolonged effect Effects 0.000 description 2
- 238000001179 sorption measurement Methods 0.000 description 2
- 229910018487 Ni—Cr Inorganic materials 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007667 floating Methods 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
Landscapes
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Description
【0001】[0001]
【発明の属する技術分野】本発明は、半導体素子の製造
工程において、CVD工程などで半導体ウェーハ(以
下、単にウェーハと記す)を載置するサセプタに関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a susceptor for mounting a semiconductor wafer (hereinafter simply referred to as a "wafer") in a CVD process or the like in a semiconductor device manufacturing process.
【0002】[0002]
【従来の技術】図4に示すように、載置タイプのサセプ
タの一般的構造は、サセプタ本体にウェーハ3を載置す
る座ぐり面2を設けてある。座ぐり面の仕上げ状態につ
いてはいろいろなものが提案されているが、例えば特開
平2−174116号公報に記載されているように、中
心線平均粗さRa<1μm、最大表面粗さRmax<1
0μmに鏡面仕上げを施したものや、逆に、中心線平均
粗さRa≧1μm、最大表面粗さRmax≧10μmに
なるようにわざと表面を粗くしたサンドブラスト処理を
施したものがある。2. Description of the Related Art As shown in FIG. 4, a general structure of a mounting type susceptor has a counterbore surface 2 on which a wafer 3 is mounted on a susceptor body. Various types of finishing conditions of the spot facing surface have been proposed. For example, as described in JP-A-2-174116, the center line average roughness Ra <1 μm and the maximum surface roughness Rmax <1
There is a case where a mirror finish is applied to 0 μm, and a case where a surface is intentionally roughened so that the center line average roughness Ra ≧ 1 μm and the maximum surface roughness Rmax ≧ 10 μm.
【0003】ここで、鏡面仕上げの場合には、ウェーハ
に反りが存在しない時には、面接触に近いので熱を効率
良くウェーハ3に伝達できる。しかし、現実問題として
ウェーハには100μm以下の反りが存在することを考
慮すると、接触部分で高温となり、逆に反りの為にサセ
プタに接触しない部分は低温となるので、ウェーハに加
熱ムラが生じる。また、サンドブラスト処理の場合に
は、ウェーハに反りが存在しない時でさえ接触部分が少
なくなるような構造をもつため、前述の鏡面仕上げとは
異なりウェーハの加熱は熱伝達によるものになるので、
結果として反りのある場合にウェーハ内の加熱ムラが緩
和される。Here, in the case of mirror finishing, when there is no warpage in the wafer, heat can be efficiently transmitted to the wafer 3 because it is close to surface contact. However, in consideration of the fact that the wafer has a warpage of 100 μm or less as a real problem, the temperature of the contact portion becomes high, and the temperature of the portion not in contact with the susceptor becomes low due to the warpage. In addition, in the case of the sand blasting process, since the contact portion is reduced even when the wafer is not warped, unlike the above-mentioned mirror finish, the heating of the wafer is based on heat transfer,
As a result, when there is a warp, uneven heating in the wafer is reduced.
【0004】ここで、加熱ムラが少ないほど、CVD工
程の成膜時の膜厚均一性が向上するので、現在のプロセ
スのみでなく、次世代の多層配線プロセスにも十分対応
できるCVD膜を得ることができる。Here, the less the uneven heating, the more uniform the film thickness at the time of film formation in the CVD process, so that a CVD film that can sufficiently cope with not only the present process but also the next generation multilayer wiring process is obtained. be able to.
【0005】[0005]
【発明が解決しようとする課題】座ぐり面を鏡面仕上げ
した従来のサセプタを使用すると、ウェーハの反りによ
って温度ムラが生じ易いという問題点がある。又、物理
的吸着や静電吸着により、ウェーハが座ぐり面に密着
し、ウェーハの取り外しが困難になるという問題点もあ
る。When a conventional susceptor having a mirror-finished counterbore surface is used, there is a problem that temperature unevenness tends to occur due to wafer warpage. In addition, there is also a problem that the wafer adheres to the counterbore surface due to physical adsorption or electrostatic adsorption, and it becomes difficult to remove the wafer.
【0006】座ぐり面をサンドブラストなどにより粗面
にしたサセプタでは、表面の山や谷の寸法・形状が不規
則であり、使用時のウェーハとの接触や洗浄により摩耗
して表面粗さが細かくなりウェーハとの接触状態が変化
してしまうので寿命が短いという問題点がある。In a susceptor having a counterbore surface roughened by sand blasting or the like, the size and shape of the peaks and valleys on the surface are irregular, and the surface roughness is reduced due to wear due to contact with the wafer and cleaning during use. However, there is a problem that the life is short because the contact state with the wafer changes.
【0007】本発明の目的はウェーハの反りによる加熱
ムラが少なくウェーハの取り外しが容易で寿命の改善さ
れたサセプタを提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a susceptor which has less heating unevenness due to the warpage of a wafer, allows easy removal of the wafer, and has an improved life.
【0008】[0008]
【課題を解決するための手段】本発明のサセプタは、半
導体ウェーハを裁置する座ぐり面に同一寸法に設計され
た深さを有する凹部が規則的に配列され、かつ前記凹部
の断面形状は半円形状もしくは逆三角形状であるという
ものである。Means for Solving the Problems The susceptor of the present invention, the recess having a depth which is designed in the same dimensions counterbore surface for location Court the semiconductor wafer are regularly arranged, and the recess
Has a semicircular shape or an inverted triangular shape .
【0009】この場合、隣接する凹部どうしが連結され
ているようにしても良い。In this case, adjacent recesses are connected to each other.
You may make it .
【0010】更に、凹部は機械的なディンプル加工で形
成してもよいし、リソグラフィー技術により形成しても
よい。Further, the concave portion may be formed by mechanical dimple processing, or may be formed by lithography.
【0011】座ぐり面に規則的に少なくとも10μmの
高低差があるのでウェーハがサセプタより部分的に浮い
た状態になるので、ウェーハの取り外しが容易となり、
ウェーハの加熱ムラはサンドブラスト処理を施したサセ
プタを使用した時のように緩和される。Since the counterbore surface has a height difference of at least 10 μm regularly, the wafer is partially floated from the susceptor, so that the wafer can be easily removed.
The uneven heating of the wafer is reduced as in the case of using a susceptor subjected to sandblasting.
【0012】[0012]
【発明の実施の形態】次に本発明の一実施の形態につい
て図面を参照して説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of the present invention will be described with reference to the drawings.
【0013】図1(a)は、本発明の一実施の形態を示
す平面図、図1(b)は図1(a)のA−A線断面図、
図1(c)は座ぐり部の部分拡大平面図、図1(d)は
図1(c)のB−B線断面図である。Ni−Cr合金で
なるサセプタ本体1の一部に、ウェーハ3を載置する座
ぐり面2が設けてある。座ぐり面2には機械的なディン
プル加工により、平面形状円形の凹部4が一定ピッチで
規則的に設けられている。凹部4の深さは0.1〜0.
5mm程度の同一寸法に設計されている。凸部5の幅は
例えば数百μmとする。ここで深さを0.1〜0.5m
m程度としたのは、凸部が高くなりすぎると、使用中に
破壊され易くなるからである。又、凸部が低くなりすぎ
ると、摩耗により凹凸が失なわれ易く寿命があまり長く
できないからである。FIG. 1A is a plan view showing an embodiment of the present invention, FIG. 1B is a cross-sectional view taken along line AA of FIG.
FIG. 1C is a partially enlarged plan view of the spot facing portion, and FIG. 1D is a sectional view taken along line BB of FIG. 1C. A counterbore surface 2 on which a wafer 3 is placed is provided on a part of a susceptor body 1 made of a Ni-Cr alloy. The counterbore surface 2 is provided with concave portions 4 having a circular shape in a plane shape at regular intervals by mechanical dimple processing. The depth of the recess 4 is 0.1-0.
They are designed to have the same dimensions of about 5 mm. The width of the projection 5 is, for example, several hundred μm. Here the depth is 0.1-0.5m
The reason for setting m is that if the projections are too high, they will be easily broken during use. On the other hand, if the protrusions are too low, the unevenness is likely to be lost due to wear, and the life cannot be prolonged too much.
【0014】ウェーハに反りがない場合には、ディンプ
ルの凸部によって若干ウェーハが部分的に浮いた状態に
なる。サンドブラスト処理したものと同様に温度ムラは
小さくなるが、より一層規則的になる点で優れている。
又、ウェーハに微小の反りがある場合には、ディンプル
の凸部からもわずかに部分的に浮いた状態が考えられる
が、温度ムラは鏡面仕上げのものよりは少なく、サンド
ブラスト処理したものとほぼ同程度にすることができ
る。When the wafer has no warp, the wafer is slightly floated partially by the convex portion of the dimple. Although the temperature non-uniformity is reduced as in the case of the sand blasted one, it is excellent in that it becomes more regular.
If the wafer has a slight warp, it may be slightly floating from the convex part of the dimple.However, the temperature unevenness is smaller than that of the mirror-finished one, and is almost the same as that of the sand-blasted one. Degree.
【0015】又、ウェーハの取り外しは、吸着面積が小
さくサンドブラスト処理したものと同様に容易に行え
る。Further, the removal of the wafer can be easily performed as in the case of the one subjected to the sand blasting process with a small suction area.
【0016】サンドブラスト処理したものは中心線平均
粗さRa及び最大表面粗さRmaxが使用による摩耗で
変化するので、ウェーハとの接触状態に変化があるが、
本実施の形態ではRaとRmaxはほぼ同じであり、極
端に摩耗しない限り、接触状態は殆ど変化しないので寿
命が長くなる。In the case of the sandblasted one, the center line average roughness Ra and the maximum surface roughness Rmax change due to abrasion due to use, so that the contact state with the wafer changes.
In the present embodiment, Ra and Rmax are almost the same, and the contact state hardly changes unless extremely worn, so that the life is extended.
【0017】図2は本実施の形態の変形例を示す平面図
である。図2(a)は凹部4どうしが接触したもの、図
2(b)は凹部どうしが連結しそれによって凸部5が独
立したもの、図2(c)は凹部を千鳥状に配置したもの
であり、これらのいずれものも使用可能である。FIG. 2 is a plan view showing a modification of the present embodiment. FIG. 2A shows a case where the recesses 4 are in contact with each other, FIG. 2B shows a case where the recesses are connected to each other to thereby make the protrusions 5 independent, and FIG. 2C shows a case where the recesses are arranged in a staggered manner. Yes, any of these can be used.
【0018】図3は凹部の断面形状の変形例を示す。図
1には凹部の断面形状が段階状のものを示したが、図3
(a)のように半円形状あるいは図3(b)のように逆
三角形状にしてもよい。これらのものは図1のものに比
べると寿命の点で劣るが、サンドブラスト処理したもの
より長寿命である。FIG. 3 shows a modification of the sectional shape of the concave portion. FIG. 1 shows a stepped cross section of the concave portion.
The shape may be a semicircle as shown in FIG. 3A or an inverted triangle as shown in FIG. These are inferior in life as compared with those in FIG. 1, but have a longer life than those subjected to sandblasting.
【0019】以上機械的なディンプル加工で凹部を形成
したものについて説明した。ホトリソグラフィー技術を
利用して深さが少なくとも10μmの凹部を形成するこ
ともできる。その場合には、凹部の深さは機械加工によ
るもののように大きくできないのであまり寿命は長くで
きないが、サンドブラスト処理をしたものに比較すると
長寿命化されることは明らかである。The above description has been made on the case where the concave portion is formed by mechanical dimple processing. A recess having a depth of at least 10 μm can also be formed using photolithography technology. In this case, the depth of the concave portion cannot be increased as much as that obtained by machining, so that the life cannot be lengthened much. However, it is clear that the life is prolonged as compared with the sand blasted one.
【0020】[0020]
【発明の効果】以上説明したように本発明のサセプタ
は、半導体ウェーハを載置する座ぐり面に同一寸法に設
計された凹部が規則的に配列されているので、サンドブ
ラスト処理をしたものと同様にウェーハの反りによる加
熱ムラが少なくかつウェーハの取り外しが容易である。
又、サンドブラスト処理したものでは座ぐり面の凹凸が
不規則であり、使用による摩耗によりウェーハとの接触
点数や面積に変化が大きく寿命が短いのに対し、本発明
では凹凸が規則的にかつ均一になっているので摩耗によ
る接触点数や面積の変化が少なく長寿命である。As described above, in the susceptor of the present invention, the recesses designed to have the same dimensions are regularly arranged on the counterbore surface on which the semiconductor wafer is mounted. In addition, there is little heating unevenness due to the warpage of the wafer, and the wafer can be easily removed.
In the case of the sand blasted one, irregularities on the counterbore surface are irregular, and the number and area of contact points with the wafer change greatly due to wear due to use, and the life is short, whereas in the present invention, the irregularities are regular and uniform. Therefore, there is little change in the number of contact points or area due to abrasion, and the life is long.
【図1】本発明の一実施の形態を示す平面図(図1
(a)),図1(a)のA−A面断面図(図1
(b)),座ぐり面2の部分拡大平面図(図1(c))
及び図1(c)のB−B線断面図(図1(d))であ
る。FIG. 1 is a plan view showing an embodiment of the present invention (FIG.
(A)), a sectional view taken along the line AA of FIG.
(B)), a partially enlarged plan view of the counterbore surface 2 (FIG. 1 (c))
FIG. 2 is a cross-sectional view taken along line BB of FIG. 1C (FIG. 1D).
【図2】本発明の一実施の形態の変形例における3つの
平面形状例を(a)〜(c)に分図してそれぞれ示す平
面図である。FIGS. 2A to 2C are plan views respectively showing three examples of planar shapes according to a modification of the embodiment of the present invention; FIGS.
【図3】本発明の一実施の形態の変形例における2つの
断面形状例を(a),(b)に分図してそれぞれ示す断
面図である。FIGS. 3A and 3B are cross-sectional views showing two examples of a cross-sectional shape according to a modification of the embodiment of the present invention, separately showing FIGS.
【図4】従来例を示す平面図(図4(a)),図4
(a)のA−A線断面図(図4(b))及び座ぐり面2
の部分拡大断面図(図4(c))である。FIG. 4 is a plan view showing a conventional example (FIG. 4A), FIG.
FIG. 4A is a sectional view taken along line AA (FIG. 4B) and a counterbore surface 2.
5 is a partially enlarged sectional view of FIG.
1 サセプタ本体 2 座ぐり面 3 ウェーハ 4 凹部 5 凸部 DESCRIPTION OF SYMBOLS 1 Susceptor main body 2 Counterbore surface 3 Wafer 4 Concave part 5 Convex part
Claims (4)
一寸法に設計された深さを有する凹部が規則的に配列さ
れ、かつ前記凹部の断面形状は半円形状もしくは逆三角
形状であることを特徴とするサセプタ。1. A recess having the same designed depth is regularly arranged on a counterbore surface on which a semiconductor wafer is placed , and the recess has a semicircular or inverted triangular cross section.
A susceptor having a shape .
とを特徴とする請求項1記載のサセプタ。Wherein this adjacent recesses each other are connected
The susceptor of claim 1, wherein the door.
れる請求項1又は2記載のサセプタ。3. The susceptor according to claim 1, wherein the recess is formed by mechanical dimple processing.
れる請求項1又は2記載のサセプタ。4. The susceptor according to claim 1, wherein the recess is formed by a lithography technique.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4114996A JP2901536B2 (en) | 1996-02-28 | 1996-02-28 | Susceptor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4114996A JP2901536B2 (en) | 1996-02-28 | 1996-02-28 | Susceptor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09232411A JPH09232411A (en) | 1997-09-05 |
| JP2901536B2 true JP2901536B2 (en) | 1999-06-07 |
Family
ID=12600372
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4114996A Expired - Fee Related JP2901536B2 (en) | 1996-02-28 | 1996-02-28 | Susceptor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2901536B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011515854A (en) * | 2008-03-20 | 2011-05-19 | アプライド マテリアルズ インコーポレイテッド | Susceptor having a roll forming surface and method of forming the same |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6423949B1 (en) * | 1999-05-19 | 2002-07-23 | Applied Materials, Inc. | Multi-zone resistive heater |
| US7691205B2 (en) * | 2005-10-18 | 2010-04-06 | Asm Japan K.K. | Substrate-supporting device |
-
1996
- 1996-02-28 JP JP4114996A patent/JP2901536B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011515854A (en) * | 2008-03-20 | 2011-05-19 | アプライド マテリアルズ インコーポレイテッド | Susceptor having a roll forming surface and method of forming the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH09232411A (en) | 1997-09-05 |
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