JP2902765B2 - Track search control device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a track search control device of an information recording / reproducing apparatus that performs at least one of recording, reproducing, and erasing information on a recording medium having a track.

[Related Art] In recent years, for example, an information recording / reproducing apparatus for recording information on a recording medium at a high density by irradiating a light beam or reproducing the information recorded at a high density at a high speed has become quite popular.
One of the information recording / reproducing devices is an optical disk device.
Normally, the information track interval on an optical disc is about 1.6 μm, so that an optical disc can record at a higher density than other memory means, but the positioning of the optical head to a target track is different. An extremely fine control technique is required as compared with the disk type memory.

As a seek control method for positioning an optical head to a target track on an optical disk, there is a method of counting a track cross pulse obtained by pulsing a track cross signal read when crossing a track on an optical disk, and seeking the target track. Can be more reliably positioned at once than the method of seeking the optical head with reference to the external scale. However, a track on an optical disk is usually divided into a plurality of information areas (hereinafter referred to as sectors), and a groove (hereinafter referred to as a group) for obtaining a track cross signal is cut off at the beginning of each sector. There are parts. At that portion, a track address or a sector number or the like is stored in advance, or a mirror surface portion (also called a mirror mark) for removing a track offset in the pushle tracking method is provided. When an optical head seeks a target track while counting a track cross signal on such an optical disc, if a light spot emitted from the optical head passes through a broken portion of the group, the track cross signal is lost, and However, there is a problem that the track cross signal cannot be counted.

As means for solving such problems, Japanese Patent Laid-Open No.
There is a seek control method disclosed in Japanese Patent No. 221878. FIG. 5 is a circuit diagram showing a conventional track search control device which realizes this seek control method.

The track cross pulse read from the optical disc by the track search is supplied to a NOT circuit 1, a flip-flop circuit 2,
The signal is converted into a read cross pulse via the logical AND circuit 4 and 3. This read cross pulse is counted by the cross pulse counter 6 via the OR circuit 5. The pulse interval value of the read cross pulse is counted by the pulse interval counter 8 based on the standard pulse from the standard pulse generator 7. The pulse interval value is stored in the count value storage circuit 11 via the AND circuit 9. In the division circuit 10,
The pulse interval value input from the pulse interval counter 8 is divided by the interval value of the previous read cross pulse stored in the count value storage circuit 11.

If the track cross signal is detected correctly,
Since the pulse interval value of the read cross pulse is constant, the output of the division circuit 10 becomes 1. Addition of -1 to the output of the dividing circuit 10 results in the output of the -1 circuit 12 being 0. This output is input to the pulse generation circuit 13. Pulse generation circuit 13
Is controlled by the output of the -1 circuit 12, outputs nothing when the output of the -1 circuit 12 is 0, and outputs one pulse when the output of the -1 circuit 12 is 1. Therefore, when the pulse interval value of the read cross pulse is constant, the output of the -1 circuit 12 becomes 0, and no pulse is output from the pulse generation circuit 13.

However, for example, when one read cross pulse is missed, the output of the pulse-to-pulse counter 8 becomes twice as usual,
The output of the arithmetic circuit 10 is 2. Therefore, the output of the -1 circuit 12 becomes 1, and one pulse is generated from the pulse generation circuit 13 and supplied to the cross pulse counter 6. One pulse that has escaped in this manner is supplemented by the output of the pulse generation circuit 13, and a normal count output for seek control is obtained.

The above operation is shown in FIG. In this figure, A is the pulse waveform of the read cross pulse, B is the count value of the pulse interval counter 8, C is the output waveform of the pulse generation circuit 13,
Indicates a count value in the cross pulse counter 6.

In A, the count value between the read cross pulse N and the pulse N + 1 is assumed to be m as shown in B. When the pulse N + 2 next to the read cross pulse N + 1 passes, at the time of the read cross pulse N + 3 of the inter-pulse counter 8, the count value is 2 m instead of the normal m as shown in B.
Becomes In this case, the output of the division circuit 10 becomes 2, and -1
The correction pulse shown by C is generated from the pulse generation circuit 13 by the output through the circuit 12.

[Problems to be Solved by the Invention] However, since the read cross pulses are not completely at equal intervals, if one pulse is missed, the pulse interval does not always become twice or more the immediately preceding pulse interval. If the pulse interval is less than twice the immediately preceding pulse interval, no correction pulse is generated in the above-described conventional method, and thus a deviation occurs between the actual number of tracks and the count value of the cross pulse counter 6. .

On the other hand, when such a method is implemented by hardware, it is difficult to design the division circuit at low cost because the division circuit is a relatively expensive component. In addition, in the case of realizing by software using an arithmetic element such as a microprocessor, division processing generally takes a longer time than other arithmetic processing. Cannot be fully exhibited.

An object of the present invention is to solve the above-mentioned drawbacks, and an object of the present invention is to provide a track search control device capable of correcting a track cross pulse with a highly reliable and inexpensive device and performing an accurate track search.

[Means and Actions for Solving the Problems] To achieve the above object, a first invention of the present application is to count a track cross pulse obtained when a head scanning a track on a recording medium traverses. A track search control device that searches for a target track according to the following: a first cycle data generator that generates first cycle data indicating a cycle of the track cross pulse for each pulse; and a first cycle data generator. Output first
A limiter that regulates the rate of change of the periodic data, and the first periodic data output from the limiter includes 1 <K ₁ <
And second periodic data generating means for sequentially generating a second periodic data obtained by multiplying the proportional constant K ₁ to 2, a first storage means for storing the second period data, the first storage means Stored in the second period data and the newly generated first period data
And pulse generating means for generating an interpolation pulse when a period indicated by the first period data is longer than a period indicated by the second period data. I do.

A second invention of the present application is directed to a track search control device that searches for a target track by counting track cross pulses obtained when a head that scans a track on a recording medium crosses the track cross pulse. A first period data generating unit that generates first period data indicating a period for each pulse; and a first period data output from the first period data generating unit.
A limiter for restricting the rate of change of the period data, the first period data outputted from the limiter, K ₂ <1 and the third third of sequentially generating a periodic data obtained by multiplying the proportional constant K ₂ to , Second storage means for storing the third cycle data, and comparing the third cycle data stored in the second storage means with the newly generated first cycle data. And stopping means for preventing the track cross pulse from being measured until the period indicated by the first period data is longer than the period indicated by the third period data. It is characterized by the following.

The third invention of the present application is directed to a track search control device that searches for a target track by counting track cross pulses obtained when a head that scans a track on a recording medium crosses the track cross pulse. A first period data generating unit that generates first period data indicating a period for each pulse; and a first period data output from the first period data generating unit.
A limiter that regulates the rate of change of the periodic data, and the first periodic data output from the limiter includes 1 <K ₁ <
And second periodic data generating means for sequentially generating a second periodic data obtained by multiplying the proportional constant K ₁ to 2, a first storage means for storing the second period data, the first storage means Stored in the second period data and the newly generated first period data
And pulse generating means for generating an interpolation pulse when the period indicated by the first period data is longer than the period indicated by the second period data. Third cycle data generating means for sequentially generating third cycle data obtained by multiplying the first cycle data by a proportionality constant K ₂ that satisfies K ₂ <1, and a third cycle data storing means for storing the third cycle data. And comparing the third period data stored in the second storage unit with the newly generated first period data, and comparing the period data indicated by the third period data with the third period data. 1
And means for preventing the track cross pulse from being measured until the period indicated by the period data becomes longer.

Embodiment An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a first embodiment of the present invention.

A track cross signal read from an optical disk (not shown) by an optical head (not shown) is converted into a track cross pulse, and is input to a cross pulse counter 15 via an OR circuit 14. Further, the track cross pulse is also input to the cycle measuring circuit 16. This period measurement circuit 16
For example, counts the intervals of track cross pulses based on the reference clock output from the reference clock generation circuit 28, and outputs the counted value as first cycle data. This first cycle data is input to the limiter 17. When a sudden change exceeding a predetermined rate of change is found in the first cycle data, the limiter 17 determines that the first cycle data has an error, and outputs a limit value instead. The output of the limiter 17 is input to a low-pass filter (hereinafter referred to as LPF) 18. The cutoff frequency of the LPF 18 is set to a value that allows the periodic variation component of the track cross pulse generated when the optical head is accelerated or decelerated to pass, and that abnormal periodic data is smoothed. LPF18
Is input to the multiplication circuit 19. Assuming that the pulse interval corresponding to the average value of the track cross pulse intervals is an average pulse interval, the multiplying circuit 19 sets a proportional constant K for setting how many times the average pulse interval generates an interpolation pulse described later. ₁ is multiplied by the first cycle data and output as second cycle data. Here, the proportionality constant K ₁ is 1
<K ₁ <2. The second cycle data is input to the storage circuit 20. The storage circuit 20 is configured by, for example, a latch circuit, and operates so as to continuously output the previous second cycle data until the second cycle data is updated.
The output of the storage circuit 20 is provided to the down counter 22 as preset data. The load pulse generation circuit 21 outputs a counter load pulse synchronized with the track cross pulse to the down counter 22. The down counter 22,
The above-described preset data is loaded by the counter load pulse, and the reference clock output from the reference clock generation circuit 28 is counted down. When the count value becomes “0” before the input of the next counter load pulse by the down-counting, the down counter 22 outputs one borrow pulse. This borrow pulse corresponds to the above-mentioned interpolation pulse. The borrow pulse is input to the cross pulse counter 15 via the OR circuit 14, and is counted like the track cross pulse.

The operation of this embodiment will be described with reference to the time chart of FIG.

In FIG. 2, E is the pulse waveform of the track cross pulse, F is the count value of the down counter 22, and F 'is the first cycle data when the track search is normally performed.
The count value of the down counter 22 when a constant value X is set, G is the pulse waveform of the borrow pulse output from the down counter 22, H is the output waveform of the OR circuit 14, and I is the count value of the cross pulse counter 15. . In F and F ', the upper formula shows preset data,
The lower formula shows the count value immediately before the preset.

Track cross pulses N, N + 1, N + 3, N + 4 in FIG. 2E
Is input to the cross pulse counter 15 via the OR circuit 14. In this case, the count values are P,
It is counted as P + 1, P + 3, P + 4. On the other hand, the track cross pulse is also input to the cycle measuring circuit 16 to generate first cycle data. The first period data is multiplied by K _{1 in} a multiplication circuit 19 via a limiter 17 and an LPF 18, and
Is input to the storage circuit 20 as the period data of. This storage circuit 20 converts the data into preset data,
Entered in 22. Here, the track cross pulses N and N
If the first period data between +1 and X _{+ 1} are X _{N + 1} and the first period data between N + 1 and N + 3 are X _{N + 3,} the count value of the down counter 22 is shown in FIG. 2F. Become like First period data X _N−1 , X _N , X _{N + 1} , X _{N + 2} , X
_{Since N + 4} is almost equal, each value is calculated as the average period data X
Then, X _{N + 3} becomes 2X because it is almost equal to twice X. The count value of the down counter 22 at this time is shown in FIG. 2F '.

The gain of the limiter 17, LPF 18 and 1, 1.5 K ₁ e.g.
When set to, the above preset data is K ₁ X = 1.5X
Can be expressed as The down counter 22 loads the preset data by a counter load pulse and counts down by a reference clock. Preset data is 1.5X _N
In the case of, N + count value of the down counter 22 just before the _{1, 1.5X N -X N + 1 ≒} 1.5X-X (> 0) and became at Figure 2 counter load pulses corresponding to N + 1 of E Is input, the borrow pulse G is not output.

The pulse N + 2 indicated by the broken line in FIG. 2E is a pulse that has not been detected. After the pulse N + 1 of E is given to the cross pulse counter 15 and the count value becomes P + 1, no counter load pulse is output from the load pulse generation circuit 21 at the timing corresponding to the track cross pulse N + 2. Therefore, the down counter 22 continues down counting even if the count value exceeds 1.5X _{N + 1} -X _{N + 2} ≒ 1.5X-X (> 0), and the count value becomes 1.5X _{N + 1} -1.5X _{N When the value of +2} ≒ 1.5X−1.5X = 0, as shown in FIG.
22 outputs one borrow pulse. This borrow pulse is input to the cross pulse counter 15 via the OR circuit 14, and is counted as P + 2.

The down counter 22 continues counting down until a counter load pulse corresponding to the track cross pulse N + 3 is input, and the count value becomes 1.5X _{N + 1} -X _{N + 3} ≒ 1.5X-2X (<0). Occasionally, a counter load pulse is input, the down counter 22 is preset, and the count value is 1.5X _{N + 3}
Becomes Thereafter, the above operation is repeated.

Thus, in this embodiment, by measuring the period of the track cross pulse, the measured period data K ₁ multiplied, used as preset data, counts down by the reference clock down counter from said preset data, the count If the down counter is preset before the value becomes "0", it is determined that the track search is normally performed. However, when the count value of the down counter becomes “0”, it is determined that an error has occurred in the track search, and the down counter generates an interpolation pulse. This makes it possible to compensate for an error generated in the track search, and to perform an accurate track search.

Next, a second embodiment of the present invention will be described. FIG. 3 is a block diagram of a second embodiment of the present invention. The same components as those in the first embodiment are denoted by the same reference numerals.

Track cross pulses obtained from the optical head are counted by the cross pulse counter 15 via the AND circuit 27 and the OR circuit 14. On the other hand, the track cross pulse is also input to the cycle measuring circuit 16 to generate first cycle data. The first cycle data is a limiter 17, LPF18
, And then input to the multiplication circuits 19 and 23.

The first cycle data input to the multiplication circuit 23 is multiplied by K ₂ (K ₂ <1) and input to the storage circuit 2 as third cycle data. The storage circuit 24 converts the third cycle data into preset data and outputs the same to the down counter 25.

On the other hand, the down counter 25 has a load pulse generation circuit.
The counter load pulse output from 21 is also input.
When this counter load pulse is input to the down counter 25, the aforementioned preset data is
Loaded on 25.

The counter load pulse is also input to the reset terminal RST of the flip-flop 26. This flip-flop 26
Is reset every time a counter load pulse is input, and the output Q of the flip-flop 26 is set to “L”.
Incidentally, the input terminal D of the flip-flop 26 is connected to the power supply _VCC . That is, the input terminal D of the flip-flop 26
, "H" is always input.

The down counter 25 counts down from the above-mentioned preset data based on the reference clock output from the reference clock generation circuit 28, and outputs one borrow pulse when the count value becomes “0”. This borrow pulse is supplied to the clock terminal CK of the flip-flop 26, and the output Q of the flip-flop 26 is set to "H". The output Q of the flip-flop 26 holds “H” until the next counter load pulse is input to the reset terminal of the flip-flop 26. This output Q is output to an AND circuit 27.
Is input to This AND circuit 27 is a flip-flop.
26, the track cross pulse is passed only when the output Q is "H", and when the output Q is "L", the passage of the track cross pulse is blocked.

 Other configurations are the same as in the first embodiment.

The operation of the second embodiment will be described with reference to a time chart shown in FIG.

4, E is a pulse waveform of a track cross pulse, G is a pulse waveform of a borrow pulse output from the down counter 22, J is a pulse waveform of a borrow pulse output from the down counter 25, and K is an output waveform of the flip-flop 26. , H indicates the output waveform of the OR circuit 14, and I indicates the count value of the cross pulse counter 15.

As shown in FIG. 4E, the track cross pulses obtained from the optical head are N, N + 1, N + 2, N + 3, N + 5.
The track cross pulse is input to the cycle measuring circuit 16 and is converted into first cycle data by the cycle measuring circuit 16. The first cycle data is passed through a limiter 17 and an LPF 18 to the second cycle data multiplied by K ₁ in the first multiplication circuit 19 and the third cycle multiplied by K _{2 in} the second multiplication circuit 23 And converted to data respectively. The second and third periodic data are:
Each is input to the storage circuit 20 and the storage circuit 24, and is converted into preset data. These preset data are loaded into the down counters 22 and 25, respectively.

Here, for example, the K ₁ to 1.2, setting K ₂ to 0.8, respectively preset data described above K ₁ X = 1.2X, the K ₂ X = 0.8X.

When the track cross pulse N is input, the down counters 22 and 25 start down counting based on the reference clock. And after the track cross pulse N is input
After a lapse of 0.8X, the count value of the down counter 25 reaches “0”. In other words, the count values of the respective down counters 22 and 25 are as follows: K ₁ X−0.8X = 1.2X−0.8X> 0 K ₂ X−0.8X = 0.8X−0.8X = 0 Is output. Due to this borrow pulse, the output Q of the flip-flop 26 becomes “H”, and the AND circuit to which this output Q is input
At 27, the track cross pulse can be passed. When the track search is normally performed, the track cross pulses are generated at substantially the same interval, and the count values of the down counters 22 and 25 after the lapse of X from the input of the track cross pulse N are K ₁ X −X = 1.2X−X = 0.2XK ₂ XX = 0.8XX−X = −0.2X At this time, the next track cross pulse N + 1 is input. Accordingly, the AND circuit 27 passes the track cross pulse N + 1, and the OR circuit 14 outputs the pulse signal shown in FIG.
The 15 count values I are updated to P + 1.

A counter load pulse is output from the load pulse generation circuit 21 in response to the track cross pulse N + 1 described above.
26 is reset, and the output Q becomes "L", so that the AND circuit 27 disables passage of the track cross pulse. The down counters 22 and 25 are reset again by the counter load pulse, and both start down counting.

Thereafter, when an abnormality occurs such that a track cross pulse is detected at about half the original cycle (0.5X), for example, N + 2, the count values of the down counters 22 and 25 become K ₁ X−0.5. X = 1.2X−0.5X> 0 K ₂ X−0.5X = 0.8X−0.5X> 0, and the count value of the down counter 25 has not reached “0”. Therefore, no borrow pulse is output from the down counter 25, and the output Q of the flip-flop 26 is still "L", so that the track cross pulse N + 2 cannot pass through the AND circuit 27. Therefore, the cross pulse counter 15 does not count this track cross pulse N + 2.

With the track cross pulse N + 2, a counter load pulse is output from the load pulse generation circuit 21 and the down counters 22 and 25 are preset. Each than the first period data 0.5X when the second, third cycle data becomes _{K 1 × 0.5X = 1.2 × 0.5X} = 0.6XK 2 × 0.5X = 0.8 × 0.5X = 0.4X . The 0.6X and 0.4X are loaded as preset data of the down counters 22 and 25, and are counted down by the down counters 22 and 25 based on the reference clock. Then, the count value of the down counter 25 after 0.4X has elapsed from the output of the counter load pulse corresponding to the track cross pulse N + 2 becomes 0.4X−0.4X = 0, and the down counter 25 outputs a borrow pulse. Due to this borrow pulse, the output Q of the flip-flop 26 becomes “H”, and the AND circuit to which this output Q is input
At 27, the track cross pulse can be passed, and the pulse N + 3 is counted by the cross pulse counter 15.

Next, as shown by N + 4 in FIG. 4E, an operation in the case where the track cross signal is not detected in the track search and the track cross pulse is missed will be described.

When the track cross pulse N + 3 is input, the down counters 22 and 25 start down counting based on the reference clock. First, the count value of the down counter 25 reaches “0” after 0.8X has elapsed. In other words, the count values of the respective down counters 22 and 25 are as follows: K ₁ X−0.8X = 1.2X−0.8X> 0 K ₂ X−0.8X = 0.8X−0.8X = 0 Is output. Due to this borrow pulse, the output Q of the flip-flop 26 becomes “H”.
At 27, the track cross pulse can be passed.

However, since the track cross pulse N + 4 is not input, the down counters 22 and 25 count down, and after a lapse of 1.2X from the input of the track cross pulse N + 4, the count value of the down counter 22 becomes “0”. become. At this time, the count values of the down counters 22 and 25 are K ₁ X−1.2X = 1.2X−1.2X = 0 K ₂ X−1.2X = 0.8X−1.2X <0, and a borrow pulse is output from the down counter 22. Is done. This is shown in FIG. 4G. This borrow pulse is input to the cross pulse counter 15 via the OR circuit 14, and is counted as P + 4 as shown in FIG.

The down counters 22 and 25 continue counting down until the next counter load pulse is input, and are preset when the counter load pulse by the track cross pulse N + 5 is input. Thereafter, the above operation is repeated.

As described above, according to this embodiment, in addition to generating an interpolation pulse when a track cross pulse is lost as shown in the first embodiment, when an erroneous track cross pulse is input, By having a function of preventing an erroneous track cross pulse from being input to the cross pulse counter 25, the optical head can be used not only when a track cross pulse is lost but also when a false track cross pulse is input. Can be accurately counted.

[Effects of the Invention] As described above, according to the present invention, it is possible to correct a track cross pulse with a highly reliable and inexpensive device and perform an accurate track search.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention, FIG. 2 is a time chart showing an operation of the first embodiment, FIG. 3 is a block diagram showing a second embodiment of the present invention, FIG. Is a time chart showing the operation of the second embodiment, FIG. 5 is a block diagram showing a conventional example, and FIG. 6 is a time chart showing the operation of the conventional example. 14… OR circuit 15… Cross pulse counter 16… Period measurement circuit 19… Multiplication circuit 20… Storage circuit 21… Load pulse generation circuit 22… Down counter

Claims (3)

(57) [Claims] 1. A track search control device that searches for a target track by counting track cross pulses obtained when a head that scans a track on a recording medium traverses the track, wherein: A first cycle data generating means for generating the cycle data of each pulse, a limiter for regulating a rate of change of the first cycle data output from the first cycle data generating means, and a limiter output from the limiter. The first cycle data,
A second period data generating unit for sequentially generating second period data multiplied by a proportionality constant K ₁ that satisfies 1 <K ₁ <2; a first storage unit for storing the second period data; The second cycle data stored in the first storage means is compared with the newly generated first cycle data, and the second cycle data is compared with the second cycle data.
And a pulse generating means for generating an interpolation pulse when a period indicated by the first period data is longer than a period indicated by the period data. 2. A track search control device for searching for a target track by counting track cross pulses obtained when a head scanning a track on a recording medium traverses the first track, the first indicating the period of the track cross pulse. A first cycle data generating means for generating the cycle data of each pulse, a limiter for regulating a rate of change of the first cycle data output from the first cycle data generating means, and a limiter output from the limiter. The first cycle data,
A third period data generation unit for sequentially generating third period data multiplied by a proportional constant K ₂ that satisfies K ₂ <1, a second storage unit for storing the third period data, Comparing the third cycle data stored in the storage means with the newly generated first cycle data,
Until the period indicated by the first cycle data is longer than the period indicated by the cycle data of
A track search control device, comprising: a blocking unit configured to block measurement of the track cross pulse. 3. A track search control device for searching for a target track by counting track cross pulses obtained when a head scanning a track on a recording medium traverses, wherein: a first signal indicating a period of the track cross pulse. A first cycle data generating means for generating the cycle data of each pulse, a limiter for regulating a rate of change of the first cycle data output from the first cycle data generating means, and a limiter output from the limiter. The first cycle data,
A second period data generating unit for sequentially generating second period data multiplied by a proportionality constant K ₁ that satisfies 1 <K ₁ <2; a first storage unit for storing the second period data; The second cycle data stored in the first storage means is compared with the newly generated first cycle data, and the second cycle data is compared with the second cycle data.
A pulse generating means for generating an interpolation pulse when a period indicated by the first period data is longer than a period indicated by the period data, and the first period data output from the limiter includes:
A third period data generation unit for sequentially generating third period data multiplied by a proportional constant K ₂ that satisfies K ₂ <1, a second storage unit for storing the third period data, Comparing the third cycle data stored in the storage means with the newly generated first cycle data,
Until the period indicated by the first cycle data is longer than the period indicated by the cycle data of
A track search control device, comprising: a blocking unit configured to block measurement of the track cross pulse.