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JP2902849B2 - Printed circuit board manufacturing method - Google Patents
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JP2902849B2 - Printed circuit board manufacturing method - Google Patents

Printed circuit board manufacturing method

Info

Publication number
JP2902849B2
JP2902849B2 JP3313792A JP3313792A JP2902849B2 JP 2902849 B2 JP2902849 B2 JP 2902849B2 JP 3313792 A JP3313792 A JP 3313792A JP 3313792 A JP3313792 A JP 3313792A JP 2902849 B2 JP2902849 B2 JP 2902849B2
Authority
JP
Japan
Prior art keywords
insulating film
interlayer insulating
catalyst
circuit pattern
opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP3313792A
Other languages
Japanese (ja)
Other versions
JPH05235545A (en
Inventor
松利 井原
幸弘 谷口
正弘 古川
伸夫 浜岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3313792A priority Critical patent/JP2902849B2/en
Publication of JPH05235545A publication Critical patent/JPH05235545A/en
Application granted granted Critical
Publication of JP2902849B2 publication Critical patent/JP2902849B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明はプリント基板の製造方法
にかかわり、特にビルドアップ方式により多層配線プリ
ント基板を製造する際に層間絶縁膜と導通回路および絶
縁膜間の密着性向上に好適なプリント基板の製造方法に
関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed circuit board, and more particularly to a print suitable for improving the adhesion between an interlayer insulating film and a conductive circuit and an insulating film when a multilayer wiring printed circuit board is manufactured by a build-up method. The present invention relates to a method for manufacturing a substrate.

【0002】[0002]

【従来の技術】従来、ビルドアップ方式により配線層を
多層に積層して多層配線プリント基板を形成するに際し
て、層間絶縁膜の密着性を向上させるには、例えば層間
絶縁膜表面に凹凸を設け単位面積あたりの表面積を増加
させてアンカー効果を持たせる方法が知られている。以
下に代表的な二つの例を示す。
2. Description of the Related Art Conventionally, in order to improve the adhesion of an interlayer insulating film when forming a multilayer wiring printed board by laminating wiring layers in multiple layers by a build-up method, for example, irregularities are formed on the surface of the interlayer insulating film by a unit. There is known a method of increasing the surface area per area to have an anchor effect. The following are two typical examples.

【0003】先ず、第一の例を図1の製造工程断面図に
したがって説明すると、次の通りである。 工程(a):導通回路パターン2が形成されたプリント
基板1に第1の層間絶縁膜3を印刷する。 工程(b):層間絶縁膜3の表面に膨潤層4を形成す
る。 工程(c):工程(b)で形成した膨潤層4を、例えば
クロム酸と硫酸との混合液からなる粗化液で表面処理
し、粗化面体5を形成する。 工程(d):第2の層間絶縁膜3aを、予め定められた
導通回路パターンの形成予定領域10を除きそれ以外の
表面に印刷し、次いで触媒6を付着させる。 工程(e):銅めっき7で導通回路パターンを形成す
る。 この後、第3の層間絶縁膜3bを形成し、工程(a)〜
工程(e)を必要な層数だけ繰り返す。
First, the first example will be described with reference to the cross-sectional view of the manufacturing process shown in FIG. Step (a): The first interlayer insulating film 3 is printed on the printed circuit board 1 on which the conductive circuit pattern 2 is formed. Step (b): forming a swelling layer 4 on the surface of the interlayer insulating film 3. Step (c): The swelling layer 4 formed in step (b) is subjected to a surface treatment with a roughening solution composed of, for example, a mixed solution of chromic acid and sulfuric acid to form a roughened surface body 5. Step (d): The second interlayer insulating film 3a is printed on the surface other than the predetermined region 10 where the conductive circuit pattern is to be formed, and then the catalyst 6 is attached. Step (e): A conductive circuit pattern is formed by copper plating 7. Thereafter, a third interlayer insulating film 3b is formed, and steps (a) to (c) are performed.
Step (e) is repeated for the required number of layers.

【0004】次いで第二の例について説明すると、層間
絶縁膜に粉状、粒状、繊維状、針状またはそれらの混合
系の充填剤を混入し、層間絶縁膜の表面に充填剤を突出
させて凹凸面を形成し、単位面積あたりの表面積を増加
させることによりアンカー効果を持たせる方法が知られ
ている。この製造方法の工程を以下に説明する。 工程(a):導通回路パターンが形成されたプリント基
板に粉状、粒状、繊維状、針状またはそれらの混合系の
充填剤を含有した層間絶縁膜を印刷する。印刷された絶
縁膜の表面は充填剤によって凹凸面を形成している。印
刷方法は、上記第一の例の工程(d)と同様であり、層
間絶縁膜を、導通回路パターンを形成する予定部を除き
それ以外の表面に印刷する。 工程(b):次いで触媒6を付着させる。 工程(c):銅めっきで導通回路パターンを形成する。 この後、工程(a)〜工程(c)を必要な層数だけ繰り
返す。なお、この種の充填剤を層間絶縁膜に混入する技
術に関連するものとして、例えば特開平1−23529
4号公報が挙げられる。
Next, a second example will be described. A powdery, granular, fibrous, acicular or a mixture thereof is mixed into an interlayer insulating film, and the filler is projected on the surface of the interlayer insulating film. There is known a method of forming an uneven surface and increasing the surface area per unit area to have an anchor effect. The steps of this manufacturing method will be described below. Step (a): An interlayer insulating film containing a powdery, granular, fibrous, acicular or a mixture thereof is printed on a printed circuit board on which a conductive circuit pattern is formed. The surface of the printed insulating film has an uneven surface formed by the filler. The printing method is the same as that in the step (d) of the first example, and the interlayer insulating film is printed on the other surface except for the portion where the conductive circuit pattern is to be formed. Step (b): Next, the catalyst 6 is attached. Step (c): A conductive circuit pattern is formed by copper plating. Thereafter, the steps (a) to (c) are repeated for the required number of layers. In addition, as a technique related to a technique of mixing this kind of filler into an interlayer insulating film, for example, Japanese Patent Application Laid-Open No. Hei.
No. 4 gazette.

【0005】[0005]

【発明が解決しようとする課題】しかし、上記第一の従
来例によれば、膨潤層4を祖面化する粗化液として用い
るクロム酸と硫酸の混合溶液は、強酸になるため層間絶
縁膜の構成成分であるエポキシ樹脂を溶解しすぎると云
う欠点がある。そのため、粗化ムラが多く均一な粗化面
体が得にくい。その結果、図1の工程(e)に示したよ
うに、銅めっきふくれ8が形成され、層間絶縁膜3と銅
めっき導通回路7との密着性が著しく劣る個所(ピール
強度:最低で0.1kg/cm)が発生し易いという問題が
ある。また、これに付随して膨潤、粗化条件等の工程管
理を厳しくしなければならないと云う煩わしさがある。
However, according to the first conventional example, the mixed solution of chromic acid and sulfuric acid used as a roughening solution for roughening the swelling layer 4 becomes a strong acid, so that an interlayer insulating film is formed. However, there is a disadvantage that the epoxy resin, which is a component of the above, is excessively dissolved. For this reason, it is difficult to obtain a uniform roughened surface with many roughening irregularities. As a result, as shown in step (e) of FIG. 1, a copper plating blister 8 is formed, and the adhesion between the interlayer insulating film 3 and the copper plating conductive circuit 7 is extremely poor (peel strength: at least 0,1). 1 kg / cm). Along with this, there is the inconvenience that the process control such as swelling and roughening conditions must be strict.

【0006】また、上記第二の従来例によれば、層間絶
縁膜の表面に突出する充填剤は完全に露出した形状でな
く、0.1〜1.0μm程度の層間絶縁膜にコートされた
状態にあり、第一の例と同様に層間絶縁膜と導通回路お
よび層間絶縁膜間の密着性の点で信頼性に乏しい(ピー
ル強度:最低で0.1kg/cm)という問題がある。
According to the second conventional example, the filler projecting from the surface of the interlayer insulating film is not completely exposed, but is coated on the interlayer insulating film of about 0.1 to 1.0 μm. As in the first example, there is a problem that the reliability is poor (peel strength: at least 0.1 kg / cm) in terms of adhesion between the interlayer insulating film and the conductive circuit and between the interlayer insulating films.

【0007】したがって、本発明の目的は、上記これら
従来例で指摘した密着性の問題点を解決することにあ
り、層間絶縁膜間および層間絶縁膜と導通回路パターン
の密着を向上せしめ、かつ層間絶縁膜の絶縁特性を向上
させ信頼性の高い細線パターン回路を有する高密度プリ
ント基板をビルドアップ方式により製造する改良された
プリント基板の製造方法を提供することにある。
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to solve the problem of the adhesion pointed out in the above-mentioned prior art, and to improve the adhesion between interlayer insulating films and between the interlayer insulating film and the conductive circuit pattern. Improves insulation properties of insulating film
It is an object of the present invention to provide an improved method of manufacturing a printed circuit board for manufacturing a high-density printed circuit board having a highly reliable fine line pattern circuit by a build-up method.

【0008】[0008]

【課題を解決するための手段】上記本発明の目的は、
1の導通回路パターンが配設されたプリント基板表面に
層間絶縁膜を印刷する工程と、リソグラフィー技術によ
り前記層間絶縁膜をパターニングして少なくとも前記導
通回路パターンの一部を露出させ前記層間絶縁膜に回路
接続用の開口部を形成する工程と前記パターニングさ
れ回路接続用の開口部が形成された層間絶縁膜を含む基
板上に触媒を付与する工程と前記層間絶縁膜の表面を
研磨することにより層間絶縁膜上の触媒を除去して前記
開口部に触媒を選択的に残す研磨工程と前記開口部
含む基板上の触媒残存領域に銅めっきを施し第2の導通
回路パターンを形成する工程とを有し、これらの工程を
積層数に見合って複数回繰返すビルドアップ方式にて製
造するプリント基板の製造方法であって、前記層間絶縁
膜には予め充填剤を分散せしめておき、この絶縁膜を硬
化させた後、少なくともその表層部に突出および埋没し
ている前記充填剤を溶剤で溶解除去して、表面に凹凸を
形成して表面積を増大させる工程を有して成るプリント
基板の製造方法により、達成される。
The object of the present invention is as follows .
On the surface of the printed circuit board on which the conductive circuit pattern
The process of printing an interlayer insulating film and the lithography technology
Patterning the interlayer insulating film to form at least the conductive
Exposing a part of the circuit pattern and forming a circuit on the interlayer insulating film.
Forming an opening for connection of the patterning
Including an interlayer insulating film with an opening for circuit connection
And applying a catalyst on the plate, the removing of the catalyst on the interlayer insulating film by polishing the surface of the interlayer insulating film
A polishing process leaving the catalyst selectively in the opening, the opening
Forming a second conductive circuit pattern by applying a copper plating to a catalyst remaining region on a substrate including the substrate, and manufacturing the printed circuit board by a build-up method in which these steps are repeated a plurality of times in accordance with the number of layers. A method, wherein the interlayer insulation is provided.
A filler is dispersed in the film in advance, and after curing the insulating film, at least the filler protruding and buried in the surface layer is dissolved and removed with a solvent to form irregularities on the surface. the method of manufacturing a printed circuit board comprising a step of increasing the surface area is achieved.

【0009】この充填剤は、層間絶縁膜の形成時には粒
状の形状を維持し、絶縁膜を硬化した後に溶剤となる酸
またはアルカリ溶液で容易に溶解できる物質であること
を考慮して材料選定しなければならない。しかも、工業
的に実施する場合には、汎用性の高い物質でないと入手
も困難となり量産性に欠ける。したがって、水酸化物、
炭酸塩、硫酸塩等の無機充填剤が用いられ、水酸化物と
しては、例えば水酸化アルミニウム、水酸化マグネシウ
ム、塩基性炭酸マグネシウムなどがあり、炭酸塩として
は、例えば炭酸カルシウム、炭酸マグネシウムなどがあ
り、(亜)硫酸塩としては、硫酸カルシウム、硫酸バリ
ウム、硫酸アンモニウム、亜硫酸カルシウム等が挙げら
れる。中でも炭酸カルシウムは層間絶縁膜の表面積の増
大に安定した性能を発揮し、取扱性、経済性においても
優れている。これら充填剤の粒径は平均粒径2〜10μ
m、より好ましくは3〜6μm、そして特に好ましくは
4〜5μmである。
The material of the filler is selected in consideration of the fact that the filler is a substance which maintains a granular shape during the formation of the interlayer insulating film and can be easily dissolved in an acid or alkali solution serving as a solvent after curing the insulating film. There must be. In addition, in the case of industrial implementation, it is difficult to obtain the substance unless it is a substance having high versatility, and lacks mass productivity. Therefore, hydroxide,
Inorganic fillers such as carbonates and sulfates are used.Examples of hydroxides include aluminum hydroxide, magnesium hydroxide, and basic magnesium carbonate.Examples of carbonates include calcium carbonate and magnesium carbonate. There are (sulfite) salts such as calcium sulfate, barium sulfate, ammonium sulfate, calcium sulfite and the like. Among them, calcium carbonate exhibits a stable performance with an increase in the surface area of the interlayer insulating film, and is excellent in handleability and economy. The average particle size of these fillers is 2 to 10 μm.
m, more preferably 3 to 6 μm, and particularly preferably 4 to 5 μm.

【0010】また、充填剤を溶解する溶剤として条件が
厳しいものは、表面処理条件に負荷がかかるため、好ま
しくない。したがって、酸性溶液は条件管理が容易なH
Cl、H2SO4、アルカリ性溶液としてはNaOH溶液
などが好ましいる。また、安価で廃水処理が容易な点に
も配慮する必要があり、HClなどは特に好ましい。
Solvents that dissolve the filler under severe conditions are not preferable because they impose a load on the surface treatment conditions. Therefore, the acidic solution is H
Cl, H 2 SO 4 , and NaOH solution are preferable as the alkaline solution. It is also necessary to consider that the wastewater treatment is easy and inexpensive, and HCl is particularly preferable.

【0011】また、上記層間絶縁膜上に積層形成される
導通回路パターンとしては下地パターンとしてニッケル
めっき、その上に銅めっきを形成し二層導体とすること
が望ましい。実用的に好ましいニッケルめっきの厚さは
0.5〜5.0μmであり、銅めっきの厚さは1.0〜5
0μmである。このニッケルめっき下地は、銅めっきに
比べ緻密なめっき粒子で構成されるため、層間絶縁膜表
面の粗面化に追従して表面が平坦にならない。したがっ
て、層間絶縁膜と導通回路パターンとの密着を阻害しな
い。また、ニッケルめっきが0.5μm以下の場合、層
間絶縁膜の表面が粗いめっきになるため、層間絶縁膜と
銅めっきで形成された導通回路パターンの密着性に悪い
影響を及ぼす。それ故、上述のごとくニッケルめっきの
膜厚は、0.5μm以上が好ましく、また、銅めっき液
に比べニッケルめっき液は高価なため長寿命化による原
価低減の点からも、さらに好ましくは1.0〜2.0μm
となる。
The conductive circuit pattern laminated on the interlayer insulating film is preferably a two-layer conductor formed by nickel plating as a base pattern and copper plating thereon. A practically preferred thickness of nickel plating is 0.5 to 5.0 μm, and a thickness of copper plating is 1.0 to 5 μm.
0 μm. Since the nickel plating base is composed of denser plating particles than copper plating, the surface does not become flat following the surface roughening of the interlayer insulating film. Therefore, the adhesion between the interlayer insulating film and the conductive circuit pattern is not hindered. Further, when the nickel plating is 0.5 μm or less, the surface of the interlayer insulating film becomes rough plating, which adversely affects the adhesion between the interlayer insulating film and the conductive circuit pattern formed by copper plating. Therefore, as described above, the thickness of the nickel plating is preferably 0.5 μm or more, and the nickel plating solution is more expensive than the copper plating solution. 0-2.0 μm
Becomes

【0012】また、層間絶縁膜に分散させる充填剤の量
としては70〜100重量部が好ましい。70重量部未
満では緻密な粗化面体が形成しにくくなり層間絶縁膜間
が剥離し易くなる。さらに、100重量部を超えると充
填剤の分量が多すぎるため、溶剤で溶解した時の粗化面
体が滑らかになり層間絶縁膜間の密着性が劣る。そこで
70重量部以上が好ましく、より好ましくは80〜90
重量部が良い。
The amount of the filler dispersed in the interlayer insulating film is preferably 70 to 100 parts by weight. If the amount is less than 70 parts by weight, it is difficult to form a dense roughened surface, and the interlayer insulating film is easily peeled off. Further, if it exceeds 100 parts by weight, the amount of the filler is too large, so that the roughened surface body when dissolved with a solvent becomes smooth, and the adhesion between interlayer insulating films is poor. Therefore, 70 parts by weight or more is preferable, and more preferably 80 to 90 parts by weight.
Good by weight.

【0013】また、充填剤を溶解する溶剤としては、層
間絶縁膜を劣化させずに充填剤を溶解できる溶剤が好ま
しく、酸性溶液としては例えば2.0〜5.0wt%のH
Clもしくは0.5〜3.0wt%のH2SO4溶液、アル
カリ性溶液としては2.5〜5.0wt%のNa0H溶液
が好ましい。使用する溶剤の選択は、充填剤の種類によ
って選定することが重要である。炭酸カルシウムの場合
はHCl、H2SO4が適当であり、水酸化アルミニウム
の場合NaOHが適当である。HClの場合好ましい濃
度は2.0wt%以上であり、更に好ましくは3.0〜
4.0wt%が良い。また、H2SO4の場合、好ましく
は0.5wt%以上であり、更に好ましくは1.0〜2.
0wt%が良い。そしてNaOHの場合、好ましくは
2.5wt%以上であり、更に好ましくは3.0〜4.0
wt%が良い。
The solvent for dissolving the filler is preferably a solvent capable of dissolving the filler without deteriorating the interlayer insulating film, and the acidic solution may be, for example, 2.0 to 5.0 wt% H.
Cl or 0.5~3.0Wt% solution of H 2 SO 4, preferably Na0H solution 2.5~5.0Wt% as alkaline solution. It is important to select the solvent to be used depending on the type of the filler. In the case of calcium carbonate, HCl and H 2 SO 4 are suitable, and in the case of aluminum hydroxide, NaOH is suitable. In the case of HCl, the preferred concentration is 2.0 wt% or more, and more preferably 3.0 to 3.0 wt%.
4.0 wt% is good. In the case of H 2 SO 4, the content is preferably 0.5 wt% or more, and more preferably 1.0 to 2.0 wt%.
0 wt% is good. In the case of NaOH, the content is preferably 2.5% by weight or more, and more preferably 3.0 to 4.0%.
wt% is good.

【0014】また、層間絶縁膜を構成する材料として
は、耐熱性の他に耐無電解金属めっき性を有しているこ
とが望ましい。導通回路パターンを形成する無電解銅め
っきは、無電解ニッケルめっきに比べ析出速度は一般的
に遅い(無電解銅めっきは、ニッケルめっきの約1/3
の速度)。したがって、必要なめっき厚を得るためには
高温で、しかも高pHの環境の中で長時間浸漬しなけれ
ばならない(対象製品のプリント基板の仕様によっても
異なるが、約10時間程度)。それ故、層間絶縁膜はこ
れらの過酷な状況でも層間絶縁膜としての特性が劣化し
ない強固なものを使用することが必要である。かかる観
点から実用に供される代表的なものとして例えばエポキ
シ樹脂やポリイミド樹脂等が挙げられる。
It is desirable that the material constituting the interlayer insulating film has not only heat resistance but also electroless metal plating resistance. The deposition rate of electroless copper plating for forming a conductive circuit pattern is generally lower than that of electroless nickel plating (electroless copper plating is about 1/3 of nickel plating).
Speed). Therefore, in order to obtain the required plating thickness, it must be immersed in an environment of high temperature and high pH for a long time (about 10 hours depending on the specifications of the printed circuit board of the target product). Therefore, it is necessary to use a strong interlayer insulating film that does not deteriorate its properties as an interlayer insulating film even in these severe situations. From this viewpoint, typical resins practically used include, for example, epoxy resins and polyimide resins.

【0015】ここで本発明の目的達成手段についてさら
に具体的に説明すると、上記目的は、第1の導通回路パ
ターンが配設されたプリント基板表面に層間絶縁膜を印
刷する工程と、リソグラフィー技術により前記層間絶縁
膜をパターニングして少なくとも前記導通回路パターン
の一部を露出させ前記層間絶縁膜に回路接続用の開口部
を形成する工程と前記パターニングされ回路接続用の
開口部が形成された層間絶縁膜を含む基板上に触媒を付
与する工程と前記層間絶縁膜の表面を研磨することに
より層間絶縁膜上の触媒を除去して前記開口部に触媒を
選択的に残す研磨工程と前記開口部を含む基板上の触
媒残存領域に銅めっきを施し第2の導通回路パターンを
形成する工程とを有し、これらの工程を積層数に見合っ
て複数回繰返すビルドアップ方式にて製造するプリント
基板の製造方法であって、前記第1の導通回路パターン
が配設されたプリント基板表面に層間絶縁膜を印刷する
工程においては、予め充填剤を分散させた耐熱性樹脂
層間絶縁膜を印刷し、前記層間絶縁膜の表面を研磨する
ことにより前記層間絶縁膜上の触媒を除去して前記開口
部に触媒を選択的に残す研磨工程の後に、前記層間絶縁
膜の表層部に突出および埋没された前記充填剤を溶剤で
溶解除去して表面に凹凸を形成して表面積を増大させる
工程を付加し、かつ前記開口部を含む基板上の触媒残存
領域に銅めっきを施し第2の導通回路パターンを形成す
る工程を、前記触媒の活性化を含む前処理工程と無電
解ニッケルめっきによる下地めっき工程とその上に銅
を積層する無電解銅めっき工程とで構成して成るプリン
ト基板の製造方法により、達成される。
Here, the means for achieving the object of the present invention will be described more specifically. The object of the present invention is to provide an interlayer insulating film on a surface of a printed circuit board on which a first conductive circuit pattern is provided.
Printing process and the interlayer insulation by lithography technology
Patterning the film to at least the conductive circuit pattern
A part for exposing a circuit connection opening in the interlayer insulating film.
Forming a, for the patterned circuit connection
And applying a catalyst on a substrate comprising an interlayer insulating film in which an opening is formed, the catalyst in the opening by removing the catalyst on the interlayer insulating film by polishing the surface of the interlayer insulating film
A polishing step of selectively leaving, touch on the substrate including the opening
Forming a second conductive circuit pattern by applying copper plating to the remaining medium region, and manufacturing the printed circuit board by a build-up method in which these steps are repeated a plurality of times in accordance with the number of layers. , The first conductive circuit pattern
There in the step of printing an interlayer insulation film disposed the surface of the printed circuit board, and printed <br/> interlayer insulating film of a heat resistant resin having dispersed in advance filler, polishing the surface of the interlayer insulating film
It said opening to remove the catalyst on the interlayer insulating film by
After the polishing step that selectively leaves the catalyst in the part,
The filler protruding and buried in the surface layer of the film is dissolved and removed with a solvent to form irregularities on the surface to increase the surface area.
Steps are added, and catalyst remains on the substrate including the opening.
Copper plating is applied to the region to form a second conductive circuit pattern
That step, the pretreatment step involves activation of the catalyst, a base plating process by electroless nickel plating, the manufacturing method of the printed substrate formed constituted by the electroless copper plating step of laminating the copper thereon Is achieved.

【0016】上記の後のめっき工程で導通回路パター
ンを積層形成する以外の層間絶縁膜の表面領域を研磨し
て前記触媒を除去する工程としては、例えばその表面に
対して羽布、ブラシ、ホーニングのような機械的な研磨
を施すことが望ましい。
The step of polishing the surface area of the interlayer insulating film other than forming the conductive circuit pattern in the subsequent plating step to remove the catalyst includes, for example, a cloth, a brush, a honing It is desirable to perform mechanical polishing such as

【0017】[0017]

【作用】導通回路パターンが配設されたプリント基板表
面に積層形成された層間絶縁膜には充填剤が分散されて
いるため、溶剤で表面処理を行なうと少なくともこの表
層部の充填剤が選択的に溶解し、その表面層には均一で
緻密な粗化面体が形成される。この粗化面体が、その上
に積層される層間絶縁膜との、また、層間絶縁膜と導通
回路パターンとの密着性を良好にする。特に、層間絶縁
膜の表面を羽布、ブラシ、研磨剤を含有した溶液をブラ
シに噴射しながら研磨する処理(ホーニングと呼称)の
ような機械的な研磨処理を施した場合には、その表面に
充填剤が突出するため充填剤の溶解をより容易にする
共に、開口部以外の触媒を除去する
Since the filler is dispersed in the interlayer insulating film formed on the surface of the printed circuit board on which the conductive circuit pattern is provided, at least the filler in the surface layer portion is selectively obtained by performing a surface treatment with a solvent. And a uniform and dense roughened surface is formed on the surface layer. This roughened surface body improves the adhesion between the interlayer insulating film and the conductive circuit pattern, and between the interlayer insulating film and the conductive circuit pattern. In particular, when the surface of the interlayer insulating film is subjected to a mechanical polishing process such as a process of polishing the brush while spraying a solution containing a rag, a brush, and an abrasive (referred to as honing), When filler is easier dissolution of the filler for projecting
In both cases, the catalyst other than the openings is removed .

【0018】[0018]

【実施例】以下、本発明の一実施例を図面を用いて説明
する。図2は、本発明のプリント基板の製造方法の一例
を説明する断面工程図であり、以下、図示の工程(a)
〜(h)にしたがい、その内容を順次説明する。
An embodiment of the present invention will be described below with reference to the drawings. FIG. 2 is a cross-sectional process diagram illustrating an example of a method of manufacturing a printed circuit board according to the present invention.
According to (h), the contents will be sequentially described.

【0019】工程(a):導通回路パターン2を銅張り
積層板1に形成する。その上に、炭酸塩の充填剤を含有
した第1層目の層間絶縁膜3をスプレー、ローラー、ス
クリーン塗布等の方式で全面に印刷する。なお、層間絶
縁膜の絶縁材としてはエポキシ樹脂、ポリイミド樹脂等
の耐熱性樹脂を用い、充填剤としての炭酸塩は、平均粒
径3〜6μmのものを用い、印刷前の樹脂中に80〜9
0重量部を良く分散させた。
Step (a): A conductive circuit pattern 2 is formed on the copper-clad laminate 1. A first interlayer insulating film 3 containing a carbonate filler is printed on the entire surface by spraying, roller coating, screen coating or the like. In addition, a heat-resistant resin such as an epoxy resin or a polyimide resin is used as an insulating material of the interlayer insulating film, and a carbonate having a mean particle size of 3 to 6 μm is used as a filler. 9
0 parts by weight were well dispersed.

【0020】工程(b):さらに所定パターンを有する
マスクを用い周知のリソグラフィー技術により、図示の
ように層間絶縁膜3のパターニングを行なった。すなわ
ち、マスクを密着させた後、超高圧水銀灯を具備した露
光機を用い、紫外光を400〜800mj/cm2照射し
て露光し、さらに、1,1,1−トリクロロエタンのよう
な有機溶剤を現像液として未露光部を溶解除去し、現像
する。このようにしてパターン化された第1層の層間絶
縁膜3を熱処理にて硬化させる。図中の2aはランド部
を示し、回路接続のために上部の絶縁膜が除去され、導
通回路パターン2の一部が露出している。また、2bは
絶縁膜3が被覆された回路パターン部を示している。次
いで、めっき触媒6(Pd−Snのコロイド)を含んだ
溶液に浸漬し、基材および導通回路パターン表面に固着
させ、後の工程で行なうNiめっきの析出反応が容易に
行えるようにする。
Step (b): Using a mask having a predetermined pattern, the interlayer insulating film 3 was patterned by a well-known lithography technique as shown in the figure. That is, after the mask is brought into close contact with the mask, exposure is performed by irradiating ultraviolet light at 400 to 800 mj / cm 2 using an exposure machine equipped with an ultra-high pressure mercury lamp, and further, an organic solvent such as 1,1,1-trichloroethane is removed. The unexposed portion is dissolved and removed as a developer and developed. The first interlayer insulating film 3 thus patterned is cured by heat treatment. In the figure, reference numeral 2a denotes a land portion. The upper insulating film is removed for circuit connection, and a part of the conductive circuit pattern 2 is exposed. Reference numeral 2b denotes a circuit pattern portion covered with the insulating film 3. Next, it is immersed in a solution containing a plating catalyst 6 (a colloid of Pd-Sn), and is fixed to the substrate and the surface of the conductive circuit pattern, so that the deposition reaction of Ni plating performed in a later step can be easily performed.

【0021】工程(c):前工程でパターン化された第
1層の層間絶縁膜3の表面をホーニング処理で研磨し、
触媒6を除去すると共に層間絶縁膜表面の充填剤を露出
させる。その後、15〜20℃の2.0〜5.0wt%H
Cl溶液に1〜2分浸漬して露出した表層部の充填剤を
溶解除去する。
Step (c): The surface of the first-layer interlayer insulating film 3 patterned in the previous step is polished by a honing process,
The catalyst 6 is removed and the filler on the surface of the interlayer insulating film is exposed. Thereafter, 2.0 to 5.0 wt% H at 15 to 20 ° C.
The exposed surface layer filler is dissolved and removed by immersion in a Cl solution for 1 to 2 minutes.

【0022】工程(d):無電解Niめっきの前処理と
して、無機酸による脱脂処理(奥野製薬工業(株)製の
脱脂溶液、商品名「ICPクリーン91」を使用)と無
機酸系の活性溶液(同じく商品名「ICPアクセラ」)
で触媒の表面処理を施した後、図示のとおり工程(c)
で触媒6を残した領域(ホーニング処理を施さなかった
領域)に選択的に無電解Niめっき9を1.0μm析出
させる(無電解Niめっき液は同じく商品名「ICPニ
コロン」を使用)。
Step (d): As a pretreatment for electroless Ni plating, a degreasing treatment with an inorganic acid (using a degreasing solution manufactured by Okuno Pharmaceutical Co., Ltd., trade name "ICP Clean 91") and an activity of an inorganic acid system Solution (also trade name "ICP Axela")
After performing the surface treatment of the catalyst in step (c) as shown in the drawing.
Then, 1.0 μm of the electroless Ni plating 9 is selectively deposited in the region where the catalyst 6 is left (the region where the honing treatment has not been performed) (the same electroless Ni plating solution is used under the trade name of “ICP Nicolon”).

【0023】工程(e):良く知られたS社の無電解銅
めっき液を用いてNiめっき9の上に無電解銅めっき7
を20μm析出させる。これで第1層目の導通回路パタ
ーンの形成が終了した。
Step (e): Electroless copper plating 7 on Ni plating 9 using a well-known electroless copper plating solution of Company S
Is precipitated by 20 μm. This completes the formation of the first-layer conductive circuit pattern.

【0024】工程(f):先ず、第2層の層間絶縁膜3
aを上記工程(a)と同様に印刷する。次いで、工程
(b)と同様の手法で層間絶縁膜3aのパターニングと
触媒6の付与を行なう。
Step (f): First, the second-layer interlayer insulating film 3
a is printed in the same manner as in the step (a). Next, patterning of the interlayer insulating film 3a and application of the catalyst 6 are performed in the same manner as in the step (b).

【0025】工程(g):上記工程(c)と同様の手法
で図示のように表面の触媒をホーニング処理で研磨、除
去し、層間絶縁膜3a表面の充填剤を露出させ、HCl
溶液に浸漬して露出した表層部の充填剤を溶解除去す
る。
Step (g): The surface catalyst is polished and removed by a honing process as shown in the drawing in the same manner as in the step (c) to expose the filler on the surface of the interlayer insulating film 3a, and HCl is added.
The exposed surface layer of the filler is dissolved and removed by immersion in the solution.

【0026】工程(h):上記工程(d)と工程(e)
を行い、所定領域に無電解Niめっき9aと無電解銅め
っき7aを行なう。これで図示のように第2層目の導通
回路パターンの形成が終了した。
Step (h): The above steps (d) and (e)
And electroless Ni plating 9a and electroless copper plating 7a are performed on predetermined regions. This completes the formation of the second-layer conductive circuit pattern as shown.

【0027】この後、上記工程(a)〜工程(e)を必
要とする層数だけ繰り返せば、所望の層数にビルドアッ
プした積層プリント基板を実現することができる。
Thereafter, by repeating the above steps (a) to (e) for the required number of layers, a laminated printed board built up to a desired number of layers can be realized.

【0028】図3は工程(h)の後に、さらに上記工程
(a)〜工程(e)を1サイクル繰返したものであり、
3層目の層間絶縁膜3bと無電解Niめっき9bと無電
解銅めっき7bとを有する3層構造のプリント基板とし
たものである。
FIG. 3 shows that the above steps (a) to (e) are further repeated one cycle after the step (h).
The printed circuit board has a three-layer structure including a third interlayer insulating film 3b, electroless Ni plating 9b, and electroless copper plating 7b.

【0029】このようにして得られた積層プリント基板
においては、層間絶縁膜3と導通回路および層間絶縁膜
間の密着性、すなわちピール強度が従来に増して向上
し、各接続部の信頼性が格段に改善された。
In the multilayer printed circuit board thus obtained, the adhesion between the interlayer insulating film 3 and the conductive circuit and the interlayer insulating film, that is, the peel strength is improved more than before, and the reliability of each connection portion is improved. It has been greatly improved.

【0030】なお、充填剤を上記炭酸塩の代わりに硫酸
カルシウムを用いても同様の結果が得られた。
Similar results were obtained when calcium sulfate was used instead of the above carbonate as the filler.

【0031】[0031]

【発明の効果】上述したように、本発明により所期の目
的を達成することができた。すなわち、本発明のプリン
ト基板の層間絶縁膜の表面には、均一で緻密な粗化面体
が形成されているため構造的に、その上に積層される層
間絶縁膜や導通回路パターンとの密着性、すなわち、ピ
ール強度が格段に向上する。したがって、層間絶縁膜上
の導通回路パターンの細線化が可能になるためより高密
度な配線が形成できる。
As described above, the intended object has been achieved by the present invention. That is, since a uniform and dense roughened surface is formed on the surface of the interlayer insulating film of the printed circuit board of the present invention, it is structurally adherent to the interlayer insulating film or conductive circuit pattern laminated thereon. That is, the peel strength is remarkably improved. Therefore, the conductive circuit pattern on the interlayer insulating film can be thinned, so that a higher-density wiring can be formed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】従来のプリント基板の製造工程例を示す概略断
面工程図。
FIG. 1 is a schematic cross-sectional process diagram showing an example of a conventional printed circuit board manufacturing process.

【図2】本発明の一実施例となるプリント基板の製造工
程を示す概略断面工程図。
FIG. 2 is a schematic cross-sectional process diagram showing a process of manufacturing a printed circuit board according to an embodiment of the present invention.

【図3】本発明の一実施例となる3層構造を有するプリ
ント基板の完成断面図。
FIG. 3 is a completed sectional view of a printed circuit board having a three-layer structure according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1…回路形成された銅張り積層板、 2…導通
回路パターン、2a…ランド部、
2b…回路パターン部、3…層間絶縁膜(第1
層)、 3a…層間絶縁膜(第2層)、3
b…層間絶縁膜(第3層)、 4…膨潤
層、5…粗化面体、 6…
触媒、7…銅めっき(第1層)、 7a
…銅めっき(第2層)、7b…銅めっき(第3層)、
8…銅めっきふくれ部分、9…Niめっ
き(第1層)、 9a…Niめっき(第2
層)、9b…Niめっき(第3層)、10…導通回路パ
ターンの形成予定領域。
1 ... a copper-clad laminate formed with a circuit, 2 ... a conductive circuit pattern, 2a ... a land portion,
2b: circuit pattern portion, 3: interlayer insulating film (first
Layer), 3a ... interlayer insulating film (second layer), 3
b: interlayer insulating film (third layer), 4: swelling layer, 5: roughened surface, 6:
Catalyst, 7: Copper plating (first layer), 7a
... copper plating (second layer), 7b ... copper plating (third layer),
8: Copper plating blister, 9: Ni plating (first layer), 9a: Ni plating (second layer)
Layer), 9b: Ni plating (third layer), 10: Area where conductive circuit pattern is to be formed.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 浜岡 伸夫 神奈川県横浜市戸塚区戸塚町216番地 株式会社日立製作所 情報通信事業部内 (56)参考文献 特開 平2−188992(JP,A) 特開 昭61−252698(JP,A) 特開 平3−171794(JP,A) 特開 昭63−153894(JP,A) (58)調査した分野(Int.Cl.6,DB名) H05K 3/46 H05K 3/38 ──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Nobuo Hamaoka 216 Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture, Hitachi, Ltd. Information Communication Division (56) References JP-A-2-188992 (JP, A) JP-A-61-252698 (JP, A) JP-A-3-171794 (JP, A) JP-A-63-153894 (JP, A) (58) Fields investigated (Int. Cl. 6 , DB name) H05K 3 / 46 H05K 3/38

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】第1の導通回路パターンが配設されたプリ
ント基板表面に層間絶縁膜を印刷する工程と、リソグラ
フィー技術により前記層間絶縁膜をパターニングして少
なくとも前記導通回路パターンの一部を露出させ前記層
間絶縁膜に回路接続用の開口部を形成する工程と前記
パターニングされ回路接続用の開口部が形成された層間
絶縁膜を含む基板上に触媒を付与する工程と前記層間
絶縁膜の表面を研磨することにより層間絶縁膜上の触媒
を除去して前記開口部に触媒を選択的に残す研磨工程
前記開口部を含む基板上の触媒残存領域に銅めっき
を施し第2の導通回路パターンを形成する工程とを有
し、これらの工程を積層数に見合って複数回繰返すビル
ドアップ方式にて製造するプリント基板の製造方法であ
って、前記層間絶縁膜には 予め充填剤を分散せしめておき、こ
の絶縁膜を硬化させた後、少なくともその表層部に突出
および埋没している前記充填剤を溶剤で溶解除去して、
表面に凹凸を形成して表面積を増大させる工程を有し
成るプリント基板の製造方法。
A step of printing an interlayer insulating film on a surface of a printed circuit board on which a first conductive circuit pattern is provided ;
The interlayer insulating film is patterned by
At least part of the conductive circuit pattern
Forming an opening for circuit connection in the inter-insulating film ;
And applying a catalyst on a substrate comprising a patterned inter-layer insulating film having an opening formed for connecting circuits, the opening of the interlayer insulating film surface to remove the catalyst on the interlayer insulating film by polishing the a polishing process leaving the catalyst selectively in parts, copper plating catalyst remaining region on the substrate including the opening
Forming a second conductive circuit pattern, and repeating the steps a plurality of times in accordance with the number of laminations by a build-up method, wherein the interlayer insulating film Is preliminarily dispersed filler, and after curing this insulating film, at least the filler protruding and buried in the surface layer portion is dissolved and removed with a solvent,
A method for manufacturing a printed circuit board, comprising a step of increasing surface area by forming irregularities on a surface.
【請求項2】第1の導通回路パターンが配設されたプリ
ント基板表面に層間絶縁膜を印刷する工程と、リソグラ
フィー技術により前記層間絶縁膜をパターニングして少
なくとも前記導通回路パターンの一部を露出させ前記層
間絶縁膜に回路接続用の開口部を形成する工程と前記
パターニングされ回路接続用の開口部が形成された層間
絶縁膜を含む基板上に触媒を付与する工程と前記層間
絶縁膜の表面を研磨することにより層間絶縁膜上の触媒
を除去して前記開口部に触媒を選択的に残す研磨工程
前記開口部を含む基板上の触媒残存領域に銅めっき
を施し第2の導通回路パターンを形成する工程とを有
し、これらの工程を積層数に見合って複数回繰返すビル
ドアップ方式にて製造するプリント基板の製造方法であ
って、 前記第1の導通回路パターンが配設されたプリント基板
表面に層間絶縁膜を印刷する工程においては、予め充填
剤を分散させた耐熱性樹脂層間絶縁膜を印刷し、前記
層間絶縁膜の表面を研磨することにより前記層間絶縁膜
上の触媒を除去して前記開口部に触媒を選択的に残す研
工程の後に、前記層間絶縁膜の表層部に突出および埋
没された前記充填剤を溶剤で溶解除去して表面に凹凸を
形成して表面積を増大させる工程を付加し、かつ前記開
口部を含む基板上の触媒残存領域に銅めっきを施し第2
の導通回路パターンを形成する工程を、前記触媒の活性
化を含む前処理工程と無電解ニッケルめっきによる下
地めっき工程とその上に銅を積層する無電解銅めっき
工程とで構成して成るプリント基板の製造方法。
A step of printing an interlayer insulating film on a surface of the printed circuit board on which the first conductive circuit pattern is provided ;
The interlayer insulating film is patterned by
At least part of the conductive circuit pattern
Forming an opening for circuit connection in the inter-insulating film ;
And applying a catalyst on a substrate comprising a patterned inter-layer insulating film having an opening formed for connecting circuits, the opening of the interlayer insulating film surface to remove the catalyst on the interlayer insulating film by polishing the a polishing process leaving the catalyst selectively in parts, copper plating catalyst remaining region on the substrate including the opening
Alms and forming a second conductive circuit pattern, there these steps a method of making a printed circuit board manufacturing in the build-up method is repeated multiple times commensurate with the number of laminated layers, the first conduction in the step of printing an interlayer insulating film on the surface of the printed circuit board on which a circuit pattern is arranged to print an interlayer insulating film in the heat-resistant resin is dispersed in advance filler, by polishing the surface of the interlayer insulating film The interlayer insulating film
The upper catalyst is removed and the catalyst is selectively left in the opening.
After the polishing step, the filler protruded and buried in the surface portion of the interlayer insulating film is dissolved and removed with a solvent to form irregularities on the surface.
Forming and increasing the surface area.
Copper plating is applied to the catalyst remaining area on the substrate including the opening, and the second
A step of forming a conductive circuit pattern, and constituted by a pretreatment step comprising the activation of the catalyst, a base plating process by electroless nickel plating, an electroless copper plating step of laminating the copper thereon Manufacturing method of printed circuit board.
JP3313792A 1992-02-20 1992-02-20 Printed circuit board manufacturing method Expired - Fee Related JP2902849B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3313792A JP2902849B2 (en) 1992-02-20 1992-02-20 Printed circuit board manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3313792A JP2902849B2 (en) 1992-02-20 1992-02-20 Printed circuit board manufacturing method

Publications (2)

Publication Number Publication Date
JPH05235545A JPH05235545A (en) 1993-09-10
JP2902849B2 true JP2902849B2 (en) 1999-06-07

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Application Number Title Priority Date Filing Date
JP3313792A Expired - Fee Related JP2902849B2 (en) 1992-02-20 1992-02-20 Printed circuit board manufacturing method

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Country Link
JP (1) JP2902849B2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI462672B (en) * 2013-02-08 2014-11-21 Ichia Tech Inc Precursor plate, flexible circuit board and process for producing the same

Also Published As

Publication number Publication date
JPH05235545A (en) 1993-09-10

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