JP2906815B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device, wherein a wiring connected to a semiconductor substrate is mainly composed of an aluminum alloy containing silicon, and a refractory metal layer or a refractory intermetallic alloy layer is formed thereon. The present invention relates to a method for manufacturing a wiring having:

[0002]

2. Description of the Related Art As the degree of integration of a semiconductor device increases, the wiring becomes thinner, and the problem of reliability that disconnection easily occurs due to electromigration or stress migration is increasing. In order to solve these problems, the wiring structure has changed from a single-layer wiring of an aluminum alloy containing silicon to the adoption of a laminated structure of this aluminum alloy and a refractory metal or an alloy containing a refractory metal.

Referring to FIG . 4 , which is a cross-sectional view of one example of a semiconductor device having a single-layer wiring, a semiconductor device using the above-described technique is described.
First, the wiring of the semiconductor device of the layer wiring is first formed on the silicon substrate 20.
1, a contact hole is formed in the silicon oxide film 202, and then titanium 203, titanium nitride 204, aluminum-silicon alloy 205a, and titanium-tungsten alloy 207a are sequentially formed on the entire surface. The wiring is formed by patterning the four-layered film.

Referring to FIG . 5 which is a cross-sectional view of one example of a semiconductor device having a two-layer wiring, the wiring of a two-layer wiring semiconductor device using the above-described technique is first formed on the surface of a silicon substrate 201. After a silicon oxide film 202 is formed on the silicon oxide film 202 and a contact hole is formed in the silicon oxide film 202, a tungsten silicide 208 and an aluminum-silicon alloy 205a are sequentially deposited on the entire surface.
The first layer wiring is formed by patterning the layer film. Next, after a plasma silicon oxide film 210 is deposited on the entire surface, a through hole is formed in the plasma silicon oxide film 210 to reach the first layer wiring, and a titanium / tungsten alloy 207b and an aluminum / silicon alloy 205b are deposited on the entire surface. The film is patterned to form a second layer wiring.

[0005] Such a conventional wiring structure is disclosed in Solid State Technology, February 1986, 131.
136 pages (Solid State Techn)
org., February 1986, pp. 147-64. 13
According to the report of Nos. 1 to 136), silicon in an aluminum alloy is extremely active, and then reacts with a high melting point metal or a high melting point intermetallic alloy by a subsequent heat treatment.
The concentration of silicon in the aluminum alloy is substantially reduced.

That is, the titanium-tungsten alloy 207a in FIG. 4 and the titanium-tungsten alloy 207 in FIG.
The tungsten alloy 207b reacts with the aluminum to form TiAl ₃ first. Thereafter, the TiAl ₃ reacts with the silicon to form Ti ₅ Al ₇ Si _{12 and the} like. Therefore, the aluminum-silicon alloy 205a in FIG. 4, the aluminum-silicon alloy 205a in FIG.
The silicon in 5b is consumed, and the silicon concentration in the aluminum alloy decreases.

In particular, when the silicon concentration in the aluminum-silicon alloy 205a in FIGS . 4 and 5 decreases, a barrier metal such as titanium nitride 204 ( FIG. 4 ) and tungsten silicide 208 ( FIG. 5 ) exists. However, at the time of heat treatment at 450 ° C. or more, the silicon / silicon substrate 201 is removed from the aluminum / silicon alloy 205a (see FIG.
4 and 5 ), a problem arises in that silicon diffuses into the silicon substrate 201 to break a junction (not shown) formed in the silicon substrate 201.

In order to solve such a problem, it has been practiced to use nitride layers thereof instead of high melting point metals or high melting point intermetallic alloys.

[0009]

As described above, in the conventional wiring structure, the specific resistance of the wiring is increased because a high melting point metal nitride film or a high melting point intermetallic alloy nitride film is used. For this reason, the wiring in which these and an aluminum alloy are laminated has a problem that the electromigration resistance and the stress migration resistance are inferior to those of the wiring in which a high-melting metal or a high-melting intermetallic alloy and an aluminum alloy are laminated. is there.

Further, even if an attempt is made to form a metal layer on a refractory metal nitride film or a refractory intermetallic alloy nitride film by a selective CVD method, it is difficult to selectively grow these nitride films because of their low electron donating property. There is a problem that is. For example, as shown in FIG. 6 , even if a titanium nitride / tungsten 206 is formed on a silicon oxide film 202 on a silicon substrate 201 and a tungsten 213 is grown on the titanium nitride / tungsten 206 by a selective CVD method. As described above, the surface shape of the tungsten 213 is very uneven, and it is impossible to apply it to products.

[0011]

According to a method of manufacturing a semiconductor device of the present invention, a method of manufacturing a wiring of a semiconductor device in which a wiring connected to a silicon substrate is mainly composed of an aluminum alloy containing silicon as a main component, comprises the steps of: formed, to form an aluminum alloy containing silicon, the upper layer of aluminum alloy containing silicon, a refractory metal nitride layer over the refractory metal layer, or through the nitride film of a high melting point intermetallic alloy refractory intermetallic Forming an alloy layer and comprising
Patterning the laminated conductor film .

[0012]

Next, the present invention will be described with reference to the drawings.

Referring to FIG. 1, which is a cross-sectional view of a semiconductor device having one layer of wiring, a first embodiment of the present invention is to form a silicon oxide film 102 on the surface of a silicon substrate 101, After forming a contact hole in 102, titanium 103, titanium nitride 1
04, an aluminum-silicon alloy 105a, a titanium-nitride-tungsten alloy 106a, and a titanium-tungsten alloy 107a are sequentially deposited, and the five-layer film is patterned to form a first-layer wiring.

The thickness of the titanium 103 is 10 to 1000
nm, which is provided to reduce the contact resistance of the wiring. The thickness of the titanium nitride 104 is 50 to 2
00 nm, which functions as a barrier metal for preventing interdiffusion between silicon and aluminum. The thickness of the aluminum / silicon alloy 105a is 400 to 150
0 nm, which is a main wiring material. The thickness of the titanium-tungsten alloy 107a is 50 to 200 n
m, which contributes to the improvement of the stress migration resistance. Titanium nitride-tungsten alloy 106
The thickness a is 30 to 100 nm. The presence of the titanium nitride-tungsten alloy 106a suppresses the occurrence of the phenomenon that the aluminum-silicon alloy 105a reacts with the titanium-tungsten alloy 107a and lowers the concentration of silicon in aluminum, and causes the destruction of the joint due to the heat treatment. No longer.

[0015]

[0016]

Referring to FIG . 2 , which is a cross-sectional view of another semiconductor device having a two-layer wiring, a second embodiment of the present invention is such that the first-layer wiring is formed of tungsten silicide 108, aluminum-silicon alloy 105a, Tungsten 11
1 and tungsten 112. Tungsten 112 is formed by sputtering. The film thicknesses of the tungsten nitride 111 and the tungsten 112 are substantially the same as those of the titanium nitride-tungsten alloy 106a and the titanium-tungsten alloy 107a in the first embodiment. After a plasma silicon oxide film 110 is deposited on the entire surface, a through hole reaching the above-mentioned first layer wiring is provided in this. Next, selective LP
The tungsten 113 is grown by the CVD method, and the through holes are buried. Subsequently, a second layer wiring is formed by the aluminum / silicon alloy 105b.

In this embodiment, tungsten nitride 1
11 prevents a reaction between silicon in the aluminum-silicon alloy 105a and tungsten 112,113.
Further, in this embodiment, as shown in FIG. 3 , since the underlayer of the tungsten 113 formed by selective growth is tungsten 111 formed by sputtering, it is possible to obtain the tungsten 113 having high electron donating property and good selectivity and having few surface irregularities. Can be.

[0019]

[0020]

[0021]

As described above, according to the present invention, the wiring of the first layer connected to the semiconductor substrate is mainly composed of an aluminum alloy containing silicon, and a refractory metal layer,
Alternatively, in order to form a high melting point metal nitride film or a high melting point intermetallic alloy nitride film before forming the high melting point intermetallic alloy layer, silicon in an aluminum alloy containing silicon constituting the wiring of the first layer is formed. It is possible to prevent a reaction between the upper layer of the high melting point metal or the high melting point intermetallic alloy, and to prevent the destruction of the junction formed on the silicon substrate.

Further, since the uppermost layer of the first layer wiring having a laminated structure is formed of a high melting point metal or a high melting point intermetallic alloy, for example, a through hole between the second layer and the second layer is formed. The selective growth of the metal film for constituting is facilitated.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view for explaining a first embodiment of the present invention.

FIG. 2 is a sectional view for explaining a second embodiment of the present invention.

FIG. 3 is a diagram for explaining the effect of the second embodiment of the present invention;
It is sectional drawing.

FIG. 4 shows a conventional method of manufacturing a semiconductor device having one layer of wiring.
It is sectional drawing for demonstrating a method.

FIG. 5 shows a conventional method for manufacturing a semiconductor device having two layers of wiring.
It is sectional drawing for demonstrating a method.

FIG. 6 illustrates a problem of a conventional semiconductor device manufacturing method.
FIG.

[Explanation of symbols]

101, 201 Silicon substrate 102, 202 Silicon oxide film 103, 203 Titanium 104, 204 Titanium nitride 105a, 105b, 205a, 205b Aluminum silicon alloy 106a , 206 Titanium nitride tungsten 107a , 207a, 207b Titanium tungsten 108, 208 Tungsten Silicide 110, 210 Plasma silicon oxide film 111 Tungsten nitride 112, 113, 213 Tungsten

Claims (4)

(57) [Claims] An insulating film covering a surface of a silicon substrate is provided.
A wiring connected to the silicon substrate through the contact hole provided , wherein the insulating film is formed on a surface of the silicon substrate, wherein the insulating film is formed on a surface of the silicon substrate.
Forming the contact hole in the film, and forming a conductive barrier layer and aluminum containing silicon on the entire surface.
Alloy, refractory metal nitride film and refractory metal layer sequentially
The refractory metal layer, the refractory metal nitride film, the silicon
Aluminum alloy film containing the conductive layer and the conductive barrier layer
Forming the wiring by patterning sequentially . 2. The method according to claim 2, wherein a part of the upper surface of the wiring is selectively metallized.
2. The semiconductor device according to claim 1, further comprising a step of forming a layer.
Production method. 3. An insulating film covering a surface of a silicon substrate.
A wiring connected to the silicon substrate through the contact hole provided , wherein the insulating film is formed on a surface of the silicon substrate, wherein the insulating film is formed on a surface of the silicon substrate.
Forming the contact hole in the film, and forming a conductive barrier layer and aluminum containing silicon on the entire surface.
Alloy, nitrided film of refractory intermetallic alloy and refractory metal
Forming an alloy layer sequentially, said high melting point intermetallic alloy layer, said high melting point
Intermetallic alloy nitride film, aluminum containing silicon
Patterning the gold film and the conductive barrier layer sequentially,
Forming the wiring . 4. The method according to claim 1, wherein a part of the upper surface of the wiring is selectively metallized.
4. The semiconductor device according to claim 3, further comprising a step of forming a layer.
Production method.