JP2908536B2 - Semiconductor circuit simulation system - Google Patents

Description

Detailed Description of the Invention [Table of Contents] Overview Industrial application Field of the Invention Problems to be Solved by the Invention Means for Solving the Problems (FIG. 1) Action Embodiment (a) One Embodiment of the Invention (FIGS. 2 to 7) (b) Another embodiment of the present invention (FIGS. 8 to 10) (c) Other embodiments of the present invention [Summary] Predetermined specific relationship A semiconductor circuit simulation apparatus for inspecting the suitability of a circuit combination for a semiconductor circuit formed by connecting two circuits, the semiconductor circuit simulation being capable of easily and accurately determining the suitability of the combination of the two circuits in a simulation A semiconductor circuit formed by connecting a first circuit that outputs a control signal and a second circuit that operates based on the control signal, the first and second circuits are provided. In a semiconductor circuit simulation device for inspecting the suitability of the connection relation of each circuit, a storage means for storing each connection relation information set in advance for the connection of the first and second circuits; And a connection judging means for judging whether the combination of the first and second circuits is appropriate when the first and second circuits are connected.

[Industrial applications]

The present invention relates to a semiconductor circuit simulation apparatus for inspecting the suitability of a circuit combination for a semiconductor circuit formed by connecting two circuits having a predetermined specific relationship.

In recent years, there has been a semiconductor circuit formed by combining various circuit elements, and it is necessary to determine whether the combination of circuit elements is appropriate for this semiconductor circuit.

In particular, as semiconductor circuits become more highly integrated and more sophisticated, the combination of circuit elements becomes more complicated, making it difficult to determine the suitability of the combination of circuit elements. There is a need for a semiconductor circuit simulation apparatus that can reliably detect the suitability of a combination of circuit elements in such a semiconductor circuit through simulation.

[Conventional technology]

Conventionally, when performing a simulation of a semiconductor circuit in which two circuits as shown in FIGS. 4 and 5 are combined, these semiconductor circuits are actually operated, and from the operation result, an experienced person can use the two circuits. Was determined to be appropriate.

The semiconductor circuit of the fourth figure, the bias voltage v ₁ of the control signal from the bias circuit 10 is a first circuit second
Input to the operational amplifier 20 which is a circuit of
v output information D ₃ from the operational amplifier 20 on the basis of ₁ is output. By analyzing the output data D _3, to determine the appropriateness of the combination of the bias circuit 10 and the operational amplifier 20.

Further, in the above semiconductor circuit of FIG. 5, A-D converter 20 by the bias voltage v ₁ from the bias circuit 10
It is operated to determine the appropriateness of the circuit combined on the basis of the digital output D ₃ outputted from the A-D converter 20.

[Problems to be solved by the invention]

Since the simulation of the conventional semiconductor circuit has been performed as described above, it is impossible to judge the suitability of the combination of the two circuits unless the semiconductor circuit is actually operated. There was a problem that it could not be judged without knowledge and experience. That is, the control signal (bias voltage) output from the first circuit
Even if v ₁ ) has a slightly different value, the second circuit may operate, and it is difficult to determine whether the operation of the second circuit is a proper operation.

Further, since the judgment of the semiconductor circuit by the actual operation must be judged by a skilled person, it is necessary to visually judge the suitability of the combination of the two circuits on the circuit diagram without actually operating the semiconductor circuit. However, there has been a problem that the simulation time is enormous and the number of judgment errors increases.

The present invention has been made to solve the above problems,
It is an object of the present invention to provide a semiconductor circuit simulation apparatus capable of easily and accurately determining the suitability of a combination of two circuits on a simulation.

[Means for solving the problem]

 FIG. 1 is a diagram illustrating the principle of the present invention.

In the figure, a semiconductor circuit simulation apparatus according to the present invention provides a semiconductor circuit formed by connecting a first circuit that outputs a control signal and a second circuit that operates based on the control signal. And a semiconductor circuit simulation device for inspecting whether or not the connection relation of each of the second circuits is appropriate. A storage means for storing each connection information set in advance for the connection of the first and second circuits; And a connection judging means for judging whether the combination of the first and second circuits is appropriate when connecting the first and second circuits based on the above.

[Action]

In the present invention, the suitability of the combination of the two circuits is determined by judging the suitability of the combination of the first and second circuits based on the preset connection relationship information for the first and second circuits to be combined. Can be easily and accurately determined on a simulation. Further, it is possible to reduce the time for judging the suitability of the circuit combination.

〔Example〕

(A) One Embodiment of the Present Invention Hereinafter, the present embodiment will be described with reference to FIGS. FIG. 2 is a block diagram of the present embodiment, FIG. 3 is an explanatory diagram of information storage in a memory in the present embodiment, and FIGS.
The figure shows each circuit configuration diagram of the inspection target circuit.

In each of the drawings, the semiconductor circuit simulation apparatus according to the present embodiment includes two first and second circuits 1 to be combined.
The memory 1 that stores the connection relationship information D ₁ , D ₂ and the output information D ₃ of the second circuit 20 previously associated with the connection 0, 20, and the first and second circuits 10, 20 When connecting, the suitability of the combination of the first and second circuits 10 and 20 is determined based on the connection relationship information D ₁ and D _2, and when the combination is proper, the second circuit 20 it is configured to the and a connection determination unit 2 for outputting the output information D _3.

The connection determination unit 2 holds the voltage divider circuit 21 to a voltage v ₁ generates a partial pressure corresponding to the connection relationship information D ₁ of the first circuit, the voltage V ₂ of the connection relationship information D ₂ of the second circuit Register 22
The threshold value v ₂ + σ, v ₂ −σ is obtained by adding / subtracting the error allowable set value σ to / from the voltage v ₂ of the connection relation information D ₂ held in the register 22.
A / D converters 24 and 25 for converting the voltage v ₁ of the voltage dividing circuit 21 into digital signals based on thresholds v ₂ + σ and v ₂ −σ, and the A / D converter Two
Calculate the logical condition of each digital signal of 4 and 25 and calculate the voltage value v ₁
There the logic circuit 26 for outputting a detection signal by detecting whether or not included in the voltage value v ₂ + σ~v ₂ -σ, and output information register 27 for holding an output information D ₃ of the second circuit, The logic circuit
26 is configured to include a switch 28 for controlling the output of the output information D ₃ based on the detection signal of.

Next, the operation of the apparatus of this embodiment based on the above configuration will be described. First, a description will be given of a simulation for judging the suitability of the combination when the bias circuit 10 and the operational amplifier 20 are connected in combination as shown in FIG. In addition,
The bias circuit A10 and the operational amplifier A20 have a legally compatible combination relationship, and the connection relationship information D ₁ , D ₂
Is set in advance so as to have a relationship of voltage v ₁ = v ₂ (v _A1 = v _OA ). Also, bias circuit A10 and operational amplifier B20,
The combination relationship is incompatible with the operational amplifier C20, and the connection relationship information D ₁ and D ₂ are the voltages v ₁ ≠ v ₂ (v _A1 ≠ v _OB , v _A1 ≠ v
_OC ...) Are set in advance.

Hereinafter, the case where the combination of the bias circuit and the operational amplifier is appropriate and the case where the combination is inappropriate will be described.

When the combination is proper, the connection determination unit 2 includes a bias circuit A10 and an operational amplifier A20.
The connection relationship information D ₁ , D ₂ and output information D ₃ are read from the memory 1. The read connection relationship information D ₁ of the resistance value
R _A1 and R _A2 are set and input to the resistors R ₁ and R ₂ of the voltage dividing circuit 21, respectively, and v _{OA of the} connection relation information D ₂ is stored in the register 22. Furthermore, D _OA of the output information D _3, which is the read is stored in the output information register 27.

In this state, the resistance values R _A1 , R _A2
And outputs the voltage v _A1 obtained by dividing the power supply voltage V _d to the AD converters 24 and 25. The connection relationship information v _OA (= D ₂ ) of the operational amplifier A20 is input from the register 22 to each of the operational amplifiers 23A and 23B of the threshold generation unit 23, and the operational amplifier 23A
To generate a threshold value v _OA + σ, and the operational amplifier 23B
Generates a threshold value v _OA −σ.

The A / D converter 24 compares the voltage v _A1 with a threshold value v _OA + σ, and outputs an “L” level digital signal because v _A1 = v _OA and v _A1 <v _OA + σ. In addition, A
The -D converter 25 compares the voltage v _A1 with the threshold value v _OA -σ, and outputs an “H” level digital signal based on the above relationship.

The digital signal “H” from the AD converter 25 is
The NOT circuit 26A outputs the signal of “L” level to the NOR circuit 26B. The NOR circuit 26B obtains the NOR condition of the digital signal "L" from the A / D converter 24 and the digital signal "L" from the NOT circuit 26A, and uses the digital signal of "H" level as a control signal to switch 28. Output to

The switch 28 is turned on (ON state) by this “H” level control signal, and the output information D ₃ = v _OA of the operational amplifier A20 stored in the output information register 27 is output. V _OA by the bias circuit is the output information D ₃ of the normal of the operational amplifier A20
It can be determined on a simulation that A10 and the operational amplifier A20 are a legally compatible combination.

When the combination is incorrect, the connection determination unit 2 includes a bias circuit A10 and an operational amplifier B20.
The connection information D ₁ and D ₂ and the output information D ₄ are read from the memory 1. The read connection relationship information D ₁ of the resistance value
R _A1 and R _A2 are set and input to the resistors R ₁ and R ₂ of the voltage dividing circuit 21, respectively, and the voltage dividing circuit 21 divides and outputs the voltage v _A1 .

The voltage v _OB of connection relationship information D ₂ is stored in the register 22, also D _OB output information D ₃ is stored in the output information register 27. The voltage v _OB is equal to each operational amplifier 2 of the threshold generation unit 23.
3A, are respectively inputted to 23B, the threshold v _OB at the operational amplifier 23A
+ Σ is generated, and a threshold v _OB is generated by the operational amplifier 23B.
−σ is generated.

The A / D converter 24 compares the voltage v _A1 with a threshold value v _OB + σ. This voltage is v _A1 ≠ v _OB . Here, when the magnitude relation of each voltage is v _A1 > v _OB , the relation of v _A1 > v _OB + σ is satisfied, so that an “H” level digital signal is output. . When v _A1 <v _OB , a relation of v _A1 <v _OB + σ is satisfied, so that an “L” level digital signal is output.

The A / D converter 25 outputs an “H” level digital signal when v _A1 > v _OB from the above relationship, and v _A1 <v _OB
In the case of, a digital signal of "L" level is output.

From the logic circuit 26 to which the digital signals “H” and “H” and “L” and “L” from the A / D converters 25 and 25 are input, the v _A1 > v _OB and v _A1 <v _OB of a control signal which is either "L" level digital signal in the case of output to the switch 28, the D _OB is the output information D ₃ from the output information register 27 and the switch 28 opened state (OFF state) The output will be blocked. Therefore, since the output information D _OA of the operational amplifier B20 is connected target from the connection determination unit 2 is not output, the bias circuit A10 and the operational amplifier A20 can be determined by the simulation that is improper combination.

Next, as shown in FIG. 5, when the bias circuit 10 and the A / D converter 20 are connected in combination, the bias circuits A, B,... And the A / D converters A, B,. Specific connection relationship information D ₁ , D ₂
Is set in advance, and the determination as to whether or not the circuit combination is appropriate can be made on a simulation in the same manner as described above.

Also, as shown in FIG. 6, the case where the MOSFETs Q ₁ and Q ₂ constituting the current mirror circuit are connected in combination can be determined by simulation in the same manner as described above. Incidentally, the current mirror circuit is that the current I ₁ corresponding to the ratio of the MOSFET channel widths W _1, W ₂ by the gate voltage v ₁ from compatible MOSFET Q _1, I ₂ is determined.

Further, as shown in FIG. 7, the bias circuit 10 and the ECL (ECL
Also in the case of connecting with the combination of the mitter coupled logic 20, it is possible to judge the suitability / incompatibility of the combination of the circuits by simulation in the same manner as described above.

(B) Another embodiment of the present invention FIG. 8 shows another embodiment of the present invention. Here, the bias circuit A generates _a voltage v _a by voltage division by a resistor, and the operational amplifier circuit B includes two 1-bit ADCs (comparators) and an inverter 1
, One NOR and one switch, and the switch is turned ON only when the input voltage is v _a . Therefore the input voltage v (when the bias circuit A is used as a bias circuit) when _a only operational amplifier A is output normally.

On the other hand, if the bias circuit A to the operational amplifier circuit B as FIG. 9 is connected, the operational amplifier circuit B input voltage v _b
Is set so as to operate normally only at the time of, the voltage generated by the bias circuit A is turned off by v _a (≠ v _b ), and the output of the operational amplifier B is not output.
As a result, the circuit operates normally only when the operational amplifier circuit and the bias circuit match. Thus the voltage generated by the bias circuit (v ₁₎ and voltage operational amplifier circuit operates (v ₂₎ is present, the operational amplifier operates when the voltage v ₁ = v _2, v ₁ of ≠ v ₂ When the operational amplifier does not work.

In the above embodiment, the second circuit is an operational amplifier circuit, but may be used for a circuit other than the operational amplifier. A-D
It can be used for converters, DA converters and the like having a specific bias circuit. The bias voltage generated at this time may be outside the range of the power supply voltage at the time of operation of the bias circuit or the like. FIG. 10 shows an embodiment in the case of an AD converter. Circuit for the bias circuit C as with the operational amplifier circuit may includes generating a voltage v _c, A-D converter circuit C
Since the that are made from the circuit that operates only when the input voltage v _c,
Works fine.

Output information D ₃ of the second circuit 20 is stored in the memory 1 in other embodiments the embodiment of (c) present invention, the in the case where the combination of the circuit at the connection determination unit 2 is determined to fit it is configured to determine the presence or absence of adaptation to output the output information D _3, the digital signal "H" corresponds to the case where the combination of the circuit at the connection determination unit 2 is the case or incompatible matching, the "L" It is also possible to adopt a configuration in which the combination is output from the logic circuit 26 to determine the suitability of the combination. In this case it is not necessary to store the output information D ₃ of the second circuit in the memory 1.

In each of the above embodiments, the logic circuit 26 is a NOT circuit 26A and
Although the configuration includes the NOR circuit 26B, a configuration in which a logic circuit is configured by an EX-OR circuit and an exclusive OR condition is determined for each output of the A / D converters 24 and 25 to determine whether or not the circuit combination is appropriate. You can also.

Further, although the logic circuit 26 is constituted by the NOT circuit 26A and the NOR circuit 26B, the NOR circuit 26B is replaced with an AND circuit,
It can be composed of a circuit and a NOT circuit.

Further, in the above embodiment, the first circuit
The resistors R _A1 · R _B1 , R _A2 · R _B2 , which are ten connection relationship information D ₁ , ...
Stores, the connection relationship information _{R A1 · R B1, R A2} · R B2, enter the ... voltage dividing circuit 21 of the connection determination unit 2 has a configuration for outputting a predetermined voltage v _1, first The value of v ₁ corresponding to the type of the circuit 10 may be stored in the memory 1. In this case, it is not necessary to provide the voltage dividing circuit 21 in the connection determining section 1.

Furthermore, in each of the above embodiments, the error allowable set value σ in the threshold value generation unit 23 is set in advance as a fixed value, but the error allowable set value σ is variably set according to the characteristics of the circuit to be combined. It can also be configured. That is, by increasing (decreasing) the error allowable setting value σ, the error allowable range 2σ can be increased (decreased).

Also, for a constant voltage circuit that generates a constant voltage based on a predetermined bias voltage from the bias circuit, it is possible to determine whether or not a circuit combination with the bias circuit is appropriate.

〔The invention's effect〕

As described above, in the present invention, the first
And judging the suitability of the combination of the first and second circuits based on each connection relationship information preset for the second circuit, so that the suitability of the combination of the two circuits is easily and accurately determined by simulation. It has the effect of being able to. In addition, there is an effect that the time for judging the suitability of the circuit combination can be reduced.

[Brief description of the drawings]

FIG. 1 is a diagram for explaining the principle of the present invention, FIG. 2 is a block diagram of an embodiment of the present invention, FIG. 3 is a diagram for explaining information storage in a memory in the embodiment described in FIG. 2, and FIGS. FIG. 8 to FIG. 10 are explanatory diagrams of another embodiment of the present invention. DESCRIPTION OF SYMBOLS 1 ... Memory (storage means) 2 ... Connection judgment part (connection judgment means) 10 ... First circuit 20 ... Second circuit 21 ... Division circuit 22 ... Register 23 ... Threshold generation part 24 , 25 ... A / D converter 26 ... Logic circuit 27 ... Output information register 28 ... Switch

──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Kunihiko Goto 1015 Uedanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Inside Fujitsu Limited (72) Inventor Yuji Sekido 2-1844-2 Kozoji-cho, Kasugai-shi, Aichi Prefecture Fujitsu VSI Co., Ltd. In-house (72) Inventor Tomoyuki Koyama 2-1844-2 Kozoji-cho, Kasugai-shi, Aichi Prefecture Inside Fujitsu VSI Co., Ltd. (58) Field surveyed (Int.Cl. ⁶ , DB name) G01R 31/28 G06F 17/50

Claims (3)

(57) [Claims] 1. A semiconductor circuit formed by connecting a first circuit (10) for outputting a control signal and a second circuit (20) that operates based on the control signal, wherein the first and second circuits are connected to each other. In a semiconductor circuit simulation apparatus for inspecting the suitability of the connection relation between the respective circuits (10, 20), each connection relation information (D ₁ ) preset for the connection between the first and second circuits (10, 20) is provided. , D ₂ ), and any one of the first and second circuits (10, 20) based on the connection relationship information (D ₁ , D ₂ ). A semiconductor circuit simulation apparatus comprising: a connection determining means (2) for determining whether a combination of the first and second circuits (10, 20) is appropriate. 2. The semiconductor circuit simulation device according to claim 1, wherein said storage means (1) includes first and second circuits (10, 20).
The output information (D ₃ ) output by the operation of the second circuit (20) when is properly connected is stored, and the first and second circuits (10) are stored in the connection determining means (2). , 20) outputting the output information (D ₃ ) of the second circuit (20) when it is determined that the connection of the second circuit (20) is proper. 3. The semiconductor circuit simulation apparatus according to claim 1, wherein said connection judging means (2) determines that the connection relation information (D ₁ ) of said _first circuit (10) is a first voltage value (V ₁ ). As the second
When the connection relationship information of the circuit (20) of (D ₂₎ is input as the second voltage value (V _2), said second voltage value (V ₂₎ to a predetermined value (sigma) addition and subtraction The respective thresholds (V ₂ + σ, V ₂ −σ) of addition and subtraction obtained by the above are compared with the first voltage value (V ₁ ), respectively (V ₁ −V ₂ −σ, V ₁ −V ₂ + σ). A) determining the appropriateness of the connection between the first and second circuits by obtaining the theory of the respective comparison results (V ₁ −V ₂ −σ, V ₁ −V ₂ + σ). Simulation device.