JP2912688B2 - Display device evaluation method - Google Patents

Description

The present invention relates to a method for evaluating a display device using a liquid crystal panel, and more specifically, an IC for driving a liquid crystal (driver IC) using a COG method or the like. And a method for evaluating an active matrix type liquid crystal panel mounted on a glass substrate.

(Prior art) In recent years, liquid crystal panels, which are the mainstay of thin-type display devices, use a large number of electrodes drawn out from the panel and a plurality of LCI elements for driving liquid crystal in a compact, highly reliable and low cost. The challenge was how to connect. As a solution to these problems, a COG mounting method has been realized in which a liquid crystal driving LSI is directly mounted on a glass substrate of a panel.

(Problems to be Solved by the Invention) However, when the mounting electrode on the glass substrate is electrically connected to the LSI element, the contact resistance is increased due to the surface condition of the electrode, the warpage of the glass substrate, the stress caused by the sealant, and the like. May fluctuate, and sufficient reliability may not be obtained.
In a state where the element is mounted, it is impossible to measure the contact resistance, and there is a problem that it is not possible to determine the degree of operation margin as a panel with respect to the fluctuation of the contact resistance.

The present invention solves the above-mentioned problem, and provides a method for evaluating a liquid crystal display panel in which a contact resistance between an electrode and the LSI element is determined in a mounted state of the LSI element to evaluate the liquid crystal display panel.

(Means for Solving the Problems) In order to solve the above problems, the present invention provides a liquid crystal display panel in which a variable resistor is inserted in series into an arbitrary signal line to which a signal is externally supplied, and the operation of the panel is performed. The resistance value is increased to the limit point, and the above-mentioned contact resistance is calculated from the resistance value at that time and the resistance value of the wiring of the liquid crystal panel (the wiring resistance value of the panel) measured beforehand with no chip components mounted. ing.

(Operation) A completed display device (particularly COG
It is possible to evaluate or inspect the operation margin with respect to the contact resistance of the mounting portion without destroying the display device using the mounting method).

(Embodiment) An embodiment of the present invention will be described with reference to FIG. 1 and FIG. FIG. 1 is a circuit diagram of an active matrix type liquid crystal panel on which an LSI element for driving a liquid crystal is mounted by using a COG mounting method. A gate output signal line 3 and a source signal output signal line 4 from a gate signal output IC1 and a source signal output IC2 formed of a thin film transistor (hereinafter, TFT) are connected to a gate line 5 and a source line 6, respectively. ing. The bus line 7 for supplying an input signal to each of the ICs 1 and 2 is connected to a signal generation unit 8 that generates signals such as a clock signal, a power supply, and various timing signals necessary for driving the ICs 1 and 2. .

Next, a case where the operation margin of the display device is measured in relation to an arbitrary signal line A will be described.

Since the gate resistance of the TFT and the resistance of the liquid crystal as the driving load are sufficiently large, the output terminal of IC1 (or IC2) and the gate output signal 3 (or source signal output signal line 4)
The contact resistance at the connection with the liquid crystal does not significantly affect the image quality when driving the liquid crystal. On the other hand, the contact resistance at the connection between the input terminal of IC1 (or IC2) and the signal line A should be reduced because the input resistance of IC1 (or IC2) is not sufficiently large. And the image quality may be degraded.

Therefore, as the magnitude of the contact resistance at the connection between the input terminal of IC1 (or IC2) and the signal line A increases, the signal input from the signal generator 8 to IC1 (or IC2) decreases. The operating margin (related to image quality) is reduced.

A variable resistor 9 and a resistance meter 10 are inserted in parallel to the signal line A,
A two-contact two-circuit interlocking switch (hereinafter referred to as a switch) 11 is connected in series so that both can be switched. When the switch 11 is turned to the side a shown in the figure, the variable resistor 9 is inserted into the signal line A. When the switch 11 is turned to the side b, the resistance meter 10
The value of the variable resistor can be measured.

First, the switch 11 is turned to the a side, and the variable resistor 9 is fully squeezed, that is, set to 0Ω, and various signals and power are supplied from the signal generator 8 to each of the ICs 1 and 2 to drive the liquid crystal panel. . In this state, the variable resistor 9 is set to 0Ω.
From the time when any abnormality is confirmed on the image of the liquid crystal panel, the switch 11 is turned to the b side, and the value of the variable resistor 9 is measured. Here, the abnormality is a display abnormality of an image, and refers to a case where the image is viewed from a normal image to be displayed, such as noise, distortion, or color blur of the image. The value of the variable resistor 9 immediately before the above-mentioned abnormality in the image display is confirmed is Rm, and the value of the signal generator A of the signal line A is
Assuming that the total resistance value up to the input terminal of IC1 or 2 is Rt, Rm + Rt is an allowable upper limit resistance value of the signal line A because no image display abnormality occurs.

FIG. 2 is an enlarged cross-sectional view of a main part of the COG connection part.
The bump portion 14 formed on the electrode portion 13 is connected to the electrode portion 16 formed on the surface of the liquid crystal panel glass substrate 15.
Normally, the resistance value between the above electrode portions 13 and 16, ie,
Although the contact resistance value of the COG connection cannot be measured, it can be calculated from Rm as described below. Rm + Rt, which is the upper limit resistance value of the signal line A that can be allowed within the range in which no image display abnormality occurs, can be easily obtained by obtaining Rm and Rt as described above. Here, assuming that the contact resistance between the two electrode portions 13 and 16 is Rc, Rm + Rt is Rm + Rt = Rm + Rc + (Rt−Rc) = constant, and Rt−Rc is the signal line A from the signal generating portion 8 to IC1.
Or, from the total resistance value Rt up to the 2 input terminals, COG
The value obtained by subtracting the contact resistance of the connection part, that is, the wiring resistance of the panel before chip component mounting is shown. Since the value of the wiring resistance of this panel can be measured in advance, Rt−Rc is a known value, and the value of Rc can be calculated by measuring Rm.

Therefore, in the mass production process, Rc is determined by measuring Rm.
Can be managed using a histogram, etc., and if such data is grasped in advance, the occurrence of image defects due to the contact resistance of the COG connection can be prevented by grasping changes in the operating margin of the display device In addition, it is possible to quickly grasp the cause of the failure and take measures against the sudden occurrence of the failure.

(Effects of the Invention) As described above, according to the present invention, the completed display device can be operated by a simple method in a manner corresponding to the contact resistance of the connection portion and the range in which the variation in the contact resistance can be tolerated. It is possible to inspect the margin.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an active matrix type liquid crystal panel on which a liquid crystal driving LSI is mounted by using a COG mounting method according to an embodiment of the present invention, and FIG. 2 is an enlarged sectional view of a main part showing a COG connection portion. 1 ... Gate signal output IC, 2 ... Source signal output I
C, 3 ... gate output signal line, 4 ... source signal output signal line, 5 ... gate wiring, 6 ... source wiring, 7 ... bus line, 8 ... signal generator, 9 ... variable resistor, Ten……
Resistance meter, 11: two-contact, two-circuit interlocking switch (switch), 12: IC, 13: IC electrode section, 14: bump section,
15: Glass substrate, 16: Panel side

Claims (1)

(57) [Claims] 1. A liquid crystal display panel for determining a contact resistance value between a chip component mounted on a glass substrate constituting a liquid crystal display panel and an electrode electrically connected to the chip component on the glass substrate. In the evaluation method, a variable resistor is inserted in series to a signal line for supplying a signal to a chip component on the glass substrate to drive the liquid crystal display panel, and gradually increases the resistance value of the variable resistor, The liquid crystal panel measures a resistance value (upper limit resistance value) at a time when a change is observed from a normal display to be performed on the liquid crystal display panel, and the liquid crystal panel is measured in advance in a state where the chip component is not mounted. A method for evaluating a liquid crystal display panel, comprising: calculating the contact resistance value from the wiring resistance value (wiring resistance value of the panel) and the upper limit resistance value.