JP2917351B2 - High efficiency coding apparatus and coding method - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high efficiency coding apparatus and a coding method for quantizing coefficient data obtained by transform coding such as cosine transform.

[Conventional technology]

In order to suppress the redundancy of an image signal, a transform coding method is known in which a screen is divided into blocks each having a predetermined number of pixels, and a linear transformation is performed for each block using a transformation axis that matches the characteristics of the original image signal. . Transform coding includes Hadamard transform,
A cosine transform (discrete cosine transform) is known (for example, “IEEE TRANSACTIONS ON COMMUNICA
TIONS "VOL, COM-32, NO.3, MARCH, 1984, pp.225-231"
reference).

In the two-dimensional cosine transform, a sampled discrete image signal f (j, k) is subjected to a process represented by the following equation by a cosine transform circuit. However, as for the original data, one block has two-dimensional data f (j, k) (j, k = 0,
1, ..., N-1).

The coefficient value F (u, v) obtained by the cosine transform is quantized, and the quantized output is converted into a code signal having a predetermined number of bits by run-length encoding and Huffman encoding.

In order to facilitate converting the coefficient data obtained by the cosine transform into data of a predetermined bit rate according to the capacity of the transmission path, the present applicant has proposed a hybrid coding combining the cosine transform and ADRC. Yes (Japanese Patent Application
62-270564 and Japanese Patent Application No. 63-245227).

ADRC (Adaptive Dynamic Range Coding)
As described in Japanese Patent Application Laid-Open No. 1-144989, a dynamic range that is a difference between a maximum value and a minimum value of a plurality of pixels included in a two-dimensional block is obtained, and encoding that performs encoding adapted to the dynamic range is performed. is there. In addition, JP
As described in -92620, there has been proposed an adaptive coding apparatus that performs coding suitable for a dynamic range with respect to a three-dimensional block formed from pixels in an area included in each of a plurality of frames. Further, JP-A-62-12
As described in Japanese Patent No. 8621, a variable length coding method has been proposed in which the number of bits changes according to a dynamic range so that the maximum distortion generated when performing quantization is constant.

As a buffering method of the variable length ADRC, the present applicant forms a frequency distribution of an integrated dynamic range as described in Japanese Patent Application No. 61-257586,
A set of threshold values prepared in advance is applied to this frequency distribution to determine the amount of generated data for a predetermined period, for example, one frame period, and to control the generated data amount so as not to exceed the target value. is suggesting.

By combining this variable-length ADRC with the above-described cosine transform coding, it is possible to compress the data amount of the coefficient data and buffer the coefficient data generated by the cosine transform.

In the previously proposed hybrid coding, quantization is performed on coefficient data based on human visual characteristics. That is, for the DC component in the coefficient data,
The allowable maximum distortion is fixedly determined, and the DC component is quantized so that the distortion falls below the allowable maximum distortion. For the AC component, coefficient data (low-frequency component) that is easily degraded when distortion is applied is finely divided. The coefficient data (high-frequency components) that are hardly deteriorated are quantized in coarse steps.

[Problems to be solved by the invention]

However, the nature of the images varies. For example, consider an image with very fine details and an image with no details but with a gradual change in brightness, such as a gradation.In the former case, the distortion of the DC component is reduced, By increasing the distortion of the AC component and cutting the details, even if the distortion of the DC component is somewhat large,
The quality of the restored image is better when the details are expressed. Therefore, when the amount of transmission data is restricted in accordance with the capacity of the transmission path, the DC component is quantized with a fixed quantization parameter, so that the coefficient data of the DC component is a parameter corresponding to the degree of image detail. Is preferably quantized.

Therefore, an object of the present invention is to provide a high-efficiency coding apparatus and a coding method that improve the image quality of a restored image by controlling the quantization parameter of coefficient data generated in transform coding according to the nature of the image. Is to provide.

[Means for solving the problem]

According to a first aspect of the present invention, there is provided a blocking circuit for dividing image data into blocks each including a predetermined number of pixel data.
An orthogonal transformation means (3) for orthogonally transforming block data output from the blocking circuit (2); and an orthogonal transformation means (3)
A high-efficiency coding apparatus having quantizing means EN0 to EN15 for quantizing coefficient data from a plurality of detecting means CN1 to CN15 for detecting a distribution state of AC coefficient data AC1 to AC15 from the orthogonal transforming means (3). And a control means (6) for controlling the quantization characteristic of the DC coefficient data output from the orthogonal transform means (3) based on the outputs of the detection means CN1 to CN15.
The invention of claim (3) is an encoding method for performing high-efficiency encoding in this way.

According to the invention of claim (2), in the invention of claim (1), the detecting means CN1 to CN15 determine the standard deviations m1 to m15 for each AC coefficient data, and
Means (5) for summing the coefficient data AC1 to AC15, and the control means (6) has means for defining the maximum distortion of quantization of the DC coefficient based on the output of the summing means (5). Is a highly efficient encoding device.

[Action]

The coefficient data from the cosine conversion circuit 3 is converted into coefficient data DC of DC component and coefficient data of AC component by a coefficient separation circuit 4.
It is separated into AC1 to AC15. Standard deviations m1 to m15 are obtained for each of the AC coefficient data AC1 to AC15 included in one screen or an area obtained by dividing one screen into several parts. This standard deviation m
The quantization characteristic of each AC coefficient data is controlled based on the magnitude relation of 1 to m15. Further, the quantization characteristic of the DC component coefficient data DC is controlled based on the magnitude relationship of the sum of the standard deviations m1 to m15. As a result, quantization suitable for the properties of the image can be performed, and the quality of the restored image can be improved.

〔Example〕

Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In FIG. 1 showing the overall configuration of this embodiment, reference numeral 1 denotes an input terminal to which a digital image signal is supplied. The digital image signal is supplied to the blocking circuit 2, and the order of the input digital image signal is changed to a block configuration for cosine conversion. For example, an image of one frame is divided into (4 × 4) small blocks.

The output signal of the blocking circuit 2 is supplied to a cosine transform circuit 3, and the cosine transform circuit 3 performs a two-dimensional cosine transform by a process similar to the conventional one. A (4 × 4) coefficient table corresponding to the block size from the cosine transform circuit 3 is obtained. Of course, the size of the cosine transform block is not limited to this.

FIG. 2 is obtained from the cosine transform circuit 3 (4 ×
4) shows a coefficient table of 4). 2, DC indicates a DC component, and AC1, AC2,..., AC15 indicate AC components. The coefficient table is transmitted in a sequence in which each coefficient data is arranged in the order of zigzag scanning starting from a DC component. The coefficient data is, for example, a 12-bit code including an 8-bit integer part and a 4-bit decimal part.

The coefficient data from the cosine conversion circuit 3 is supplied to a coefficient separation circuit 4. The coefficient separation circuit 4 separates and outputs a total of 16 pieces of coefficient data of a DC component DC and an AC component of the same order (same order). Each coefficient data from the coefficient separation circuit 4 is stored in a memory for one screen or for each divided area of one screen.
M0, M1,..., M15 are respectively written. Memory M0, M
The coefficient data read from each of 1, ..., M15 is AD
It is supplied to RC encoders EN0, EN1, ..., EN15. The encoded outputs generated by these ADRC encoders EN0, EN1,..., EN15 are converted into a form of transmission data by a framing circuit (not shown) and recorded on a transmission or recording medium.

From the distribution state of the AC components AC1 to AC15, the properties of the image of one screen or the area obtained by dividing one screen are detected. For this reason,
Detection circuits CN1, CN2,..., CN to which AC coefficient data are supplied from the respective input sides and output sides of the memories M1 to M15.
15 are provided. Detection circuit CN1, CN2, ..., CN15
As described later, the standard deviations m1 to m15 for one screen or divided area of the AC coefficient data are detected, respectively, and the number of allocated bits n1 corresponding to the maximum distortion is determined from the standard deviations m1 to m15.
Generates ~ n15. The number of allocated bits n1 to n15 is ADRC
These are supplied to the encoders EN1 to EN15, respectively.

Further, the standard deviations m1 to m15 are summed up by the adding circuit 5, and the added output of the adding circuit 5 is supplied to the ROM 6. ROM6
Outputs the number n0 of allocated bits of DC coefficient data according to the sum of the standard deviations m1 to m15. This allocated bit number n0
Is supplied to the ADRC encoder EN0.

FIG. 3 shows an example of the ADRC encoder EN0. Coefficient data DC from an input terminal indicated by 11 is supplied to a blocking circuit 12, and a plurality of AD coefficients of DC coefficient data DC respectively obtained from a plurality of spatially close cosine transform blocks.
An RC block is configured. The output signal of the blocking circuit 12 is supplied to the detection circuit 13 and the delay circuit 14. Detection circuit 13
Detects the maximum value MAX and the minimum value MIN for each ADRC block. The delay circuit 14 is provided to compensate for a delay generated in the detection circuit 13.

Dynamic range, which is the difference between the maximum value MAX and the minimum value MIN
DR is obtained by the subtraction circuit 15. Further, the minimum value MIN is subtracted from the coefficient data from the delay circuit 14, and the minimum value is removed, so that normalized coefficient data is obtained. The normalized coefficient data is supplied to the quantization circuit 17. The dynamic range DR and the allocated bit number n0 from the ROM 6 are supplied to the quantization circuit 17. The coefficient data is divided by a quantization step obtained from the number of allocated bits n0 and the dynamic range DR, and the quotient is set to an integer to obtain a code signal (quantized data). Quantization circuit 17
Can be composed of a division circuit, a ROM, and the like. Number of allocated bits n
The larger the value of 0, the smaller the maximum distortion.

ADRC encoders EN1 to EN15 for AC coefficient data are also
ADRC encoder for DC coefficient data shown in Fig. 3
It has the same configuration as EN0. Encoders EN1 to EN15 for AC coefficient data may be modified by slightly modifying ADRC encoder EN0 so that minimum value MIN is always regarded as 0 and transmission of minimum value MIN is omitted.

FIG. 4 shows an example of the detection circuit CN1. Coefficient separation circuit 4
The AC coefficient data AC1 separated by is stored in the memory M1 and the accumulator 2
Supplied to 1. The output of the accumulator 21 is supplied to a division circuit 22. Coefficient data AC included in one screen or divided area
Assuming that the number of 1s is M, an average value is generated at the output of the dividing circuit 22. The average value of the coefficient data of the AC component excluding the coefficient data DC of the DC component is usually a value near 0. The average value is subtracted from each of the coefficient data AC1 read from the memory M1 by the subtraction circuit 23, and the output of the subtraction circuit 23 is supplied to the square circuit 24. Square circuit for M coefficient data
The outputs of 24 are added by the accumulator 25 and further divided by the divider 26.
1 / M.

From division circuit 26, it is included in one screen or divided area
The variance of the AC coefficient data AC1 is obtained. Although the value of this variance may be used, a standard deviation m1 is formed through the arithmetic circuit 27 for calculating the square root of the variance. Also, standard deviation m1
Is supplied to the ROM 28, and the number of bits n1 allocated when the AC coefficient data AC1 is quantized is output from the ROM 28. The allocated bit number n1 is supplied to the ADRC encoder EN1.

The detection circuits CN2 to CN15 provided for the other coefficient data AC2 to AC15 have the same configuration as the detection circuit CN1 shown in FIG.

FIGS. 5A and 5B show an example and other examples of the standard deviations m1 to m15, respectively. FIG. 5A shows the standard deviation for an image close to a still image, and FIG. 5B shows the standard deviation for a moving image.

In the example of FIG. 5A, the standard deviation of the low-order coefficient data corresponding to the low-frequency component is large, and the standard deviation of the high-order coefficient data corresponding to the high-frequency component is small. Therefore, energy is concentrated on the low frequency side. On the other hand, in the example of FIG.
The standard deviations m2, m3 and m9 of the coefficient data AC2, AC3 and AC9 located in the vertical direction do not have the above-mentioned tendency in FIG. Thus, the distribution state of the coefficient data of the AC component changes depending on the nature of the image.

Therefore, the fineness of quantization is determined according to the magnitude of the standard deviation m1 to m15 of each coefficient data.
The ROM 28 provided in each of the detection circuits CN1 to CN15 controls the number of allocated bits n1 to n15 for quantization so as to define the maximum distortion as shown in the following table. Instead of ROM28,
A comparison circuit for comparing the standard deviation with a threshold value may be used.

The standard deviations m1 to m15 may be weighted in consideration of the degree of distortion of each component, and the maximum distortion may be defined from the weighted standard deviation.

FIG. 6 shows still another example of the standard deviations m1 to m15 for each of the coefficient data AC1 to AC15. The standard deviation shown in FIG. 6 is added by the adding circuit 5, and an addition result of 89.63 is obtained. A large addition output generally means that there is detail, and a small addition output generally means that there is no detail. Therefore, the ROM 6 to which the added output is supplied generates the number of allocated bits n0 that defines the maximum distortion as shown in the following table according to the value of the added output.

Not limited to ADRC, simple quantization may be performed, and the quantized output may be encoded using a run-length limited code or a Huffman code. In the case of ADRC, the maximum value MAX
May be used to normalize the coefficient data, or buffering may be performed in which the frequency distribution of the coefficient data in a predetermined period is obtained and the amount of generated data is controlled in accordance with the capacity of the transmission path. Further, orthogonal transform such as Hadamard transform other than cosine transform may be used.

〔The invention's effect〕

According to the present invention, when quantizing the coefficient data of the DC component, the fineness of the quantization is controlled according to the details of the image. Therefore, when the amount of transmission data is restricted, the image quality of the restored image can be improved. .

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a schematic diagram showing an example of a cosine transform block, and FIG.
FIG. 4 is a block diagram of an example of an RC encoder, FIG. 4 is a block diagram of an example of a circuit for detecting a distribution state of coefficient data, and FIGS. 5 and 6 are schematic diagrams showing examples of standard deviation. Explanation of the main symbols in the drawing 2: a blocking circuit forming a block of the cosine transform,
3: Cosine conversion circuit, EN0 to EN15: ADRC encoder, CN0
CN15: detection circuit, 5: addition circuit, 6: ROM, 17: quantization circuit, 28: ROM.

Claims (3)

(57) [Claims] 1. A blocking circuit for dividing image data into blocks each consisting of a predetermined number of pixel data, orthogonal transform means for orthogonally transforming block data output from the block circuit, and coefficient data from the orthogonal transform means. A high-efficiency encoding device having quantization means for quantizing the signal, detecting means for detecting a distribution state of AC coefficient data from the orthogonal transformation means, and an output of the orthogonal transformation means based on an output of the detection means. And a control means for controlling the quantization characteristic of the DC coefficient data. 2. The apparatus according to claim 1, wherein said detecting means has means for calculating a standard deviation for each AC coefficient data, and means for summing said standard deviation for all said AC coefficient data. 2. The high-efficiency coding apparatus according to claim 1, further comprising means for defining the maximum distortion of the quantization based on the output of said summing means. 3. A high-efficiency encoding method for dividing image data into blocks each including a predetermined number of pixel data, orthogonally transforming the block data, and quantizing coefficient data generated by the orthogonal transformation. A highly efficient encoding method comprising: detecting a distribution state of AC coefficient data generated by transform; and controlling quantization characteristics of DC coefficient data generated by the orthogonal transform based on a detection result.