JP2924324B2 - Multiplexer - Google Patents
MultiplexerInfo
- Publication number
- JP2924324B2 JP2924324B2 JP18831991A JP18831991A JP2924324B2 JP 2924324 B2 JP2924324 B2 JP 2924324B2 JP 18831991 A JP18831991 A JP 18831991A JP 18831991 A JP18831991 A JP 18831991A JP 2924324 B2 JP2924324 B2 JP 2924324B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- cells
- storage
- threshold value
- receiving
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000003860 storage Methods 0.000 claims description 26
- 230000005540 biological transmission Effects 0.000 claims description 14
- 238000010586 diagram Methods 0.000 description 4
- 230000014759 maintenance of location Effects 0.000 description 3
- 230000007423 decrease Effects 0.000 description 1
Landscapes
- Data Exchanges In Wide-Area Networks (AREA)
Description
【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION
【0001】[0001]
【産業上の利用分野】本発明はATM(Asynchronous T
ransfer Mode)等、セルにブロック化されたデータを多
重化して伝送路に送出するための多重化装置に関するも
のである。The present invention relates to an ATM (Asynchronous T).
The present invention relates to a multiplexing device for multiplexing data blocked in a cell, such as ransfer mode, and transmitting the multiplexed data to a transmission path.
【0002】[0002]
【従来の技術】従来、この種の多重化装置としては、受
信回路は受信したセルを送出不能とする機能を持たず、
セルの混雑時にバッファ容量を越えた場合、容量を越え
たセルをそのバッファで廃棄していた。2. Description of the Related Art Conventionally, as a multiplexing device of this kind, a receiving circuit does not have a function of making it impossible to transmit a received cell.
If the buffer capacity is exceeded when the cells are congested, the cells having exceeded the capacity are discarded in the buffer.
【0003】[0003]
【発明が解決しようとする課題】セルは通例情報源では
より大きなデータブロックを分割して送信しているた
め、1つのセルの廃棄はブロック全体の損失となりかね
ない。そして、上述の従来の多重化装置では、多重化装
置においてセルの混雑時複数の異なった情報源から発生
するセルが廃棄されるとそれらすべての情報源で大きな
損失を発生させる可能性を持つという課題があった。Discarding one cell can result in loss of the entire block, since cells typically transmit larger blocks of data at the source. In the above-described conventional multiplexing apparatus, if cells generated from a plurality of different information sources are discarded at the time of congestion of cells in the multiplexing apparatus, there is a possibility that a large loss occurs in all of these information sources. There were challenges.
【0004】[0004]
【課題を解決するための手段】本発明の多重化装置は、
複数の情報源から発生するセルにブロック化された情報
を多重化して送信する通信方式において、複数の情報源
からのセルを受信する複数の受信回路と、この複数の受
信回路で受信したセルを多重化し一時記憶する記憶回路
と、この記憶回路のセルの記憶数を記録し記憶数に応じ
上記受信回路を制御する制御回路と、上記記憶回路に記
憶された内容を順次伝送路に出力する送信回路とで構成
され、上記制御回路においてセルの記憶数が予め定めら
れた第1の域値を越えた場合に受信回路の内の1つをセ
ル記憶数が別に定められた第1の域値より小さい第2の
域値以下になるまでセル送出不能状態にしこの受信回路
でそれ以後受信したセルを廃棄するようにしたものであ
る。SUMMARY OF THE INVENTION A multiplexer according to the present invention comprises:
In a communication system for multiplexing and transmitting blocked information to cells generated from a plurality of information sources, a plurality of receiving circuits for receiving cells from a plurality of information sources, and a cell received by the plurality of receiving circuits. A storage circuit for multiplexing and temporarily storing, a control circuit for recording the number of cells stored in the storage circuit and controlling the reception circuit according to the number of storages, and a transmission for sequentially outputting the contents stored in the storage circuit to a transmission line When the number of cells stored in the control circuit exceeds a predetermined first threshold value, one of the receiving circuits is replaced with a first threshold value having a different cell storage number. The cell transmission is disabled until the value becomes equal to or smaller than the second threshold value smaller than the threshold value, and cells received thereafter by this receiving circuit are discarded.
【0005】[0005]
【作用】本発明においては、特定情報源に偏したセル廃
棄を実行する。According to the present invention, a cell discarding biased toward a specific information source is executed.
【0006】[0006]
【実施例】図1は本発明の一実施例を示すブロック図で
ある。この図1において、1−1,1−2・・・1−n
は複数の情報源からのセルを受信する複数の受信回路、
2はこの複数の受信回路1−1〜1−nで受信したセル
を多重化し一時記憶する記憶回路、3はこの記憶回路2
のセルの記憶数を記録し記憶数に応じ受信回路1−1〜
1−nを制御する制御回路、4は記憶回路2に記憶され
た内容を順次伝送路に出力する送信回路である。そし
て、制御回路3においてセルの記憶数が予め定められた
第1の域値を越えた場合に受信回路1−1〜1−nの内
の1つをセル記憶数が別に定められた第1の域値より小
さい第2の域値以下になるまでセル送出不能状態にしそ
の受信回路でそれ以後受信したセルを廃棄するように構
成されている。FIG. 1 is a block diagram showing an embodiment of the present invention. In FIG. 1, 1-1, 1-2... 1-n
Are multiple receiving circuits that receive cells from multiple sources,
2 is a storage circuit for multiplexing and temporarily storing cells received by the plurality of receiving circuits 1-1 to 1-n, and 3 is a storage circuit for storing the cells.
And the receiving circuits 1-1 to 1-1 according to the stored number.
A control circuit 4 for controlling 1-n is a transmission circuit for sequentially outputting the contents stored in the storage circuit 2 to the transmission line. When the number of cells stored in the control circuit 3 exceeds a predetermined first threshold value, one of the receiving circuits 1-1 to 1-n is set to a first cell whose number of stored cells is separately determined. Is set to a cell transmission disabled state until the threshold value becomes equal to or less than a second threshold value smaller than the threshold value, and the receiving circuit discards cells received thereafter.
【0007】つぎにこの図1に示す実施例の動作を説明
する。まず、複数の情報源にて発生したセルはそれぞれ
受信回路1−1,1−2・・・1−nにて受信され、互
いに時分割多重化され記憶回路2に入力される。この記
憶回路2は複数のセルを記憶する能力があり、セルが入
力するとその入力された受信回路の番号と現在の記憶数
を制御回路3へ出力する。つぎに、制御回路3では入力
された記憶数が予め定められた第1の域値以上だとそれ
と同時に入力された受信回路番号により、その受信回路
へ記憶不許可信号を出力する。この記憶不許可信号は記
憶数が別に定められた第2の域値以下になるまで継続す
る。したがって、受信回路では記憶不許可信号を受信中
に受信したセルは廃棄する。そして、記憶回路2の出力
は送信回路4により入力された順番に伝送路に出力され
る。Next, the operation of the embodiment shown in FIG. 1 will be described. First, cells generated by a plurality of information sources are received by receiving circuits 1-1, 1-2,... 1-n, time-division multiplexed with each other, and input to the storage circuit 2. The storage circuit 2 has a capability of storing a plurality of cells, and when a cell is input, outputs the number of the input receiving circuit and the current storage number to the control circuit 3. Next, when the input storage number is equal to or larger than the predetermined first threshold value, the control circuit 3 outputs a storage disable signal to the receiving circuit based on the input receiving circuit number at the same time. This storage non-permission signal continues until the number of stored data becomes equal to or less than the second threshold value that is separately determined. Therefore, the receiving circuit discards the cell received while receiving the storage non-permission signal. The output of the storage circuit 2 is output to the transmission line in the order input by the transmission circuit 4.
【0008】図2は図1における制御回路3の構成例を
示すブロック図である。この図2において、端子3−1
からは記憶数と受信回路番号が入力する。3−2,3−
3はともに比較回路であり、それぞれ第1の域値および
第2の域値と入力された記憶数と比較し比較回路3−2
で記憶数が域値を越えた場合および比較回路3−3で記
憶数が域値より減少した場合にパルスを出力する。3−
4,3−5・・・3−6はセットおよびリセットができ
るセットリセット型フリップフロップ回路である。そし
て、端子3−1から入来した受信回路番号にて指定され
たフリップフロップ回路が比較回路3−2からのパルス
によりセットされ、また、全てのフリップフロップ回路
3−4〜3−6は比較回路3−3からのパルスによりリ
セットされる。このフリップフロップ回路3−4,3−
5・・・3−6の各出力は端子3−7,3−8・・・3
−9を介してそれぞれ該当する受信回路に接続され受信
回路に記憶不許可番号を与える。FIG. 2 is a block diagram showing a configuration example of the control circuit 3 in FIG. In FIG. 2, terminal 3-1
From, the number of storages and the receiving circuit number are input. 3-2, 3-
Numeral 3 is a comparison circuit, which compares the first threshold value and the second threshold value with the inputted number of storages, respectively.
The pulse is output when the number of stored data exceeds the threshold value and when the number of stored data decreases below the threshold value in the comparison circuit 3-3. 3-
Reference numerals 4, 3-5,..., 3-6 denote set-reset flip-flop circuits capable of setting and resetting. Then, the flip-flop circuit designated by the receiving circuit number received from the terminal 3-1 is set by the pulse from the comparison circuit 3-2, and all the flip-flop circuits 3-4 to 3-6 are compared. It is reset by a pulse from the circuit 3-3. The flip-flop circuits 3-4, 3-
Each output of 5 ... 3-6 is connected to terminals 3-7, 3-8 ... 3
Each of the receiving circuits is connected to the corresponding receiving circuit via -9, and a storage disapproval number is given to the receiving circuit.
【0009】[0009]
【発明の効果】以上説明したように本発明の多重化装置
は、簡易な構成にて特定情報源に偏したセル廃棄を実行
することにより、全体的な伝送効率を改善できるという
効果を有する。As described above, the multiplexing apparatus of the present invention has an effect that the overall transmission efficiency can be improved by executing the cell discarding biased to a specific information source with a simple configuration.
【図1】本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing one embodiment of the present invention.
【図2】図1における制御回路の構成例を示すブロック
図である。FIG. 2 is a block diagram illustrating a configuration example of a control circuit in FIG. 1;
1−1〜1−n 受信回路 2 記憶回路 3 制御回路 4 送信回路 1-1 to 1-n reception circuit 2 storage circuit 3 control circuit 4 transmission circuit
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.6,DB名) H04L 12/28 H04L 12/56 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int. Cl. 6 , DB name) H04L 12/28 H04L 12/56
Claims (1)
ク化された情報を多重化して送信する通信方式におい
て、複数の情報源からのセルを受信する複数の受信回路
と、この複数の受信回路で受信したセルを多重化し一時
記憶する記憶回路と、この記憶回路のセルの記憶数を記
録し記憶数に応じ前記受信回路を制御する制御回路と、
前記記憶回路に記憶された内容を順次伝送路に出力する
送信回路とで構成され、前記制御回路においてセルの記
憶数が予め定められた第1の域値を越えた場合に受信回
路の内の1つをセル記憶数が別に定められた第1の域値
より小さい第2の域値以下になるまでセル送出不能状態
にしこの受信回路でそれ以後受信したセルを廃棄するよ
うにしたことを特徴とする多重化装置。1. A communication system for multiplexing and transmitting block information to cells generated from a plurality of information sources, a plurality of receiving circuits for receiving cells from a plurality of information sources, and the plurality of receiving circuits. A storage circuit for multiplexing and temporarily storing the cells received in, a control circuit for recording the storage number of the cells of the storage circuit and controlling the reception circuit according to the storage number,
A transmission circuit for sequentially outputting the contents stored in the storage circuit to a transmission line, and when the storage number of cells in the control circuit exceeds a predetermined first threshold value, One of them is in a cell transmission disabled state until the number of stored cells becomes equal to or less than a second threshold value smaller than a first threshold value set separately, and cells received thereafter by this receiving circuit are discarded. Multiplexing device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18831991A JP2924324B2 (en) | 1991-07-03 | 1991-07-03 | Multiplexer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18831991A JP2924324B2 (en) | 1991-07-03 | 1991-07-03 | Multiplexer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0514398A JPH0514398A (en) | 1993-01-22 |
| JP2924324B2 true JP2924324B2 (en) | 1999-07-26 |
Family
ID=16221528
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18831991A Expired - Fee Related JP2924324B2 (en) | 1991-07-03 | 1991-07-03 | Multiplexer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2924324B2 (en) |
-
1991
- 1991-07-03 JP JP18831991A patent/JP2924324B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0514398A (en) | 1993-01-22 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |