JP2926982B2 - Method of forming through hole - Google Patents
Method of forming through holeInfo
- Publication number
- JP2926982B2 JP2926982B2 JP33637290A JP33637290A JP2926982B2 JP 2926982 B2 JP2926982 B2 JP 2926982B2 JP 33637290 A JP33637290 A JP 33637290A JP 33637290 A JP33637290 A JP 33637290A JP 2926982 B2 JP2926982 B2 JP 2926982B2
- Authority
- JP
- Japan
- Prior art keywords
- hole
- insulating substrate
- opening
- conductive paste
- conductive layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title description 13
- 239000000758 substrate Substances 0.000 claims description 21
- 238000001035 drying Methods 0.000 claims description 4
- 238000010304 firing Methods 0.000 claims description 4
- 239000000203 mixture Substances 0.000 claims 1
- 230000002093 peripheral effect Effects 0.000 description 5
- 238000005476 soldering Methods 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000003628 erosive effect Effects 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
【発明の詳細な説明】 ＜産業上の利用分野＞ 本発明は、絶縁基板の両面に形成された配線パターン
を互いに接続したり、部品を挿入したりするためのスル
ーホールの形成方法に関する。Description: TECHNICAL FIELD The present invention relates to a method for forming through holes for connecting wiring patterns formed on both surfaces of an insulating substrate to each other and for inserting components.
＜従来の技術＞ 従来から、この種のスルーホールとしては、第３図で
示す断面図のように、絶縁基板10に形成された貫通孔11
の内周面に沿って所定厚みの導電層12を形成してなるも
のが一般的に知られている。<Prior Art> Conventionally, as this kind of through hole, a through hole 11 formed in an insulating substrate 10 as shown in a sectional view of FIG.
It is generally known that a conductive layer 12 having a predetermined thickness is formed along the inner peripheral surface of the substrate.
そして、このような構造のスルーホールを形成する際
には、所要個所ごとに直径0.4〜1.0mm程度の貫通孔11が
形成された絶縁基板10を用意したのち、いわゆる銀ペー
ストなどのような導電ペーストを絶縁基板10の一面上に
印刷して貫通孔11の一面側開口を覆う。つぎに、この導
電ペーストを貫通孔11の他面側から真空吸引することに
より、貫通孔11の内周面に沿って導電ペーストを塗布す
る。そののち、この導電ペーストを焼成すると、貫通孔
11の内周面には肉厚の薄い導電層12が形成されることに
なる。When forming a through hole having such a structure, an insulating substrate 10 having a through hole 11 having a diameter of about 0.4 to 1.0 mm is prepared at each required position, and then a conductive material such as a so-called silver paste is used. The paste is printed on one surface of the insulating substrate 10 to cover the opening on one surface of the through hole 11. Next, the conductive paste is applied along the inner peripheral surface of the through hole 11 by vacuum suction of the conductive paste from the other surface side of the through hole 11. After that, when this conductive paste is fired,
A thin conductive layer 12 is formed on the inner peripheral surface of 11.
＜発明が解決しようとする課題＞ ところで、前記従来方法によって導電層12を形成した
場合には、特に、貫通孔11の開口周縁部、いわゆるスル
ーホールエッジ11a上に形成された導電層12の肉厚が部
分的に薄くなってしまうことから、この導電層部分12a
に生じる半田食われ現象によって導通不良が発生するこ
とになりやすいという不都合があった。<Problems to be Solved by the Invention> Meanwhile, when the conductive layer 12 is formed by the conventional method, particularly, the thickness of the conductive layer 12 formed on the periphery of the opening of the through hole 11, that is, on the so-called through hole edge 11a. Since the thickness is partially reduced, the conductive layer portion 12a
However, there is an inconvenience that conduction failure is likely to occur due to the solder erosion phenomenon occurring in the above.
本発明はかかる従来の不都合に鑑みて創案されたもの
であって、導通不良の発生を有効に防止しうるスルーホ
ールの形成方法を提供することを目的としている。The present invention has been made in view of such conventional inconveniences, and has as its object to provide a method of forming a through hole that can effectively prevent the occurrence of a conduction failure.
＜課題を解決するための手段＞ 本発明にかかるスルーホールの形成方法は、このよう
な目的を達成するために、貫通孔が形成された絶縁基板
を用意し、その一面上に導電ペーストを印刷して前記貫
通孔の一面側開口を覆う工程と、該導電ペーストを前記
貫通孔の他面側開口から吸引して該他面側開口を閉塞し
たのち、乾燥硬化させる工程と、前記絶縁基板の一面上
に新たな導電ペーストを印刷して前記貫通孔の一面側開
口を再び閉塞したのち、乾燥硬化させたうえで焼成する
工程とを含むことを特徴とするものである。<Means for Solving the Problems> According to the method for forming a through-hole according to the present invention, in order to achieve such an object, an insulating substrate having a through-hole is prepared, and a conductive paste is printed on one surface thereof. Covering the opening on one side of the through-hole, sucking the conductive paste from the opening on the other side of the through-hole, closing the opening on the other side, and then drying and curing the paste. A step of printing a new conductive paste on one side to close the opening on one side of the through-hole again, drying and hardening, and then firing.
＜実施例＞ 以下、本発明方法の一実施例を図面に基づいて説明す
る。<Example> An example of the method of the present invention will be described below with reference to the drawings.
第１図（ａ）〜（ｃ）は本実施例にかかるスルーホー
ルの形成方法をその手順に従って示す工程断面図であ
り、これらの図における符号１はアルミナなどからなる
絶縁基板、２は絶縁基板１の厚み方向に沿って形成され
た貫通孔である。1 (a) to 1 (c) are process cross-sectional views showing a method of forming a through hole according to this embodiment in accordance with the procedure. In these drawings, reference numeral 1 denotes an insulating substrate made of alumina or the like, and 2 denotes an insulating substrate. 1 is a through hole formed along the thickness direction.
本実施例においては、まず、所定個所ごとに直径0.2m
m以下の貫通孔２が形成された絶縁基板１を予め用意し
たのち、第１図（ａ）で示すように、この絶縁基板１の
一面（図では、上側）上、すなわち、貫通孔２の開口周
囲に銀ペーストなどのような導電ペースト３を印刷す
る。そこで、この貫通孔２の一面側開口は、導電ペース
ト３によって閉塞されたことになる。In the present embodiment, first, 0.2m in diameter at each predetermined location
After preparing an insulating substrate 1 in which a through hole 2 of not more than m is prepared in advance, as shown in FIG. 1A, on one surface (the upper side in the figure) of the insulating substrate 1, A conductive paste 3 such as a silver paste is printed around the opening. Therefore, the opening on the one surface side of the through hole 2 is closed by the conductive paste 3.
つぎに、この貫通孔２の一面側開口を閉塞する導電ペ
ースト３を貫通孔２の他面側（図では、下側）開口から
吸引し、この吸引動作を所定の時点で中断する。する
と、この導電ペースト３は、第１図（ｂ）で示すよう
に、貫通孔２の内周面に沿って肉厚の薄い状態で塗布さ
れたうえで滞ることになり、滞った導電ペースト３は貫
通孔２の他面側開口を閉塞することになる。そこで、こ
の絶縁基板１を所定時間だけ加熱して導電ペースト３を
乾燥硬化させると、絶縁基板１の一面側から貫通孔２の
内周面にかけて肉厚の薄い導電層４が形成されたことに
なる。Next, the conductive paste 3 that closes the opening on one surface of the through hole 2 is sucked from the opening on the other surface (lower side in the figure) of the through hole 2, and this suction operation is interrupted at a predetermined time. Then, as shown in FIG. 1 (b), the conductive paste 3 is applied in a thin state along the inner peripheral surface of the through hole 2 and then stagnates. Will close the opening on the other side of the through hole 2. Therefore, when the insulating substrate 1 was heated for a predetermined time to dry and harden the conductive paste 3, a thin conductive layer 4 was formed from one surface side of the insulating substrate 1 to the inner peripheral surface of the through hole 2. Become.
そののち、第１図（ｃ）で示すように、絶縁基板１の
一面上に新たな導電ペースト５を印刷して貫通孔２の一
面側開口を再び閉塞したのち、この導電ペースト５を乾
燥硬化させたうえで焼成する。すると、この絶縁基板１
の一面上に印刷された導電ペースト５は、焼成によって
導電層４と導通接続された半田付けランド６となる。そ
こで、絶縁基板１に形成された貫通孔２のスルーホール
エッジ2aは、互いに積層されることによって肉厚が厚く
なった導電層４と半田付けランド６とによって覆われる
ことになる。After that, as shown in FIG. 1C, a new conductive paste 5 is printed on one surface of the insulating substrate 1 to close the opening on one surface of the through hole 2 again, and then the conductive paste 5 is dried and hardened. After firing, bake. Then, this insulating substrate 1
The conductive paste 5 printed on one surface becomes a soldering land 6 conductively connected to the conductive layer 4 by firing. Therefore, the through-hole edge 2a of the through-hole 2 formed in the insulating substrate 1 is covered with the conductive layer 4 and the soldering land 6 whose thickness is increased by laminating each other.
さらにまた、上記の工程に引き続いて絶縁基板１の他
面上に新たな導電ペースト７を印刷することにより、貫
通孔２の他面側開口から露出した導電層４を覆ったうえ
で焼成すれば、第２図で示すように、この絶縁基板１の
他面上にも導電層４と導通接続された半田付けランド８
が形成されることになる。Furthermore, following the above-described process, by printing a new conductive paste 7 on the other surface of the insulating substrate 1 to cover the conductive layer 4 exposed from the opening on the other surface of the through hole 2 and baking it. As shown in FIG. 2, a soldering land 8 electrically connected to the conductive layer 4 is provided on the other surface of the insulating substrate 1.
Is formed.
＜発明の効果＞ 以上説明したように、本発明にかかるスルーホールの
形成方法によれば、絶縁基板に形成された貫通孔のスル
ーホールエッジは、互いに積層されて肉厚の厚い導電層
と半田付けランドとによって覆われることになる。その
ため、スルーホールエッジが肉厚の薄い導電層によって
覆われたに過ぎない従来例のような半田食われ現象が生
じ難くなる結果、この現象に起因する導通不良の発生を
有効に防止することができるという効果が得られる。<Effects of the Invention> As described above, according to the method for forming a through hole according to the present invention, the through hole edges of the through holes formed in the insulating substrate are stacked with each other to form a thick conductive layer and a solder. It will be covered by the attached land. As a result, the solder erosion phenomenon unlike the conventional example in which the through-hole edge is merely covered by the thin conductive layer is less likely to occur, and it is possible to effectively prevent the occurrence of conduction failure due to this phenomenon. The effect that it can be obtained is obtained.
第１図及び第２図は本発明の一実施例にかかり、第１図
（ａ）〜（ｃ）はスルーホールの形成方法を示す工程断
面図であり、第２図はその追加手順を示す工程断面図で
ある。また、第３図は従来例にかかり、スルーホールの
概略構成を示す断面図である。 図における符号１は絶縁基板、２は貫通孔、3,5は導電
ペースト、３は導電層、６は半田付けランドである。1 and 2 relate to an embodiment of the present invention. FIGS. 1 (a) to 1 (c) are cross-sectional views showing steps of a method of forming a through hole, and FIG. 2 shows an additional procedure. It is a process sectional view. FIG. 3 is a cross-sectional view showing a schematic configuration of a through hole according to a conventional example. In the drawing, reference numeral 1 is an insulating substrate, 2 is a through hole, 3, 5 is a conductive paste, 3 is a conductive layer, and 6 is a soldering land.
Claims (1)
の一面上に導電ペーストを印刷して前記貫通孔の一面側
開口を覆う工程と、 該導電ペーストを前記貫通孔の他面側開口から吸引して
該他面側開口を閉塞したのち、乾燥硬化させる工程と、 前記絶縁基板の一面上に新たな導電ペーストを印刷して
前記貫通孔の一面側開口を再び閉塞したのち、乾燥硬化
させたうえで焼成する工程と を含むことを特徴とするスルーホールの形成方法。A step of preparing an insulating substrate having a through-hole formed therein, and printing a conductive paste on one surface thereof to cover an opening on one surface of the through-hole; and applying the conductive paste to the other surface of the through-hole. A step of sucking from the opening to close the opening on the other side and then drying and curing; and a step of printing a new conductive paste on one surface of the insulating substrate and closing the opening on the other side of the through hole again, followed by drying. Curing and firing the mixture.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33637290A JP2926982B2 (en) | 1990-11-29 | 1990-11-29 | Method of forming through hole |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33637290A JP2926982B2 (en) | 1990-11-29 | 1990-11-29 | Method of forming through hole |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04199897A JPH04199897A (en) | 1992-07-21 |
| JP2926982B2 true JP2926982B2 (en) | 1999-07-28 |
Family
ID=18298455
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP33637290A Expired - Fee Related JP2926982B2 (en) | 1990-11-29 | 1990-11-29 | Method of forming through hole |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2926982B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4501464B2 (en) * | 2003-04-25 | 2010-07-14 | 株式会社デンソー | Thick film circuit board, manufacturing method thereof, and integrated circuit device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6135720B2 (en) | 2013-04-15 | 2017-05-31 | キヤノンマーケティングジャパン株式会社 | Computer, tablet supply system, control method, program |
-
1990
- 1990-11-29 JP JP33637290A patent/JP2926982B2/en not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6135720B2 (en) | 2013-04-15 | 2017-05-31 | キヤノンマーケティングジャパン株式会社 | Computer, tablet supply system, control method, program |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04199897A (en) | 1992-07-21 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |