JP2932775B2 - Demodulator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is applied to a digital radio communication system using orthogonal multilevel modulation. In particular, the present invention relates to a reset method for a baseband transversal equalizer used in a modem.

[0002]

2. Description of the Related Art In recent years, in a digital radio communication system, a quadrature multi-level modulation system has been advanced in order to increase the frequency use efficiency. On the other hand, as the number of multi-values increases, waveform distortion of a propagation path due to fading and influence from interference from other wireless systems and the like increase. Therefore, equalization by an equalizer is required to remove these waveform distortions and interference. As one of these equalizers, a transversal automatic equalizer that adaptively controls each tap coefficient of the transversal equalizer and equalizes a baseband signal has been put to practical use.
Hereinafter, the transversal type automatic equalizer is referred to as an equalizer, the demodulated baseband signal is referred to as a pre-equalization signal, and the equalized baseband signal is referred to as an equalized signal. The determiner reproduces the transmission data signal using the equalized signal. The reproduced data signal is called a judgment signal, and the difference between the equalized signal and the judgment signal is called an error signal. The equalizer uses an error signal and a signal before equalization (ZF method) or an error signal and an equalized signal (MZF method) for controlling each tap coefficient. That is, the amount of intersymbol interference (correlation value) from the symbols before and after appearing in the error signal is obtained, and each is set as a tap coefficient value of each tap. For details of the equalizer, see, for example, P.M. 240-242
It is described in.

A demodulator demodulates a modulation signal based on a control signal generated by a demodulator control circuit to generate a baseband signal. The demodulator control circuit controls the gain of the received signal and the phase of the received carrier using the decision signal and the error signal. This control method will be described using a quaternary quadrature modulation (4-QAM) signal. A signal point of the 4-QAM signal can be represented as a black circle in FIG. 2A, and a signal point projected on one channel of I or Q can be represented as a black circle in FIG. 3A. When the phase of the received carrier changes, the effect appears as distortion of the equalized signal. For example, when the equalized signal is distorted as shown by the triangle in FIG. 2A, it can be seen that the phase of the received carrier changes rightward and is shifted from the phase of the reproduced carrier. Therefore, if the phase of the reproduced carrier is changed in the direction shown in FIG. 2B based on the values of the determination signal and the error signal, the received carrier can be tracked. Even when the gain of the received signal changes, the effect appears as distortion of the equalized signal. When the equalized signal is distorted as indicated by the square mark in FIG. 2A, it can be seen that the signal component has a large gain. Therefore, by changing the gain in the direction shown in FIG. 2C based on the values of the determination signal and the error signal, the magnitude of the gain can be controlled. FIG.
From FIG. 3C, it can be seen that the gain control may be considered independently for the I channel and the Q channel as shown in FIG.

Here, in FIG. 2B, R indicates rightward rotation, and L indicates leftward rotation. FIG.
In (c), the left side separated by / indicates the I channel, the right side indicates the Q channel, S indicates that the gain is small, and B indicates that the gain is large. In FIG. 3B, S indicates that the gain is small, and B indicates that the gain is large.

When large intersymbol interference occurs due to fading or the like, large waveform distortion occurs in the equalized signal.
When the equalized signal is distorted beyond the decision threshold due to the influence, both the decision signal and the error signal are erroneous. If the probability of this error increases, control of a polarity opposite to the true value works in the control system, and finally the demodulation device diverges. In the demodulator, first, the phase control system diverges due to waveform distortion. Further, when the waveform distortion increases, the equalizer diverges and the gain control system diverges immediately. This is because the phase control system performs control by simultaneously using information of both the I channel and the Q channel, and thus has less resistance to signal errors than a gain control system that independently controls with information of one channel. is there. Hereinafter, the magnitude of the waveform distortion at which the equalizer converges is represented as rank 1, the magnitude at which only the phase control system diverges is rank 2, and the magnitude at which the gain control system diverges at the same time is rank 3. When the equalizer and the gain control system diverge, the control system diverges twice, so that the convergence operation (pull-in) is unlikely to occur even if the waveform distortion becomes rank 1.

In the conventional demodulator, the divergence of the demodulator is detected based on the magnitude of the error signal. For example, see
No. 1-119934). This utilizes the fact that when the demodulator converges, the equalized signal also converges, and when the system diverges, the equalized signal also diverges.
While the equalized signal is converging, the error signal has a small value. For example, the probability that an equalized signal will come to an area such as the shaded area in FIG. However, when the equalized signal diverges, the error signal becomes random and enters the shaded area with a certain probability. Therefore, when the probability that a signal enters the shaded area exceeds a certain value, it can be determined that the equalized signal is diverging. When the demodulation device diverges, the equalizer is reset, and when the waveform distortion reaches the rank 1, the pull-in operation is performed.

[0007]

As described above, in the conventional demodulator, the divergence of the demodulator is detected by the divergence of the equalized signal. However, there are two types of divergence of the demodulation device: divergence of the phase control system and divergence of the gain control system. When the gain control system diverges, the pull-in operation hardly occurs unless the equalizer is reset. However, when only the phase control system diverges, it is not necessary to reset the equalizer since the equalizer has converged and is operating normally. Rather, the reset state causes deterioration of the pull-in characteristics. That is, after the waveform distortion reaches rank 1, the equalizer first performs the pull-in operation, and then the carrier control system performs the pull-in operation, so that the entire pull-in time becomes longer. In the end, the reset method of the equalizer based on the detection of the divergence of the phase control system used in the related art resets the equalizer until it is not necessary, so that the pull-in time becomes longer and the pull-in characteristics deteriorate. There are drawbacks.

An object of the present invention is to provide a demodulation apparatus which eliminates such a drawback and has means for improving the convergence characteristics of the apparatus.

[0009]

According to the present invention, there is provided a demodulator for demodulating a quadrature multilevel modulated signal to output a baseband signal;
A transversal equalizer that receives the demodulated baseband signal as input and outputs an equalized baseband signal, and a determiner that receives the equalized baseband signal as input and generates a determination signal and an error signal A demodulator control circuit that receives the determination signal and the error signal, generates a phase control signal and a gain control signal, and supplies the phase control signal and the gain control signal to the demodulator, and generates a reset signal that receives the determination signal and the error signal as inputs. A demodulation device provided with an asynchronous detection circuit provided to the transversal type equalizer, wherein the asynchronous detection circuit monitors the equalized baseband signal when the own device diverges, and controls the phase control system of the own device. Detecting means for generating a detection signal when the gain control system of the gain control system diverges, and a resetting means for generating the reset signal in accordance with the detection result of the detection means. Characterized by comprising a preparative signal generating means.

The detection means includes means for generating the detection signal when the determination signal and each bit of the error signal have the same sign in any of the two orthogonal channels, and includes the resetting means. The signal generation means may include means for converting the detection signal into a pulse with a clock signal related to the determination signal and generating the reset signal when the number of pulses counted within a predetermined period reaches a predetermined number.

[0011]

The divergence of only the gain control system of the phase control system and the gain control system is detected using the decision signal and the error signal generated by the decision unit, and the transversal equalizer is reset. As a result, the condition for resetting the equalizer is reduced, and the pull-in time of the demodulator is reduced.

[0012]

An embodiment of the present invention will be described below with reference to the drawings. In this embodiment, as shown in FIG. 1, a demodulator 11, an equalizer 12, a decision unit 13, a demodulator control circuit 14
And an asynchronous detection circuit 15. That is,
In this embodiment, as shown in FIG.
A demodulator 11 that demodulates 1 and outputs a pre-equalization signal 22 that is a baseband signal, and a transformer that receives the demodulated baseband signal as an input and outputs an equalized signal 23 that is an equalized baseband signal A versal type equalizer 12 and a decision signal 24 having this equalized baseband signal as input.
And a decision unit 13 for producing an error signal 25 and a decision signal 2
4 and an error signal 25 as inputs, generate a phase control signal 26 and a gain control signal 27, and provide the same to the demodulator 11; a demodulator control circuit 14; and a determination signal 24 and an error signal 25 as inputs and generate a reset signal 28. And an asynchronous detection circuit 15 to be provided to the transversal type equalizer 12.
5 is a warning area detection signal which is a detection signal when the gain control system of the phase control system and the gain control system of the own device diverges by monitoring the equalized baseband signal when the own device diverges. 145, and a reset signal generating means for generating the reset signal in accordance with the detection result of the detecting means. Here, the detection means is a first alarm area detection circuit which is a means for generating the detection signal when the determination signal and each bit of the error signal have the same sign for any of two orthogonal channels. 111, a second alarm area detection circuit 112 and an OR circuit 113, and the reset signal generation means converts the detection signal into a pulse with a clock signal 146 related to the determination signal 24 and counts the pulse within a predetermined period. An AND circuit 114, a counter 115, and a counter 116, which are means for generating the reset signal when the number of pulses reaches a predetermined number, are provided.

Next, the operation of this embodiment will be described. The demodulator 11 demodulates the quadrature multilevel modulated signal 21 input to the terminal 1 and outputs the demodulated signal as a pre-equalization signal 22. The equalizer 12 performs equalization on the pre-equalization signal 22 using the error signal 25,
An equalization signal 23 is output. The decision unit 13 outputs a decision signal 24 and an error signal 25 using the equalized signal 23. The determination signal 24 is output from the terminal 2 as a demodulated data signal. The phase control signal 26 and the gain control signal 27 are used for controlling the demodulator 11. The demodulator control circuit 14 produces both signals, and the operation is as described with reference to FIGS. 2 and 3 as a conventional example. If the input signal of this demodulator has a waveform distortion of rank 2, the phase control system diverges. Therefore, the equalization signal 23 diverges, and the determination signal 24 and the error signal 25 diverge. In this case, the equalizer 12 is not reset. Further, when the waveform distortion of rank 3 occurs, the equalizer and the gain control system diverge. The asynchronous detection circuit 15 uses the determination signal 24 and the error signal 25, and outputs the reset signal 28 only in this state. That is, only the divergence of the gain control system is detected. Divergence of the gain control system will be described with reference to FIG. If the control of the DC component of the modulation signal is disturbed by the waveform distortion of rank 3, the signal component may be biased upward or downward at some times. The state is as shown in FIG. Even if the gain control system is normally maintained up to this point, the gain control system determines from this point that the gain is too large, and starts control so that the gain is reduced. However, since the DC component is really shifted, the gain control continues to be reduced, and the signal component continues to be reduced. The state is as shown in FIG. This may appear as if the equalized signal converges to the top or bottom point of its dynamic range and may stabilize in this state. This phenomenon may occur only in one channel of the I channel and the Q channel,
It can happen to both channels at the same time. At this time, the signal points of either channel are always converged to the hatched portion in FIG. Hereinafter, this area is referred to as an alarm area. That is, the divergence of the gain control system can be detected when one of the channels of the equalized signal converges on the alarm region.

The asynchronous detection circuit for detecting the divergence of the gain control system can be realized by a configuration as shown in FIG. 6 as an example. This circuit utilizes that the determination signal of the signal in the alarm area and the first, second and third bits of the error signal have the same sign. A judgment signal 131 is input to a terminal 101, and an error signal 132 is input to a terminal 102. The signals are separated into I-channel and Q-channel components and a clock signal 146 at terminals 104 and 105, respectively. The first alarm area circuit 111 is used for detecting the alarm area of the I channel. In the first alarm area circuit 111, an AND circuit 121
And the first bit 13 of the determination signal 133 and the error signal 132
7. A signal above the alarm area is detected from the second bit 138 and the third bit 139. By inverting the preceding four signals, the AND circuit 122 detects a signal below the alarm area. By calculating the two detection signals 140 and 141 in the OR circuit 123, the case where the I-channel signal enters the alarm area can be detected as the signal 143.
Using the same second alarm area circuit 112, the case where the signal of the Q channel enters the alarm area can be detected as the signal 144. These two signals are calculated using the OR circuit 113 to detect a case where the equalized signal of one channel enters the alarm area.

The AND circuit 114 pulsates the alarm area detection signal 145 using a clock signal. The counter 116 outputs a counter reset signal 147 when counting the clock signal of a predetermined constant. That is, the counter 116 generates a periodic counter reset signal 147. The counter 115 counts the number of alarm area signal pulses in the cycle. For example, when the reset signal 149 output from the counter 115 is
If it is set to operate with the input number of / 4, the reset signal 149 will not be generated except for the divergence of the gain control system of the equalized signal. The divergence of the gain control system is detected, and the reset signal 149 is output from the terminal 108.

Although the above description has been made using the 4-QAM signal, this reset method can also be used for quadrature multi-level modulation signals other than four-level signals. When the gain control system diverges with all the modulated signals, the equalized signal converges to the highest point or the lowest point of the dynamic range. That is, divergence of gain control can be detected by using a circuit similar to that shown in FIG. 6 regardless of the type of modulation signal used.

[0017]

According to the present invention, as described above, only the divergence of the gain control system is detected using the decision signal and the error signal, and the equalizer resets only when the gain control system diverges. Since the condition for resetting the equalizer can be narrowed down better than in the conventional case, it is possible to reduce the useless pull-in time of the equalizer, and as a result, it is possible to shorten the pull-in time of the entire demodulator.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

2A is a diagram illustrating a signal point arrangement of a 4-QAM signal, FIG. 2B is a diagram illustrating a control example of a phase control system of a demodulator,
(C) is a diagram showing a control example of a gain control system of the demodulator.

3A is a diagram illustrating signal points obtained by projecting a 4-QAM signal in one dimension, and FIG. 3B is a diagram illustrating a control example of a one-dimensional gain control system;

4A is a diagram showing a quantized value representing a one-dimensional signal point, FIG. 4B is a region detected by a conventional asynchronous detection circuit, and FIG. 4C is a region detected by the asynchronous detection circuit of the present invention; The area to be.

FIG. 5 (a) is a 4-QAM in which a DC component of a demodulator is shifted.
The figure which shows the example of the one-dimensional signal point of a signal, (b) The figure which shows the example of the one-dimensional signal point of the 4-QAM signal which the gain control system diverged.

FIG. 6 is a connection diagram showing a configuration of an asynchronous detection circuit included in FIG. 1;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Demodulator 12 Equalizer 13 Judgment device 14 Demodulator control circuit 15 Asynchronous detection circuit 111 First alarm area detection circuit 112 Second alarm area detection circuit 113 Logical sum circuit 114 Logical product circuit 115-116 Counter 121-122 Logical product Circuit 123 OR circuit 124-127 Inverting circuit

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H04L 27/00

Claims (2)

(57) [Claims] 1. A demodulator for demodulating an orthogonal multilevel modulation signal to output a baseband signal, and a transversal equalizer for receiving the demodulated baseband signal as input and outputting an equalized baseband signal. And a determiner that receives the equalized baseband signal as input and generates a determination signal and an error signal; and receives the determination signal and the error signal as input, generates a phase control signal and a gain control signal, and demodulates the signal. A demodulator control circuit provided to the demodulator, and an asynchronous detection circuit that receives the determination signal and the error signal, generates a reset signal, and provides the reset signal to the transversal equalizer. Monitors the equalized baseband signal when its own device diverges and generates a detection signal when the gain control system of its own phase control system and gain control system diverges That the detection means and the detection result demodulating apparatus characterized by comprising a reset signal generating means for generating the reset signal in response to the detection means. 2. The apparatus according to claim 1, wherein said detecting means includes means for generating said detection signal when said determination signal and each bit of said error signal have the same sign in any of two orthogonal channels, and said reset signal 2. The apparatus according to claim 1, wherein said generating means includes means for converting said detection signal into a pulse with a clock signal related to said determination signal and generating said reset signal when said pulse number counted within a predetermined period reaches a predetermined number. Demodulator.