JP2933463B2 - Ceramic multilayer wiring board and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to mounting an LSI device.
The present invention relates to a ceramic multilayer wiring board using a conductive paste and a method for manufacturing the same.

[0002]

2. Description of the Related Art A multilayer ceramic wiring board is mainly manufactured by the following two methods. In other words, first, a ceramic is formed on a sheet, a wiring pattern is formed on the sheet, and then multilayered and fired. Second, a conductor and an insulator are alternately printed on a fired ceramic substrate as a base. ,
This is a firing method. In any of the manufacturing methods, it is necessary to form a via hole as a conduction hole for connecting the signal lines of each layer.

A conductor for a via hole is generally obtained by embedding a metal paste in a through hole formed in a sheet or an insulating layer and firing the paste. In many cases, an inorganic composition such as a glass powder is added to the paste below a metal powder or an organic vehicle (binder, solvent, etc.).
The shrinkage matching with the ceramic insulating layer and the improvement in adhesion are achieved. That is, since the heat shrinkage behavior of the metal powder and the ceramic powder is generally different, the sintering of the metal powder is promoted or delayed so as to match as much as possible. The function of enhancing the properties is imparted to the inorganic composition.

[0004]

However, even if the via-hole conductor and the substrate are shrink-matched and the substrate has good adhesion as described above, if the substrate is fired or heat-treated, the via-hole and the ceramic insulating material surrounding the via-hole will not be obtained. In many cases, cracks occur at the boundary with the layer (FIG. 2) and the reliability is impaired. When the via-hole conductor and the ceramic insulating layer are bonded at a high temperature by baking, residual stress generated due to mismatch of thermal expansion coefficient or elastic constant between materials when cooled to room temperature is directly applied to the substrate as tensile stress. This is caused by the lack of strength. Generally, there is a difference in the coefficient of thermal expansion between a metal and a ceramic, and the larger the difference is, the more easily cracks occur.
Therefore, it is very important how to reduce the difference in thermal expansion coefficient. Thermal expansion coefficient control is performed by additives,
Conversely, the effect on other characteristics is large. For example, even if 10% by weight of an inorganic composition having a coefficient of thermal expansion of 3.5 ppm / ° C. is added to silver, the coefficient of thermal expansion is from 19 ppm / ° C. to 15 ppm / ° C.
However, the conductor resistance increases from 2 μΩ · cm to 4 μΩ · cm. Further, to reduce the difference in the coefficient of thermal expansion, the resistance value must be significantly sacrificed.

[0005] The above-mentioned problem of the occurrence of microcracks naturally occurs not only when forming via holes but also when laminating a conductor and ceramic. To solve this problem, a copper-based alloy member having holes must be used. A method for preventing the occurrence of microcracks by bonding with ceramic has been devised (Japanese Patent Application Laid-Open No. 63-179733).
In this method, a copper-based sintered alloy member having a porosity of 10% by volume or less is prepared by a powder metallurgy method, and is joined to a ceramic substrate so that the pores have a stress relaxation effect.
However, as the size of the substrate is reduced, the size of the via hole is reduced, and it has been extremely difficult to use this technique for forming the via hole. A method of forming a cavity in a conductor layer of a via hole has also been disclosed (Japanese Patent Application Laid-Open No. 61-23393). However, this method is not practical in that cracks are controlled, but the resistance value is increased. there were.

In view of the above problems, it is an object of the present invention to provide a ceramic multilayer wiring board using a conductive paste for preventing cracks particularly occurring around via holes.
And a method for manufacturing the same.

[0007]

SUMMARY OF THE INVENTION The present invention comprises a metal particle,
Organic vehicle and 10 vol% or more of total paste 30
A conductor paste for a ceramic wiring board, comprising a pore forming material of not more than vol% and made of a solid resin.
This is a method of manufacturing a ceramic multilayer wiring board using
Independent and external connections during open via holes
Ceramic multilayer arrangement characterized by having voids free
It is a line substrate .

The present invention has been made with an emphasis on relieving stress rather than reducing the generated residual tensile stress. In order to plastically deform the conductor metal, uniform voids are formed in the conductor metal. Can be formed.

As the pore forming material, polystyrene, polymethyl methacrylate, polyethylene or the like is used.
When the amount exceeds 30 vol% of the whole paste,
Since the connection of vacancies is caused and the reliability sharply decreases and the resistance value greatly increases, the addition amount is 30 vol%.
Limited to the following.

[0010]

Embodiments of the present invention will be described below in detail. However, the present invention is not limited to the following examples unless it exceeds the gist.

A case will be described in which silver is used as a conductor metal for via holes, polystyrene (particle diameter: 1 to 40 μm) is used as a pore-forming material, and silver is used as metal particles.

The ratio of silver to organic vehicle is 84/16
(% By weight), and 0 to 60% by volume of a pore-forming material was added to the silver particles as shown in Table 1. At this time, the viscosity of the conductive paste is adjusted to about 100 to 500 kcp so that an appropriate via fill amount can be achieved.

Next, this conductive paste was filled in the through holes in the green sheet, laminated, and fired.
FIG. 1A is a sectional view of a via hole, and FIG. 1B is a view of the via hole as viewed from above. The insulating material has a strength of 100 MPa so that the stress relaxation property of the paste becomes clear.
A mixture of quartz glass and borate glass having a low degree was used.

After firing, evaluation was made on four points: the resistance value of the conductor (in terms of specific resistance), the frequency of occurrence of cracks, the degree of occurrence of gaps between the conductor and the ceramic, and the sinterability of the conductor (the degree of liquid penetration). Was determined by printing and baking a strip-shaped pattern, and using the resistance value, line width, and thickness. Was determined by an optical microscope or SEM observation.
For, after the substrate was immersed in red ink, the cross section was observed and judged from the state of ink penetration. Was performed using 50 points of each sample as measurement points. Table 1 shows the results.

[0015] In a normal paste without the addition of polystyrene, the specific resistance is as low as 1.8 µΩ · cm, and no gaps or seepage occur at all, but cracks occur around all the through holes. However, 10 vol%
When polystyrene is added to the paste, cracks can be suppressed to a frequency of 25%. In addition, 20 vol%
When it exceeds, it does not occur at all. When the holes are formed in the conductor metal for through holes, cracks can be completely suppressed. On the other hand, an extreme increase in the resistance value or a decrease in the reliability may be a concern, but there is no problem if the addition amount is up to 30 vol%. This is presumably because the holes exist independently of each other and are not connected to the outside. However, if it exceeds 40 vol%, the holes are connected to each other, and the characteristics are extremely deteriorated. From the above, when polystyrene fine particles were used as the pore-forming material , 30 vol.
%, The effect of controlling cracks while maintaining reliability and low resistance was recognized.

[0016]

[Table 1]

Although only the case where polystyrene is used as the hole forming material has been described above, it is needless to say that similar results can be obtained with other hole forming materials. Can also be used.

[0018]

As described above, the ceramic of the present invention
According to the method for manufacturing a wiring substrate, it is possible to prevent the occurrence of microcracks at the interface between a metal and an insulator after firing and heat treatment, while maintaining specific resistance and high reliability.

[Brief description of the drawings]

FIG. 1 is a diagram showing a via hole in a ceramic wiring board of the present invention.
It is a view of Le.

FIG. 2 is a view of a via hole when a conventional conductive paste is used.

[Explanation of symbols]

 Reference Signs List 1 ceramic 2 conductive metal 3 void 4 micro crack

Continuation of front page (56) References JP-A-4-225297 (JP, A) JP-A-3-138806 (JP, A) JP-A-2-25094 (JP, A)

Claims (2)

(57) [Claims] 1. A ceramic multilayer wiring board in which a plurality of ceramic wiring boards are stacked via via holes, wherein the via holes have holes which are independent of each other and have no connection to the outside. Multilayer wiring board. 2. A ceramic wiring board conductor comprising a metal particle, an organic vehicle, and a pore forming material comprising 10 vol% to 30 vol% of the total amount of paste and a solid resin in a via hole provided in the ceramic wiring board. After filling the paste and laminating a plurality of the pastes, a heat treatment is performed at a temperature at which the hole forming material can be eliminated, so that holes independent of each other and having no connection to the outside are formed in the via holes. A method for manufacturing a ceramic multilayer wiring board.