JP2945241B2 - Driving method of gradation display matrix type display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a matrix type display device capable of gradation display. .

[0002]

2. Description of the Related Art A display device such as a liquid crystal display device is an important technology as a man-machine interface.
In particular, recently, computer terminals
The liquid crystal display device has become indispensable also from the meaning of sizing. Among them, the matrix type simple liquid crystal display device is in a reasonable range such as price, and is going to be widely used.

Conventionally, the driving method of these matrix type simple liquid crystal display devices uses line-sequential scanning of scanning lines in accordance with a voltage averaging method. This method can be mathematically considered as follows. That is, selecting one scan line at each moment is equivalent to generating an orthogonal function as a whole (reasonably defining the product between the functions), and furthermore, a finite display pattern that is possible, here For a set or mathematical space whose elements are the vectors corresponding to the display of one column of the display device, of the entire scan line to be scanned,
The whole function of choosing one is mathematically complete.

That is, a basis vector corresponding to line-sequential scanning can be considered. Here, the total number of scanning lines is M. Basis vectors corresponding to conventional line-sequential scanning, which are orthogonal and complete with each other. That is, when the n-th scanning line is selected in one frame, the basis vectors {0, 0,..., 0, 1 (n-th), 0,.
0｝ (#). It can be seen that these M vectors are directly facing each other when the product of the vectors is defined as a normal inner product. In addition, the state of the pixel of each column of the display panel to be displayed (the state of ON or OFF in this one frame—for example, if ON, −1 corresponds to
When FF is made to correspond to +1), it can always be expressed by a linear combination of M base vectors (#). The M vectors (#) are complete with respect to the space having this vector as an element. That is, a voltage has been applied to the entire scanning line by using an orthogonal function without being particularly conscious, and driving has been performed.

[0005] This driving method has hitherto been used for all. This method is called a so-called voltage averaging method or an alto presico method.

[0006] Here, the expansion of the function space mathematically including the finite elements by the orthogonally complete base function of each element is described in detail in "Analysis of Analysis", Sadaharu Takagi, published by Iwanami Shoten. The voltage averaging method is described in detail in "Basics and Application of Liquid Crystal Electronics", edited by Akio Sasaki and published by Ohmsha. ing.

Further, recently, a driving method has been devised using another orthogonal and complete mathematical space theory. For example, T.
J. Scheffer et al. SID 92 DIGEST pp228. This uses Walsh-Hadamard transform theory. In this driving method, the voltage applied to the pixel is lower in voltage peak value than in the line-sequential so-called voltage averaging method.
The advantage is that crosstalk and frame response can be reduced somewhat.

[0008]

To restate, the demand for high-quality display has recently come to the fore in liquid crystal display devices used in computer terminals and the like. In these liquid crystal display devices, a simple mode liquid crystal display device such as STN is mainly used. In these liquid crystal display devices, although the display quality is deteriorated due to a crosstalk phenomenon or the like in the display, the liquid crystal display devices are currently used without any difficulty.

That is, first, a so-called voltage averaging method (Alto Plesico method) will be described. This method has many problems in halftone display due to the following problems, that is, crosstalk and frame response. In reality, about 16 gradations are the best. The reason is that, as described above, the contrast cannot be obtained in the display, and there is no point in using multiple gradations of 16 or more.

In the high-speed STN, the movement of the liquid crystal deviates from the assumption of the voltage averaging method, and slightly responds to the peak value of the voltage. In this case, light also slightly leaks in the black state due to the response of the liquid crystal to the half-selection voltage. That is, the contrast becomes considerably inferior to expected.
In conventional line-sequential scanning, the brightness is high because of the scanning voltage applied to the selected scanning line having a relatively large peak value, and a relatively large voltage is applied instantaneously once per frame. Therefore, within one frame, it becomes bright for a moment and then becomes dark soon. In a normal liquid crystal display, this state is maintained for one frame or more when the display becomes bright due to an instantaneous large voltage pulse due to the slow movement of the liquid crystal. These behaviors of the liquid crystal display are derived from a so-called frame response. The frame response is a phenomenon as described above.

In order to avoid such a situation to some extent, that is, to improve the quality of display, the following measures have been proposed.

That is, a driving method is devised using various orthogonal and complete mathematical space theories. For example, TJ
Scheffer et al. SID 92 DIGEST pp228. Here, as described above, these methods are excellent. In other words, during driving, the effective voltage applied to each pixel is dispersed within one frame, thus contributing to the reduction of crosstalk and frame response, and the improvement of image quality. This method relies on the Walsh-Hadamard transform of the idea and uses the underlying Hadamard matrix. The description is given below.

First, an Nth-order Walsh-Hadamard transform matrix W will be described. N-order Walsh - For Hadamard transform matrix W, becomes N = 2 ^w, the N present is natural number, construction method of the matrix W are known. Of course, the unitary property, each element of ^{W · t W = t W ·} W = NE matrix W is composed of only 1 or -1. Of course, the matrix W is a square matrix.

This method generally reduces the frame response and crosstalk. That is, the contrast is improved in a general display pattern, and an environment in which 16 or more multi-gradations are considered to be realistic is created. But special patterns still have problems.

In this type of driving method, there is another circumstance in which room for allowing the concept of gradation display is strict. Actually, when halftone data is displayed by force using this type of driving method, for example, the level of the complete ON display differs for each column of the display device, that is, the effective value of the complete ON display differs for each column, and the display is streaky. Looks like.

In order to solve this, it is necessary to calculate the sum of the squares of all the elements of each column of the display matrix A, or to calculate a quadratic equation using the sum of the squares. . Thereby, the shortage of the effective voltage value is corrected for each column of the display device. At this time, if the correction amount is large, there are many problems such as a remarkable frame response.

An object of the present invention is to provide a driving method for a gray scale display matrix type display device which can perform gradation display and has high display quality in consideration of such a problem of the conventional driving method for a display device. It is assumed that.

[0018]

According to the present invention, as a first means for solving the above-mentioned problems, when β is 0 or a real number larger than 0 and smaller than N, all column vectors or row vectors are set. Is a matrix of N rows and M columns corresponding to a display pattern of one frame using a generator of a transformation matrix H which is an orthogonal N-order square matrix whose norm is N-β.
So that the rows and columns of the matrix A correspond to the rows and columns of the matrix display device including the order , and at the time of binary display,
-1 is defined so as to correspond to a completely ON pixel, and +1 is corresponded to a completely OFF pixel .
The display matrix A is converted as described above to obtain a converted display matrix B.
Dividing the frame period T into N slots in one frame period _{T = t n -t 0, t} 0 ~t 1, t 1 ~t 2, t 2
~t _3, designated ..., in updating the voltage applied to all pixels in t _n-1 ~t n, the timing, at the timing t _i-1 ~t _i, the scanning lines, and signal electrodes, individually Run
The scanning voltage and the signal voltage are applied simultaneously and entirely to optimize the display, and the scanning voltage at that time is K · Vb
The proportional constants K and Vb are determined in advance so that H _ik and the signal voltage become Vb · B _ij , where k
The scan voltage for the scan line of the th row is the conversion matrix H
K column, i row number, voltage proportional to H _ik and none, j
The signal voltage with respect to the signal electrode in the eye column is in the conversion display row.
The voltage in column i, row j and column j is a voltage proportional to B _ij . Next, in the case of realizing a gray scale display, -1 is set to a completely ON pixel.
However, +1 corresponds to a completely OFF pixel, and a display matrix A for associating a halftone display pixel with a real number from -1 to +1 corresponding to the halftone,
A = B, a conversion display matrix B is obtained, and each slot
t _i-1 ~t _i two semi slots, and _{t i-1 ~t i-1} /2,
t _i-1/2 so as to be composed ~t _i, the ratio R1, R2 and _{R1 = (t i-1 -t} i-1/2) / (t i-1 -t i), R2 = ( t _{i−1 / 2} −t _i ) / (t _i−1 −t _i ) , and the timing, from t _{i−1 to} t _{i−1 / 2} , the running of the k-th row
The査線, k columns of the transformation matrix H, figures i line, the H _ik
Proportional voltage, that is close to K · Vb · H _ik / √R1
The voltage is applied to the signal electrode of the j-th column by the conversion display matrix B.
, A voltage proportional to B _ij , ie, Vb
When a voltage close to B _ij / √R1 is applied simultaneously and entirely to each element of the display matrix A as A _ij , the timing, t
_{From i-1 / 2 to} t _i , 0 potential is applied to all the scanning lines, and Vc = Vb × √ ｛(N-β) (1-Σ _{i ^{a ij 2 / N) / R2}} } a voltage is applied close to (sigma _i is, i = 1,2, ......, over the N), drive gradation display matrix display device, such as to complete the half-tone display Propose a law.

The present invention is directed to a second invention for solving the above-mentioned problems.
When β is a real number greater than 0 or less than N and less than N, the norm of all the column vectors or row vectors is N−β, and the transformation matrix H is an orthogonal N-order square matrix. Using a generator, a display matrix A of N rows and M columns corresponding to a display pattern of one frame is matched with the rows and columns of the matrix A , including the order in the rows and columns of the matrix display device. as response, and, when the binary display for the complete oN pixel -1, completely OFF pixel is defined as +1 corresponding, by matrix multiplication, displayed as H · a = B Matrix A
Is converted to obtain a converted display matrix B, one frame period T is divided into N slots, and one frame period T = t _n −t ₀
, T _{0 to} t ₁ , t _{1 to} t ₂ , t _{2 to} t ₃ ,.
_n-1 ~t _n, in updating the voltage applied to all pixels at the timing of, at the timing t _i-1 ~t _i, the scanning lines, and signal electrodes, the scanning voltage and the signal specified individually
The No. voltages, overall, is applied simultaneously, without so display is optimized, whereby the scanning voltage to K · Vb · H _ik, a signal voltage so that Vb · B _ij, proportional constant K, the Vb Determined in advance, but at this time,
The scanning voltage is the number of k columns and i rows of the conversion matrix H.
Value, with voltage proportional to H _ik , without signal electrode in j-th column
The signal voltage corresponding to the i-th row and the j-th column of the conversion display matrix B is
A voltage proportional to the numerical value, B _ij , and then, when implementing a gray scale display, -1 corresponds to a completely ON pixel, +1 corresponds to a completely OFF pixel, and a halftone display pixel corresponds to -1. A display matrix A is formed to correspond to real values from -1 to +1 corresponding to the halftone, and the above-mentioned H · A = B
Give conversion display matrix B, each slot, t _i-1 ~t i two semi slots, and _{t i-1 ~t i-1} /2, so composed t _i-1/2 ~t i And the ratios R1 and R2 are calculated as follows: R1 = (t _i−1 −t _{i−1 / 2} ) / (t _i−1 −t _i ) , R 2 = (t _{i−1 / 2} −t _i ) / (t _{i -1} -t _i), define the timing in the _{t i-1 ~t i-1} /2, run the k-th row
The査線, k columns of the transformation matrix H, figures i line, the H _ik
Proportional voltage, that is close to K · Vb · H _ik / √R1
The voltage is applied to the signal electrode of the j-th column by the conversion display matrix B.
, A voltage proportional to B _ij , ie, Vb
The · B _ij / √R1 voltage close to a whole, is applied at the same time, when each element of the display matrix preA of the previous frame and preA _ij, timing, in the _{t i-1/2 ~t i} , all A 0 potential is applied to the scanning line, and a voltage close to Vc = Vb × {(N−β) (1- { _i preA _ij ² / N) / R 2} is applied to the j-th signal electrode at the same timing. the applied (sigma _i is, i = 1,2, ......, over the N), the provide a driving method for gradation display matrix display device, such as to complete the half-tone display.

The present invention provides a third solution to the above-mentioned problems.
When β is a real number greater than 0 or less than N and less than N, the norm of all the column vectors or row vectors is N−β, and the transformation matrix H is an orthogonal N-order square matrix. Using a generator, a display matrix A of N rows and M columns corresponding to a display pattern of one frame is matched with the rows and columns of the matrix A , including the order in the rows and columns of the matrix display device. as response, and, when the binary display for the complete oN pixel -1, completely OFF pixel is defined as +1 corresponding, by matrix multiplication, displayed as H · a = B Matrix A
Is converted to obtain a converted display matrix B, one frame period T is divided into N slots, and one frame period T = t _n −t ₀
, T _{0 to} t ₁ , t _{1 to} t ₂ , t _{2 to} t ₃ ,.
_n-1 ~t _n, in updating the voltage applied to all pixels at the timing of, at the timing t _i-1 ~t _i, the scanning lines, and signal electrodes, the scanning voltage and the signal specified individually
The No. voltages, overall, is applied simultaneously, without so display is optimized, whereby the scanning voltage to K · Vb · H _ik, a signal voltage so that Vb · B _ij, proportional constant K, the Vb Determined in advance, but at this time,
The scanning voltage is the number of k columns and i rows of the conversion matrix H.
Value, with voltage proportional to H _ik , without signal electrode in j-th column
The signal voltage corresponding to the i-th row and the j-th column of the conversion display matrix B is
A voltage proportional to the numerical value, B _ij , and then, when implementing a gray scale display, -1 corresponds to a completely ON pixel, +1 corresponds to a completely OFF pixel, and a halftone display pixel corresponds to -1. A display matrix A is formed to correspond to real values from -1 to +1 corresponding to the halftone, and the above-mentioned H · A = B
Give conversion display matrix B, and a frame of N time width W1 _{slots, S 1, S 2, ......} , S n, and Z number of times the width W2 _{slots, X 1, X 2, ...} , X _{Consists of Z} , slot,
_{S 1, S 2, ......,} S n, a, is divided into (N / Z) subgroups, which _{S 1,1, S 1,2, ......,} S 1, n / Z,
S _2,1 , ..., S _{2, n / Z} , S _3,1 , ..., S _{Z, n / Z} ,
The temporal structure of one frame is represented by S _1,1 , S _{1,2 ,.
1, n / Z, X 1} , S 2,1, S 2,2, ......, S 2, n / Z, X 2, S
_.. , S _{Z, n / Z} , and at the timing of the slot S _{f, g} , the conversion matrix H
K column, i = {(f−1) N / Z + g} row, H _ik
, Ie, K · Vb · _Hik / √ ｛T /
A voltage close to (N · W1)｝ is applied to the signal electrode in the j-th column.
The numerical value of the i-th row and the j-th column of the conversion display matrix B is proportional to B _ij
Voltage, that is , close to Vb · B _ij / {T / (N · W1)}
When gastric voltage, overall, is applied at the same time, and A _ij of each element of the display matrix A, at the timing of slot X _f,
All scan lines, giving zero potential, at the same timing in the j-th signal electrode, Vc = Vb × √ {( N-β) (N / Z-Σ i A ij 2 / Z)
· T / (N · W 2 )} a voltage is applied close to (but, sigma _i is, i = 1,2, ...
, N) for driving a gray scale display matrix type display device that completes halftone display.

According to the present invention, there is provided a fourth method for solving the above-mentioned problems.
When β is a real number greater than 0 or less than N and less than N, the norm of all the column vectors or row vectors is N−β, and the transformation matrix H is an orthogonal N-order square matrix. Using a generator, a display matrix A of N rows and M columns corresponding to a display pattern of one frame is matched with the rows and columns of the matrix A , including the order in the rows and columns of the matrix display device. as response, and, when the binary display for the complete oN pixel -1, completely OFF pixel is defined as +1 corresponding, by matrix multiplication, displayed as H · a = B Matrix A
Is converted to obtain a converted display matrix B, one frame period T is divided into N slots, and one frame period T = t _n −t ₀
, T _{0 to} t ₁ , t _{1 to} t ₂ , t _{2 to} t ₃ ,.
_n-1 ~t _n, in updating the voltage applied to all pixels at the timing of, at the timing t _i-1 ~t _i, the scanning lines, and signal electrodes, the scanning voltage and the signal specified individually
The No. voltages, overall, is applied simultaneously, without so display is optimized, whereby the scanning voltage to K · Vb · H _ik, a signal voltage so that Vb · B _ij, proportional constant K, the Vb Determined in advance, but at this time,
The scanning voltage is the number of k columns and i rows of the conversion matrix H.
Value, with voltage proportional to H _ik , without signal electrode in j-th column
The signal voltage corresponding to the i-th row and the j-th column of the conversion display matrix B is
A voltage proportional to the numerical value, B _ij , and then, when implementing a gray scale display, -1 corresponds to a completely ON pixel, +1 corresponds to a completely OFF pixel, and a halftone display pixel corresponds to -1. A display matrix A is formed to correspond to real values from -1 to +1 corresponding to the halftone, and the above-mentioned H · A = B
Give conversion display matrix B, and a frame of N time width W1 _{slots, S 1, S 2, ......} , S n, and Z number of times the width W2 _{slots, X 1, X 2, ...} , X _{Consists of Z} , slot,
_{S 1, S 2, ......,} S n, a, is divided into (N / Z) subgroups, which _{S 1,1, S 1,2, ......,} S 1, n / Z,
S _2,1 , ..., S _{2, n / Z} , S _3,1 , ..., S _{Z, n / Z} ,
The temporal structure of one frame is represented by S _1,1 , S _{1,2 ,.
1, n / Z, X 1} , S 2,1, S 2,2, ......, S 2, n / Z, X 2, S
_.. , S _{Z, n / Z} , and at the timing of the slot S _{f, g} , the conversion matrix H
K column, i = {(f−1) N / Z + g} row, H _ik
, Ie, K · Vb · _Hik / √ ｛T /
A voltage close to (N · W1)｝ is applied to the signal electrode in the j-th column.
The numerical value of the i-th row and the j-th column of the conversion display matrix B is proportional to B _ij
Voltage, that is , close to Vb · B _ij / {T / (N · W1)}
Gastric voltage, overall, is applied at the same time, when each element of the display matrix preA of the previous frame and preA _ij, at the timing of slot X _f, All scan lines, giving zero potential, j th Vc = Vb × に は (N-β) (N / Z-Σ _i preA _ij ² /
Z) · T / (N · W 2)} a voltage is applied close to (but, sigma _i is, i = 1,2, ...
, N) for driving a gray scale display matrix type display device that completes halftone display.

The present invention provides a fifth aspect which solves the above-mentioned problems.
When β is a real number greater than 0 or less than N and less than N, the norm of all the column vectors or row vectors is N−β, and the transformation matrix H is an orthogonal N-order square matrix. Using a generator, a display matrix A of N rows and M columns corresponding to a display pattern of one frame is matched with the rows and columns of the matrix A , including the order in the rows and columns of the matrix display device. as response, and, when the binary display for the complete oN pixel -1, completely OFF pixel is defined as +1 corresponding, by matrix multiplication, displayed as H · a = B Matrix A
Is converted to obtain a converted display matrix B, one frame period T is divided into N slots, and one frame period T = t _n −t ₀
, T _{0 to} t ₁ , t _{1 to} t ₂ , t _{2 to} t ₃ ,.
_n-1 ~t _n, in updating the voltage applied to all pixels at the timing of, at the timing t _i-1 ~t _i, the scanning lines, and signal electrodes, the scanning voltage and the signal specified individually
The No. voltages, overall, is applied simultaneously, without so display is optimized, whereby the scanning voltage to K · Vb · H _ik, a signal voltage so that Vb · B _ij, proportional constant K, the Vb Determined in advance, but at this time,
The scanning voltage is the number of k columns and i rows of the conversion matrix H.
Value, with voltage proportional to H _ik , without signal electrode in j-th column
The signal voltage corresponding to the i-th row and the j-th column of the conversion display matrix B is
A voltage proportional to the numerical value, B _ij , and then, when implementing a gray scale display, -1 corresponds to a completely ON pixel, +1 corresponds to a completely OFF pixel, and a halftone display pixel corresponds to -1. A display matrix A is formed to correspond to real values from -1 to +1 corresponding to the halftone, and the above-mentioned H · A = B
Give conversion display matrix B, each slot, t _i-1 ~t i 4 one semi slot, and _{t i-1 ~t i-3} /4, t i-3/4 ~t i-1/2,
_{t i-1/2 ~t i} -1/4, t i-1/4 ~t i, so as to be composed, the ratio R1, R2, R3, R4 R1 = (t i-3/4 - t _i−1 ) / (t _i −t _i−1 ), R 2 = (t _{i−1 / 2} −t _{i−3 / 4} ) / (t _i −t _i−1 ), R 3 = (t _{i− 1 / 4-} t _{i-1 / 2} ) / (t _i -t _i-1 ), R4 = (t _i -t _{i-1 / 4} ) / (t _i -t _i-1 ) , At the timings t _{i-1 to} t _{i- 3 / 4} and t _{i-1 / 2 to} t _{i-1 / 4} , the k-th scanning line has k
Column, the value in row i, the voltage proportional to H _ik , ie
A voltage close to K · Vb · H _ik / √R1 and a voltage close to K · Vb
Applying a voltage of the same polarity close to H _ik / √R3,
The number of i rows and j columns of the conversion display matrix B is
The voltage proportional to the value, B _ij , ie, Vb
A voltage close to B _ij / √R1 and a voltage close to Vb · B _ij / √R3;
When voltages of the same polarity are applied simultaneously as a whole and each element of the display matrix A is A _ij , the timing, t _{i−3 / 4 to} t _i
and _i-1/2, in the _{t i-1/4 ~t i} , All scan lines, giving zero potential, at the same timing in the j-th signal electrode, respectively, Vc = Vb × √ { (N-beta) and ^{_{(1-Σ i a ij 2}} / N) / R2}, Vc = Vb × √ {(N-β) (1-Σ i a ij 2 / N) / R4 same polarity near} the voltage (the _{Σ i, i = 1,2, ......} , across N) applied to the respective timing, provides a driving method of gradation display matrix display device, such as to complete the half-tone display.

According to the present invention, there is provided a sixth aspect for solving the above-mentioned problems.
When β is a real number greater than 0 or less than N and less than N, the norm of all the column vectors or row vectors is N−β, and the transformation matrix H is an orthogonal N-order square matrix. Using a generator, a display matrix A of N rows and M columns corresponding to a display pattern of one frame is matched with the rows and columns of the matrix A , including the order in the rows and columns of the matrix display device. as response, and, when the binary display for the complete oN pixel -1, completely OFF pixel is defined as +1 corresponding, by matrix multiplication, displayed as H · a = B Matrix A
Is converted to obtain a converted display matrix B, one frame period T is divided into N slots, and one frame period T = t _n −t ₀
, T _{0 to} t ₁ , t _{1 to} t ₂ , t _{2 to} t ₃ ,.
_n-1 ~t _n, in updating the voltage applied to all pixels at the timing of, at the timing t _i-1 ~t _i, the scanning lines, and signal electrodes, the scanning voltage and the signal specified individually
The No. voltages, overall, is applied simultaneously, without so display is optimized, whereby the scanning voltage to K · Vb · H _ik, a signal voltage so that Vb · B _ij, proportional constant K, the Vb Determined in advance, but at this time,
The scanning voltage is the number of k columns and i rows of the conversion matrix H.
Value, with voltage proportional to H _ik , without signal electrode in j-th column
The signal voltage corresponding to the i-th row and the j-th column of the conversion display matrix B is
A voltage proportional to the numerical value, B _ij , and then, when implementing a gray scale display, -1 corresponds to a completely ON pixel, +1 corresponds to a completely OFF pixel, and a halftone display pixel corresponds to -1. A display matrix A is formed to correspond to real values from -1 to +1 corresponding to the halftone, and the above-mentioned H · A = B
Give conversion display matrix B, each slot, t _i-1 ~t i 4 one semi slot, and _{t i-1 ~t i-3} /4, t i-3/4 ~t i-1/2,
_{t i-1/2 ~t i} -1/4, t i-1/4 ~t i, so as to be composed, the ratio R1, R2, R3, R4 R1 = (t i-3/4 - t _i−1 ) / (t _i −t _i−1 ), R 2 = (t _{i−1 / 2} −t _{i−3 / 4} ) / (t _i −t _i−1 ), R 3 = (t _{i− 1 / 4-} t _{i-1 / 2} ) / (t _i -t _i-1 ), R4 = (t _i -t _{i-1 / 4} ) / (t _i -t _i-1 ) , At the timings t _{i-1 to} t _{i- 3 / 4} and t _{i-1 / 2 to} t _{i-1 / 4} , the k-th scanning line has k
Column, the value in row i, the voltage proportional to H _ik , ie
A voltage close to K · Vb · H _ik / √R1 and a voltage close to K · Vb
Applying a voltage of the same polarity close to H _ik / √R3,
The number of i rows and j columns of the conversion display matrix B is
The voltage proportional to the value, B _ij , ie, Vb
A voltage close to B _ij / √R1 and a voltage close to Vb · B _ij / √R3;
When voltages of the same polarity are applied simultaneously and entirely, and each element of the display matrix preA of the immediately preceding frame is set to preA _ij , the timing, t _{i−3 / 4 to} t _{i−1 / 2} , t _{i−1 From / 4 to} t _i , 0 potential is applied to all the scanning lines, and Vc = Vb × √ ｛(N-β) (1-Σ _i preA _ij ² / N) / R2｝ and voltages of the same polarity close to Vc = Vb × {(N-β) (1- { _i preA _ij ² / N) / R4} are applied at respective timings ( Σ _i spans i = 1, 2,..., N), and provides a driving method of the gray scale display matrix type display device which completes the halftone display.

The present invention provides a seventh aspect which solves the above-mentioned problems.
When β is a real number greater than 0 or less than N and less than N, the norm of all the column vectors or row vectors is N−β, and the transformation matrix H is an orthogonal N-order square matrix. Using a generator, a display matrix A of N rows and M columns corresponding to a display pattern of one frame is matched with the rows and columns of the matrix A , including the order in the rows and columns of the matrix display device. as response, and, when the binary display for the complete oN pixel -1, completely OFF pixel is defined as +1 corresponding, by matrix multiplication, displayed as H · a = B Matrix A
Is converted to obtain a converted display matrix B, one frame period T is divided into N slots, and one frame period T = t _n −t ₀
, T _{0 to} t ₁ , t _{1 to} t ₂ , t _{2 to} t ₃ ,.
_n-1 ~t _n, in updating the voltage applied to all pixels at the timing of, at the timing t _i-1 ~t _i, the scanning lines, and signal electrodes, the scanning voltage and the signal specified individually
The No. voltages, overall, is applied simultaneously, without so display is optimized, whereby the scanning voltage to K · Vb · H _ik, a signal voltage so that Vb · B _ij, proportional constant K, the Vb Determined in advance, but at this time,
The scanning voltage is the number of k columns and i rows of the conversion matrix H.
Value, with voltage proportional to H _ik , without signal electrode in j-th column
The signal voltage corresponding to the i-th row and the j-th column of the conversion display matrix B is
A voltage proportional to the numerical value, B _ij , and then, when implementing a gray scale display, -1 corresponds to a completely ON pixel, +1 corresponds to a completely OFF pixel, and a halftone display pixel corresponds to -1. A display matrix A is formed to correspond to real values from -1 to +1 corresponding to the halftone, and the above-mentioned H · A = B
Give conversion display matrix B, each slot, t _i-1 ~t i 4 one semi slot, and _{t i-1 ~t i-3} /4, t i-3/4 ~t i-1/2,
_{t i-1/2 ~t i} -1/4, t i-1/4 ~t i, so as to be composed, the ratio R1, R2, R3, R4 R1 = (t i-3/4 - t _i−1 ) / (t _i −t _i−1 ), R 2 = (t _{i−1 / 2} −t _{i−3 / 4} ) / (t _i −t _i−1 ), R 3 = (t _{i− 1 / 4-} t _{i-1 / 2} ) / (t _i -t _i-1 ), R4 = (t _i -t _{i-1 / 4} ) / (t _i -t _i-1 ) , At the timings t _{i-1 to} t _{i- 3 / 4} and t _{i-1 / 2 to} t _{i-1 / 4} , the k-th scanning line has k
Column, the value in row i, the voltage proportional to H _ik , ie
A voltage close to K · Vb · H _ik / √R1 and a voltage close to K · Vb
Apply a voltage of opposite polarity close to H _ik / √R3, and
The number of i rows and j columns of the conversion display matrix B is
The voltage proportional to the value, B _ij , ie, Vb
A voltage close to B _ij / √R1 and a voltage close to Vb · B _ij / √R3;
When voltages of opposite polarities are applied simultaneously and entirely, and each element of the display matrix A is A _ij , the timing, t _{i−3 / 4 to} t _i
and _i-1/2, in the _{t i-1/4 ~t i} , All scan lines, giving zero potential, at the same timing in the j-th signal electrode, respectively, Vc = Vb × √ { (N-beta) and ^{_{(1-Σ i a ij 2}} / N) / R2}, Vc = Vb × √ {(N-β) (1-Σ i a ij 2 / N) / R4 opposite polarity near} the voltage (the _{Σ i, i = 1,2, ......} , across N) applied to the respective timing, provides a driving method of gradation display matrix display device, such as to complete the half-tone display.

The present invention provides an eighth aspect which solves the above-mentioned problems.
When β is a real number greater than 0 or less than N and less than N, the norm of all the column vectors or row vectors is N−β, and the transformation matrix H is an orthogonal N-order square matrix. Using a generator, a display matrix A of N rows and M columns corresponding to a display pattern of one frame is matched with the rows and columns of the matrix A , including the order in the rows and columns of the matrix display device. as response, and, when the binary display for the complete oN pixel -1, completely OFF pixel is defined as +1 corresponding, by matrix multiplication, displayed as H · a = B Matrix A
Is converted to obtain a converted display matrix B, one frame period T is divided into N slots, and one frame period T = t _n −t ₀
, T _{0 to} t ₁ , t _{1 to} t ₂ , t _{2 to} t ₃ ,.
_n-1 ~t _n, in updating the voltage applied to all pixels at the timing of, at the timing t _i-1 ~t _i, the scanning lines, and signal electrodes, the scanning voltage and the signal specified individually
The No. voltages, overall, is applied simultaneously, without so display is optimized, whereby the scanning voltage to K · Vb · H _ik, a signal voltage so that Vb · B _ij, proportional constant K, the Vb Determined in advance, but at this time,
The scanning voltage is the number of k columns and i rows of the conversion matrix H.
Value, with voltage proportional to H _ik , without signal electrode in j-th column
The signal voltage corresponding to the i-th row and the j-th column of the conversion display matrix B is
A voltage proportional to the numerical value and B _ij is not used. Next, when gradation display is implemented, -1 corresponds to a completely ON pixel, +1 corresponds to a completely OFF pixel, and a halftone display pixel corresponds to an intermediate pixel. A display matrix A corresponding to real values from -1 to +1 is formed corresponding to the key, and a converted display matrix B is obtained from the above-mentioned H · A = B, and each slot, t _{i−1 to} t _i four semi-slot _i, and _{t i-1 ~t i-3} /4, t i-3/4 ~t i-1/2, t
_{i-1/2 ~t i-} 1/4, t i-1/4 ~t i, so as to be composed, the ratio R1, R2, R3, R4 and _{R1 = (t i-3/} 4 -t _{i-1) / (t i} -t i-1), R2 = (t i-1/2 -t i-3/4) / (t i -t i-1), R3 = (t i-1 _{/ 4 -t i-1/2} ) / (t i -t i-1), R4 = (t i -t i-1/4) / (t i -t i-1), and defines timing , T _{i-1 to} t _{i- 3 / 4} and t _{i-1 / 2} to
In t _{i−1 / 4} , the k-th scanning line has the k-th column of the conversion matrix H and the i-th row.
The voltage proportional to the numerical value, H _ik , ie, K ·
And a voltage close to the _{Vb · H ik / √R1, K} · Vb · H ik / √
Apply a reverse-polarity voltage close to R3, and
The poles, the numerical value of row i and column j of the display transformation matrix B, and B _ij
Proportional voltages, ie, Vb · B _ij / √R , respectively
1 and a voltage of opposite polarity close to Vb · B _ij / √R3.
The pressure is applied simultaneously and entirely, and the display matrix of the previous frame is
When each element of preA and preA _ij, timing, t
and _{i-3/4 ~t i-} 1/2, in the _{t i-1/4 ~t i} , All scan lines, giving zero potential, at the same timing in the j-th signal electrode, respectively , Vc = Vb × √ {( N-β) (1-Σ i preA ij 2 / N) / R2} and, Vc = Vb × √ {( N-β) (1-Σ i preA ij 2 / N) / R4} the opposite polarity of the voltage close to, is applied at each timing (sigma _i is, i = 1, 2, ......, over the N), gradation display such as to complete the halftone display matrix display device We propose a driving method.

In these new driving methods,
It is desirable that the polarity of all applied voltages be reversed in temporally adjacent frames.

[0027]

Now, it is assumed that the definition of the rows and columns of the matrix is made mathematically, and the definition of the rows and columns in the panel of the matrix type display device is such that the rows correspond to the scanning lines and the columns correspond to the signal lines. Let it correspond.

The norm of a vector is defined as the vector (H
_{i, 1} , _{Hi, 2} , ..., _{Hi, N} ), L = Σ _j H
_{i, j} ²

In the present invention, orthogonal matrices are used in which the norms of the constituent vectors are constant and are orthogonal to each other.

The present invention pertains, in part, to a matrix-type display device that is rms responsive.

In a square matrix composed of column vectors or row vectors having an orthogonal degree (automatically completed completely) having an arbitrary degree, if the number of 0s included in each of the constituent vectors is the same, it goes without saying that The lengths of such vectors are equal. The length of a vector is defined as the square root of the inner product of the vector itself.

An example of the orthogonal function is a Walsh function. Each element of the Walsh function (also represented by a column vector or a row vector of the Hadamard matrix W) is composed of only +1 and −1 values.
Such matrices are mathematically of this kind only.

Further details will be described.

In the following discussion, when 0 ≦ β <N, the norm of all the column or row vectors of the orthogonal matrix used is N−β, and only that the vectors of each other are orthogonal, using. That is,
This is the only premise of the present invention. The elements of the orthogonal matrix may take values other than 0 and four or more values.

First, a known binary display method is as follows. By examining this detail, the idea of the present invention was obtained.

The norm of all column or row vectors is N-β, and the different column vectors or different row vectors are N-th order orthogonal when defining the multiplication between the vectors in a known manner. Square transformation matrix H
And a display matrix A of N rows and M columns corresponding to a display pattern of one frame, so that the rows and columns of the matrix A correspond to the rows and columns of the matrix display device in this order. In this case, -1 is defined to correspond to a completely ON pixel, and +1 is corresponded to a completely OFF pixel, and the display matrix A is converted by a matrix multiplication to obtain a converted display matrix B. One frame period T is divided into N slots, and one frame period T
= T in _{n -t 0, t 0 ~t 1} , t 1 ~t 2, t 2 ~t 3,
......, in updating the voltage applied to all pixels in t _n-1 ~t n, the timing, at the timing t _i-1 ~t _i,
The scanning line and the signal electrode, the individually designated voltage, and the whole and simultaneously apply the scanning voltage and the signal voltage. At this time, the k rows and the i rows of the conversion matrix H are applied to the k rows of the scanning lines. And a scanning voltage proportional to _Hik is applied to the jth signal electrode at the same timing in the conversion display matrix B.
A display is obtained by applying a signal voltage proportional to the numerical value B _ij in the i-th row and j-th column.

At this time, the square value of the effective voltage Vkj averaged in one frame applied to the liquid crystal layer of the pixel at the intersection of the k-th scanning line and the j-th signal line is as follows. ² = {(k · _Hik − _Bij ) ² · Vb ² } / N, which is arranged as follows. Vkj ² = {k ² (N−β) + (N−β)} A _ij ² −2k
(N−β) A _kj ｝ Vb ² / N (*) As can be seen from the above equation, in the case of a binary display of the complete ON state and the complete OFF state, that is, when A _ij = ± 1, Over all i, ie
和 A _ij ² = N as the sum of the entire j columns, and Vkj ² = ｛k ² (N-β) + (N-β) N-2k (N-
β) A _kj ｝ Vb ² / N (**) Therefore, the square of the effective voltage of the pixel, Vkj ^2, is exactly as desired and depends only on A _kj .

[0038] However, when allowing halftone to be displayed information, i.e., other than the ± 1 to A _ij, that takes a numerical value distributed between -1 +1, the allowed, ΣA _ij ² <N becomes Moreover, ΣA _ij ² becomes dependent on the values of all A _{ij in} the column. Above, summary, it the case of gradation display, the effective voltage Vkj pixels that not only A _kj desired, other elements of the column that undesired this A _kj belongs, i.e. come also enter other display information A _ij Further, it can be seen that the effective value of the entire column j of the display decreases, and the column j becomes darker.

The inventor has conceived that if the effective value of the entire column j can be raised without contradiction, this problem can be solved.
A solution has been found.

One method is to calculate ΣA _ij ² for all the values of A _{ij in} the column, and in driving one frame,
One extra slot is provided, and a voltage proportional to N−ΣA _ij ² is applied to the signal electrode in this slot to correct the voltage. Another method is to calculate the ΣA _ij ² and ΣA _ij , Solving a desired quadratic equation and correcting each element Aij of the display matrix. In this method, the operation becomes considerably complicated, and the operation time and the burden on hardware become large.

In the following, the former method will be considered.

At this time, if N-ΣA _ij ² to be corrected is considerably large, there is a possibility that the frame response becomes large.

According to the present invention, the effective voltage to be corrected is set to 1
It is intended to reduce the peak value of the applied voltage by dispersing and averaging each slot in the frame, thereby further reducing the frame response.

In order to determine the averaged correction voltage, the calculation of 演算 A _ij ² is required. For this purpose, a considerable amount of calculation hardware is required (particularly, high-definition display, etc.). In order to avoid this even slightly, it is proposed to use the value of ΣA _ij ^{2 from} the previous frame. Usually, the fact that the screen information can be considered almost the same in temporally adjacent frames is underlying.

The present invention further divides the applied voltage by dividing each slot into multiple semi-slots,
This also intends to reduce the frame response.

Note that each column vector of the transformation matrix H is RO
Generated in M memory. The calculation was performed by a high-speed CPU with a memory.

According to the present invention, in the above-described driving method, the scanning side potential and the signal side potential are inverted for each frame.

[0048]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a circuit block diagram used in an embodiment of the driving method according to the present invention, and most of the circuits are composed of logic circuits. FIG. 1 is a block diagram. In the figure, reference numeral 1 denotes a first 240 × 640-frame-buffer memory, 2 denotes a second 240 × 640-frame-buffer memory, 3 denotes a 240 × 640 pixel matrix type simple liquid crystal display device, and 4 denotes a matrix element generation. RO
M, 5 is a register for scanning side voltage, 6 is a signal side information operation circuit, 7 is a signal side output operation circuit, and 8 is a high-speed digital
An analog converter (DAC), 9 is an analog signal side driver, and 10 is a ternary scanning side driver. The number N is 240.

The liquid crystal display device 3 described below was driven by the circuit system having the above configuration. This situation will be described in principle.

The orthogonal matrix H to be used was obtained as follows. The 15th-order orthogonal matrix U1 is defined as (Equation 1), and the matrix U1
Is extended by (Equation 2) to extend U2, the matrix U2 is extended by (Equation 3) and U3 is extended, and the matrix U3 is extended by (Equation 4) to obtain U4. Matrix H was obtained.

[0052]

(Equation 1)

[0053]

(Equation 2)

[0054]

(Equation 3)

[0055]

(Equation 4)

[0056]

(Equation 5)

The matrix H is a 240-order square orthogonal matrix.
That is, N = 240. This is called a transformation matrix H. In this case, the number β of 0s in each column or each row is 224
It is. In order to generate the contents of the matrix H, the ROM
4 was programmed.

Next, K of the displayed scan Temu and, Vb
To determine. That is, the display matrix A of N rows and M columns corresponding to the display pattern of one frame is completely turned on at the time of binary display so that the rows and columns of the matrix A correspond to the rows and columns of the matrix display device in this order. -1 for pixel, full OF
The display information is fetched and stored in the frame-buffer memory so that +1 corresponds to the F pixel, and the following matrix multiplication H · A = B is performed by the arithmetic unit, the display matrix A is converted, and the conversion display matrix is converted. Obtain B and store it in the second frame-buffer memory.

Next, the liquid crystal panel is driven in the following process. One frame period T is divided into N slots, and in one frame period T = tn-t0, t0
t1, t1 to t2, t2 to t3,..., tn-1 to t
In updating the voltage applied to all the pixels at the timing of n, at timings ti-1 to ti, the scanning voltage and the signal electrode, the individually designated voltage, and the scanning voltage and the signal voltage are simultaneously and entirely changed. At this time, the k rows, the k columns of the conversion matrix H, the numerical values of the i rows, Hi
A scan voltage proportional to k is applied, and a signal voltage proportional to the numerical value Bij at the i-th row and j-th column in the conversion matrix B is applied to the j-th signal electrode at the same timing. The display is optimized so that the scanning voltage at that time is K · Vb ·
_Assuming that H _ik and the signal voltage are Vb · Bij, the proportional constants k and Vb are determined in advance.

Next, when gradation display is realized, complete ON is performed.
A pixel -1 corresponds to a completely OFF pixel and +1 corresponds to a completely OFF pixel. A display matrix A corresponding to a halftone display pixel corresponds to a real value from -1 to +1 corresponding to the halftone. The conversion display matrix B is obtained by the above-mentioned H · A = B, and each slot, ti−1 to ti−1
Let ti be two semi-slots, ti-1 to ti-1 / 2
If, as is composed of ti-1 / 2~ti, ratios R1, R2 and _{R1 = (t i-1 -t} i-1/2) / (t i-1 -t i) R2 = (t _{i-1 / 2} -t _i ) / (t _i-1 -t _i ) , and in the timing, ti-1 to ti-1 / 2, the scanning line and the signal electrode are individually designated. Voltage, and at the same time, applying the scanning voltage and the signal voltage,
A scanning voltage in proportion to k columns of the conversion matrix H, a numerical value in the i row, and a scanning voltage proportional to Hik, that is, K · Vb · Hi
A potential close to k / √R1 is applied, and the i-th row of the conversion display matrix B is applied to the j-th signal electrode at the same timing.
A signal voltage proportional to the numerical value Bij in the j-th column, that is, Vb
When a potential close to Bij / √R1 is applied and each element of the display matrix A is Aij, the timing, ti-1 / 2 to t
In i, 0 potential is applied to all the scanning lines, and j
A voltage close to Vc = Vb × {(N-β) (1- {iAij2 / N) / R2} is applied to the signal electrode at the same timing (where {i is i = 1, 2,...).
.., N), and a halftone display was performed. As the close voltage, the one in which Vb was determined as described above was essentially used, but this Vb was slightly modified experimentally. this is,
This is because voltage waveform distortion and the like are considered.

As a result, in a high-speed STN display device in which the response speed (= the time required for the rise of the response + the time required for the signal to fall after the signal is turned off) is 120 ms, the crosstalk and the frame response can be greatly improved. As compared with the above, the contrast could be improved to 5 times or more and the brightness could be improved to about 2 times. This display device increases the possibility of displaying a moving image.

At the time of display, almost 100% of the voltage applied to the scanning lines and signal lines was monitored over time, and the voltage value was 1 compared to the conventional so-called Alto Plesico method.
/ 2 to 1/4. Along with this, the crosstalk has been significantly reduced on the display.

Conventionally, in a special pattern including a halftone, such as a vertical ruled line, which often appears in the OA display, a voltage value to the signal side needs to be extremely large during a certain 1H period.
Although adverse effects such as crosstalk and frame response appear, according to the present embodiment, this phenomenon is suppressed. This was also considered to be due to the fact that the peak value of the correction voltage could be reduced.

Further, in the display of a natural image, there was a case where a row having a large number of halftone pixels appeared in a black band shape in the liquid crystal panel, but this was completely resolved, and a clear image was obtained. According to this method, about 128 gradations were evaluated as being realistic.

Further, the polarity of the scanning side voltage and the signal side voltage was inverted for each frame. This tendency tends to be smaller when the printing of the liquid crystal display device is performed for a long time.

The following was also performed.

[0067] Each element of the display matrix preA immediately before when the preA _ij, timing, in the _{t i-1/2 ~t i} , All scan lines, giving zero potential, the j-th signal electrode At the same timing, Vc = Vb ×） (N-β) (1- ² _i preA _ij ² / N) /
A voltage is applied close to the R2} (however, sigma _i is, i = 1,2, ...
.., N), and halftone display was performed. in this case,
There was no discomfort in the display. This provides a margin in the above-mentioned calculation in terms of hardware or speed. (Example 2) The same system as in Example 1 was prepared.

The orthogonal matrix H used is based on a Walsh-Hadamard transform of order 256. in this case,
N is 256. Β is 0, the number of 0 elements of each column vector or row vector of the matrix H.

Virtually, the scanning side electrode of the liquid crystal display device 3,
That is, it is assumed that there are 256 row-side electrodes. That is, an appropriate display may be assumed for the 241st and subsequent scanning electrodes. First, as in the first embodiment, Vb and k are determined. Next, when implementing the gradation display, -1 corresponds to the completely ON pixel, +1 corresponds to the completely OFF pixel, and -1 to +1 corresponds to the halftone display pixel corresponding to the halftone. The display matrix A is configured so as to correspond to the real values up to and the converted display matrix B is obtained from H · A = B as described above.

The 256 scanning-side electrodes, ie, the row-side electrodes, are divided into eight sub-groups, each having a total of 32 sub-groups. 256 in one frame (hereinafter referred to as Si)
+32 (referred to as Xi) = 28 eight slots temporally provided. At this time, the time width of each slot was the same.
That is, w1 = w2 = w.

The temporal structure of one frame is S ₁ , S ₂ ,..., S ₈ , X ₁ , S ₉ , S ₁₀ ,..., S ₁₆ , X ₂ , S ₁₇ ,
..., and the S _256, X _32.

At the timing of the slot Si,
The scanning line and the signal electrode, the individually designated voltage, and the whole and simultaneously apply the scanning voltage and the signal voltage. At this time, k columns and i rows of the conversion matrix H are applied to the k rows of scanning lines. , A scanning voltage proportional to Hik, that is, K · Vb ·
Hik · {T / (256 · W)} is applied and j
At the same time, the signal voltage at the same timing is close to the signal voltage proportional to the numerical value Bij in the i-th row and j-th column of the conversion display matrix B, that is, Vb · Bij · {T / (256 · W)}. When a potential is applied and each element of the display matrix A is set to Aij, 0 potential is applied to all the scanning lines at the timing of the slot Xf, and the same timing is applied to the j-th signal electrode, and Vc = Vb A voltage close to × {256 × (8− {iAij2 / 32) · T / (256 · W1)} is applied (however, Δi is i = 1, 2,...)
..., N), and the halftone display was completed.

When display was performed as in Example 1, excellent display characteristics were obtained. The contrast has also improved.

Further, the peak value of the correction voltage could be relatively suppressed. This was effective in suppressing the frame response.

The polarity of the scanning side voltage and the signal side voltage was inverted for each frame. This tendency tends to be smaller when the printing of the liquid crystal display device is performed for a long time.

Further, each element of the immediately preceding display matrix preA is
A _ij , at the timing of slot _Xf ,
All scan lines, giving zero potential, at the same timing in the j-th signal electrode, Vc = Vb × √ {256 × (8-Σ i preA ij 2/32) · T /
(256 · W1)｝ is applied (however, Σ _i is i = 1, 2,...)
..., N), and the halftone display was completed. There was no discomfort in the display. (Example 3) The same system as in Example 1 was prepared.

The orthogonal matrix H used was obtained as follows. First, a quadratic orthogonal square matrix U1 (Equation 6)

[0078]

(Equation 6)

From the above, an 8th-order orthogonal matrix is obtained by (Equation 2), a 16th-order orthogonal matrix is obtained by (Equation 3), and a 32nd-order orthogonal matrix is obtained by (Equation 2). A 64-order orthogonal matrix was obtained by (Equation 3), a 128-order orthogonal matrix was obtained by (Equation 2), and a 256-order orthogonal matrix H was obtained by (Equation 3). In this case N is 25
6, the number of 0 elements in each column vector or row vector of the orthogonal matrix H, and β is 32.

Virtually, the scanning side electrode of the liquid crystal display 3
That is, it is assumed that there are 256 row-side electrodes. That is, an appropriate display may be assumed for the 241st and subsequent scanning electrodes.

First, Vb and k are determined in the same manner as in the first embodiment.

Next, when gradation display is realized, complete ON is required.
A display matrix A that associates a pixel with -1 and a completely OFF pixel with +1 and a halftone display pixel with a real number from -1 to +1 corresponding to the halftone. Then, as described above, a converted display matrix B is obtained from H · A = B.

First, one frame is composed of 256 slots. Each slot, ti-1 to ti, is divided into four semi-slots, ti-1 to ti-3 / 4 and ti-3 / 4.
~ Ti-1 / 2, ti-1 / 2 to ti- ／, ti-
１ ／ to ti. The ratio R1,
R2, R3, R4 and _{R1 = (t i-1 -t} i-3/4) / (t i-1 -t i), R2 = (t i-3/4 -t i-1/2) / (T _i−1 −t _i ) , R 3 = (t _{i−1 / 2} −t _{i−1 / 4} ) / (t _i−1 −t _i ) , R 4 = (t _{i−1 / 4} −t _i) ) / (T _i-1 −t _i ) , where R1 = R2 = R3 = R4 = R.

Timing, ti-1 to ti-3 / 4;
In ti-1 / 2 to ti- ／, the scanning line and the signal electrode and the individually designated voltage are applied simultaneously and simultaneously, and the scanning voltage and the signal voltage are applied simultaneously. The scanning lines include the k-th column, the i-th row, and the Hik of the transformation matrix H.
The scanning voltage is proportional to: K · Vb ·
A potential near Hik / √R and a potential having the same polarity near K · Vb · Hik / √R are applied to the j-th signal electrode at the same timing in the i-th row of the conversion display matrix B. j
A signal voltage proportional to the numerical value Bij in the column, that is, a potential close to Vb · Bij / √R and Vb · Bij /
When a potential of the same polarity close to √R is applied and each element of the display matrix A is Aij, the timing, ti−3 / 4 to ti
At −1/2 and ti− ／ to ti, 0 potential is applied to all the scanning lines, and Vc = Vb × √ ｛224 × ( 1− {iAij2 / N) / R} and voltages of the same polarity close to Vc = Vb {224 × (1− {iAij2 / N) / R} are applied at respective timings (where Δi is i = 1, 2,..., N),
Thus, a halftone display was completed.

The operation could be performed at high speed, and the transmittance at the time of displaying black was remarkably reduced.

In the display of a natural image, there was a case where a row having a large number of halftone pixels seemed to be a black band in the liquid crystal panel. However, this was completely resolved, and a clear image was obtained. According to this method, about 128 gradations
It was evaluated as realistic.

Further, as in the first and second embodiments, even when the display information of the previous frame was used for the calculation of Vc, there was no uncomfortable feeling.

The polarity of the scanning-side voltage and the signal-side voltage was inverted for each frame. This tendency tends to be smaller when the printing of the liquid crystal display device is performed for a long time. Example 4 The same system as in Example 1 was prepared.

The orthogonal matrix H used is based on a Walsh-Hadamard transform of order 256. in this case,
N is 256. Β is 0, the number of 0 elements of each column vector or row vector of the matrix H.

Virtually, the scanning side electrode of the liquid crystal display 3
That is, it is assumed that there are 256 row-side electrodes. That is, an appropriate display may be assumed for the 241st and subsequent scanning electrodes.

First, as in the first embodiment, Vb and K are determined.

Next, when realizing a gradation display, complete ON is required.
A display matrix A that associates a pixel with -1 and a completely OFF pixel with +1 and a halftone display pixel with a real number from -1 to +1 corresponding to the halftone. Then, as described above, a converted display matrix B is obtained from H · A = B.

First, one frame is composed of 256 slots. Each slot, ti-1 to ti, is divided into four semi-slots, ti-1 to ti-3 / 4 and ti-3 / 4.
~ Ti-1 / 2, ti-1 / 2 to ti- ／, ti-
１ ／ to ti. The ratio R1,
R2, R3, R4 and _{R1 = (t i-1 -t} i-3/4) / (t i-1 -t i), R2 = (t i-3/4 -t i-1/2) / (T _i−1 −t _i ) , R 3 = (t _{i−1 / 2} −t _{i−1 / 4} ) / (t _i−1 −t _i ) , R 4 = (t _{i−1 / 4} −t _i) ) / (T _i-1 −t _i ) , where R1 = R2 = R3 = R4 = R.

Timing, ti-1 to ti-3 / 4;
In ti-1 / 2 to ti- ／, the scanning line and the signal electrode and the individually designated voltage are applied simultaneously and simultaneously, and the scanning voltage and the signal voltage are applied simultaneously. The scanning lines include the values in the k-th column and the i-th row of the conversion matrix H, H
scan voltage proportional to ik, ie, K · V
a potential close to b · Hik / √R and K · Vb · Hik / √R
However, a potential of the opposite polarity is applied, and the j-th signal electrode of the conversion display matrix B
A signal voltage proportional to the numerical value Bij in the i-th row and j-th column, that is, a potential close to Vb · Bij / √R and Vb
When a potential close to Bij / √R is applied but a potential of the opposite polarity is applied and each element of the display matrix A is Aij, the timing, ti−3 / 4 to ti−1 / 2, and ti− ／ ~ T
In i, 0 potential is applied to all the scanning lines, and j
At the same timing, a potential close to Vc = Vb {256 × (1- {iAij2 / N) / R} and a potential Vc = Vb {256 × (1- {iAij2)
/ N) / R｝, but potentials of opposite polarities were applied at respective timings, thus completing the halftone display.

The operation could be performed at high speed, and the transmittance at the time of displaying black was remarkably reduced.

In the display of a natural image, there were cases where a row having a large number of halftone pixels appeared as a black band in the liquid crystal panel, but this was completely resolved, and a clear image was obtained. According to this method, about 128 gradations
It was evaluated as realistic.

Although the embodiments described above relate to a matrix type simple liquid crystal display device, the present invention can be applied to a matrix type display device in which the effective voltage value response is the dominant mechanism.

That is, the present invention is applicable not only to a liquid crystal display device but also to a matrix type display device based on a similar principle.

[0099]

As is apparent from the above description,
According to the present invention, it is possible to realize a driving method of a gradation display matrix type display device which can perform gradation display and has excellent display quality.

[Brief description of the drawings]

FIG. 1 is a block diagram of a system for realizing a driving method of a gray scale display matrix type display device of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 1st 240x640-frame-buffer memory 2 2nd 240x640-frame-buffer memory 3 240x640 pixel matrix type simple liquid crystal display device 4 Matrix element generation ROM 5 Scan side voltage register 6 Signal side information Arithmetic circuit 7 Signal-side output arithmetic circuit 8 High-speed digital-analog converter (DAC) 9 Analog-signal-driver 10 Tri-value-scanning-driver

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) G02F 1/133 575 G02F 1/133 545

Claims (9)

(57) [Claims] 1. When β is a real number greater than 0 or less than N and less than N, a transformation matrix that is an orthogonal N-th order square matrix in which the norm of all column vectors or row vectors is N−β. Display pattern of 1 frame using H generator
The display matrix A of N rows and M columns corresponding to the matrixes is arranged such that the rows and columns of the matrix A correspond to the rows and columns of the matrix display device including the order , and are completely ON pixels in binary display. Is-
1 is defined such that +1 corresponds to a completely OFF pixel, and the display matrix A is converted by a matrix multiplication method as follows: H · A = B to obtain a converted display matrix B, and one frame period T is defined as It is divided into N slots, and during one frame period T = t _n -t ₀ , t _{0 to} t ₁ ,
_{t 1 ~t 2, t 2 ~t} 3, ......, in updating the voltage applied to all pixels in t _n-1 ~t _n, the timing, the timing t _i-1 ~t _i
At the scan line, and at the signal electrode, individually designated
The scanning voltage and the signal voltage are applied simultaneously and entirely to optimize the display, and the scanning voltage at that time is K · V
b · H _ik, a signal voltage so that Vb · B _ij, proportional constant K, leave predetermine Vb, however, the scanning electron to this time, the scanning lines of the k-th row
The pressure is proportional to the value of column k and row i of the transformation matrix H, _Hik.
And the signal voltage for the signal electrode in the j-th column.
The pressure is a value in the i-th row and the j-th column of the conversion display matrix B, and a voltage proportional to B _ij.
However, +1 corresponds to a completely OFF pixel, and a display matrix A for associating a halftone display pixel with a real number from -1 to +1 corresponding to the halftone, by · a = B, to obtain a conversion display matrix B, each slot, t _i-1 ~t _i two semi slots, t _i-1
And ~t _i-1/2, so as to be composed of _{t i-1/2 ~t i} ,
The ratios R1 and R2 are calculated as follows: R1 = (t _i−1 −t _{i−1 / 2} ) / (t _i−1 −t
_{i), R2 = (t i} -1/2 -t i) / (t i-1 -t i), define the timing in the _{t i-1 ~t i-1} /2, the k-th row Running
The査線, k columns of the transformation matrix H, figures i line, the H _ik
Proportional voltage, that is close to K · Vb · H _ik / √R1
The voltage is applied to the signal electrode of the j-th column by the conversion display matrix B.
, A voltage proportional to B _ij , ie, Vb
A voltage near · B _ij / √R1, overall, is applied at the same time, when each element of the display matrix A and A _ij, timing, in the _{t i-1/2 ~t i} , to all the scan lines gives zero potential, at the same timing in the j-th signal electrode, Vc = Vb × √ {( N-β) (1-Σ i a ij 2 / N) / R2} a voltage is applied close to (sigma _i is i = 1, 2,..., N), and a halftone display is completed. 2. When β is 0 or a real number greater than 0 and smaller than N, a transformation matrix H which is an orthogonal N-order square matrix in which the norm of all column vectors or row vectors is N−β. The display matrix A of N rows and M columns corresponding to the display pattern of one frame is paired with the rows and columns of the matrix A , including the order in the rows and columns of the matrix display device. > as respond, and, when the binary display for the complete oN pixel -1, completely OFF pixel is defined as +1 corresponding, by matrix multiplication, as H · a = B The display matrix A is converted to obtain a converted display matrix B. One frame period T is divided into N slots, and in one frame period T = t _n -t ₀ , t _{0 to} t ₁ ,
_{t 1 ~t 2, t 2 ~t} 3, ......, in updating the voltage applied to all pixels in t _n-1 ~t _n, the timing, the timing t _i-1 ~t _i
At the scan line, and at the signal electrode, individually designated
The scanning voltage and the signal voltage are applied simultaneously and entirely to optimize the display, and the scanning voltage at that time is K · V
b · H _ik, a signal voltage so that Vb · B _ij, proportional constant K, leave predetermine Vb, however, the scanning electron to this time, the scanning lines of the k-th row
The pressure is proportional to the value of column k and row i of the transformation matrix H, _Hik.
And the signal voltage for the signal electrode in the j-th column.
The pressure is a value in the i-th row and the j-th column of the conversion display matrix B, and a voltage proportional to B _ij.
However, +1 corresponds to a completely OFF pixel, and a display matrix A for associating a halftone display pixel with a real number from -1 to +1 corresponding to the halftone, by · a = B, to obtain a conversion display matrix B, each slot, t _i-1 ~t _i two semi slots, t _i-1
And ~t _i-1/2, so as to be composed of _{t i-1/2 ~t i} ,
The ratios R1 and R2 are calculated as follows: R1 = (t _i−1 −t _{i−1 / 2} ) / (t _i−1 −t
_{i), R2 = (t i} -1/2 -t i) / (t i-1 -t i), define the timing in the _{t i-1 ~t i-1} /2, the k-th row Running
The査線, k columns of the transformation matrix H, figures i line, the H _ik
Proportional voltage, that is close to K · Vb · H _ik / √R1
The voltage is applied to the signal electrode of the j-th column by the conversion display matrix B.
, A voltage proportional to B _ij , ie, Vb
The · B _ij / √R1 voltage close to a whole, is applied at the same time, when each element of the display matrix preA of the previous frame and preA _ij, timing, in the _{t i-1/2 ~t i} , all A zero potential is applied to the scanning line, and a voltage close to Vc = Vb × {(N-β) (1- { _i preA _ij ² / N) / R2} is applied to the j-th signal electrode at the same timing. A driving method for a gray scale display type display device, wherein the halftone display is completed by applying voltage (印 加_i ranges from i = 1, 2,..., N). 3. When β is a real number greater than 0 or less than 0 and less than N, a transformation matrix H that is an orthogonal N-order square matrix in which the norm of all column vectors or row vectors is N−β. The display matrix A of N rows and M columns corresponding to the display pattern of one frame is paired with the rows and columns of the matrix A , including the order in the rows and columns of the matrix display device. > as respond, and, when the binary display for the complete oN pixel -1, completely OFF pixel is defined as +1 corresponding, by matrix multiplication, as H · a = B The display matrix A is converted to obtain a converted display matrix B. One frame period T is divided into N slots, and in one frame period T = t _n -t ₀ , t _{0 to} t ₁ ,
_{t 1 ~t 2, t 2 ~t} 3, ......, in updating the voltage applied to all pixels in t _n-1 ~t _n, the timing, at the timing t _i-1 ~t _i, a scan line , And signal electrodes, individually designated scanning voltages and signal voltages are applied simultaneously and entirely to optimize the display, and the scanning voltage at that time is K · Vb · _Hik and the signal voltage is Vb. · B _ij consisting way, the proportionality constant K, leave predetermine Vb, however, the scanning electron to this time, the scanning lines of the k-th row
The pressure is proportional to the value of column k and row i of the transformation matrix H, _Hik.
And the signal voltage for the signal electrode in the j-th column.
Pressure value of row i and column j of the display transformation matrix B, proportional to B _ij
The voltage and pear, then, when implementing the gradation display for the complete ON pixels -1
However, +1 corresponds to a completely OFF pixel, and a display matrix A for associating a halftone display pixel with a real number from -1 to +1 corresponding to the halftone, · a = a B, give the conversion display matrix B, 1 frame of N time width W1 slots, S _1, S _2, ...
..., S _n, and Z number of times the width W2 _{slots, X 1, X 2, ...} , and consists of X _{Z, slots, S 1, S 2, ......} , S n, a, (N / Z) Divided into subgroups _S1,1 , _S1,2 ,..., S1 _{, n / Z} , _{S2,1,.
S 2, n / Z, S} 3,1, and _{......, S Z, n / Z} , and the temporal structure of one _{frame, S 1,1, S 1,2, ......} , S 1, n / _Z, X _1, S
_2,1 , S _2,2 ,..., S _{2, n / Z} , X ₂ , S _{3,1,.
Z, n / Z} , and at the timing of the slot S _{f, g} , the k-th scanning line has k columns of the conversion matrix H, i =
{(F-1) N / Z + g} Numerical value in row, electric power proportional to _Hik
Pressure, ie K · Vb · _Hik / {T / (N · W1)}
A close voltage is applied to the signal electrode in the j-th column in proportion to the numerical value in the i- th row and the j-th column of the conversion display matrix B, _Bij .
Voltage, that is , close to Vb · B _ij / {T / (N · W1)}
Voltage is applied simultaneously and as a whole, and each element of the display matrix A is A _ij . At the timing of the slot _Xf , 0 potential is applied to all the scanning lines and the j-th signal electrode is At the same timing, Vc = Vb × √ ｛(N−β) (N / Z−Σ _i A _ij ² / Z)
· T / (N · W 2 )} a voltage is applied close to (but, sigma _i is, i = 1,2, ...
.., N). A method of driving a gray scale display matrix type display device, wherein a halftone display is completed. 4. When β is a real number greater than 0 or smaller than N and smaller than N, a transformation matrix H which is an orthogonal N-order square matrix in which the norm of all column vectors or row vectors is N−β. The display matrix A of N rows and M columns corresponding to the display pattern of one frame is paired with the rows and columns of the matrix A , including the order in the rows and columns of the matrix display device. > as respond, and, when the binary display for the complete oN pixel -1, completely OFF pixel is defined as +1 corresponding, by matrix multiplication, as H · a = B The display matrix A is converted to obtain a converted display matrix B. One frame period T is divided into N slots, and in one frame period T = t _n -t ₀ , t _{0 to} t ₁ ,
_{t 1 ~t 2, t 2 ~t} 3, ......, in updating the voltage applied to all pixels in t _n-1 ~t _n, the timing, the timing t _i-1 ~t _i
At the scan line, and at the signal electrode, individually designated
The scanning voltage and the signal voltage are applied simultaneously and entirely to optimize the display, and the scanning voltage at that time is K · V
b · H _ik, a signal voltage so that Vb · B _ij, proportional constant K, leave predetermine Vb, however, the scanning electron to this time, the scanning lines of the k-th row
The pressure is proportional to the value of column k and row i of the transformation matrix H, _Hik.
And the signal voltage for the signal electrode in the j-th column.
The pressure is a value in the i-th row and the j-th column of the conversion display matrix B, and a voltage proportional to B _ij.
However, +1 corresponds to a completely OFF pixel, and a display matrix A for associating a halftone display pixel with a real number from -1 to +1 corresponding to the halftone, · a = a B, give the conversion display matrix B, 1 frame of N time width W1 slots, S _1, S _2, ...
..., S _n, and Z number of times the width W2 _{slots, X 1, X 2, ...} , and consists of X _{Z, slots, S 1, S 2, ......} , S n, a, (N / Z) Divided into subgroups _S1,1 , _S1,2 ,..., S1 _{, n / Z} , _{S2,1,.
S 2, n / Z, S} 3,1, and _{......, S Z, n / Z} , and the temporal structure of one _{frame, S 1,1, S 1,2, ......} , S 1, n / _Z , X ₁ , S _2,1 ,
_{S 2,2, ......, S 2,} n / Z, X 2, S 3,1, ......, S Z, n / Z,
At the timing of the slot S _{f, g} , the k-th scanning line has k columns of the conversion matrix H, i =
{(F-1) N / Z + g} Numerical value in row, electric power proportional to _Hik
Pressure, ie K · Vb · _Hik / {T / (N · W1)}
A similar voltage is applied to the signal electrode of the j-th column in the conversion display row.
The voltage proportional to _Bij , the numerical value at column i and row j , ie,
When a voltage close to Vb · B _ij / {T / (N · W1)} is applied simultaneously and as a whole, and each element of the display matrix preA of the immediately preceding frame is preA _ij , at the timing of slot _Xf , 0 potential is applied to all the scanning lines, and the same timing is applied to the j-th signal electrode, and Vc = Vb × Ｖ (N-β) (N / Z-Σ _i preA _ij ² /
Z) · T / (N · W 2)} a voltage is applied close to (but, sigma _i is, i = 1,2, ...
.., N). A method of driving a gray scale display matrix type display device, wherein a halftone display is completed. 5. When β is 0 or a real number greater than 0 and smaller than N, a transformation matrix H which is an orthogonal N-order square matrix in which the norm of all column vectors or row vectors is N−β. The display matrix A of N rows and M columns corresponding to the display pattern of one frame is paired with the rows and columns of the matrix A , including the order in the rows and columns of the matrix display device. > as respond, and, when the binary display for the complete oN pixel -1, completely OFF pixel is defined as +1 corresponding, by matrix multiplication, as H · a = B The display matrix A is converted to obtain a converted display matrix B. One frame period T is divided into N slots, and in one frame period T = t _n -t ₀ , t _{0 to} t ₁ ,
_{t 1 ~t 2, t 2 ~t} 3, ......, in updating the voltage applied to all pixels in t _n-1 ~t _n, the timing, at the timing t _i-1 ~t _i, a scan line , And signal electrodes, individually designated scanning voltages and signal voltages are applied simultaneously and entirely to optimize the display, and the scanning voltage at that time is K · Vb · _Hik and the signal voltage is Vb. · B _ij consisting way, the proportionality constant K, leave predetermine Vb, however, the scanning electron to this time, the scanning lines of the k-th row
The pressure is proportional to the value of column k and row i of the transformation matrix H, _Hik.
And the signal voltage for the signal electrode in the j-th column.
The pressure is a value in the i-th row and the j-th column of the conversion display matrix B, and a voltage proportional to B _ij.
However, +1 corresponds to a completely OFF pixel, and a display matrix A for associating a halftone display pixel with a real number from -1 to +1 corresponding to the halftone, A = B obtains a conversion display matrix B, and converts each slot, t _{i-1 to} t _i into four semi-slots, t _{i-1 to} t _{i-3 / 4} and t _{i-3 / 4 to} t _{i-1 / 2} , t _{i-1 / 2 to} t
_{i-1/4, t i} -1/4 ~t i, so as to be composed, the ratio R1, R2, R3, R4 and _{R1 = (t i-3/} 4 -t i-1) / (t _i− t _i−1 ), R2 = (t _{i−1 / 2} −t _{i−3 / 4} ) / (t _i− t _i−1 ), R3 = (t _{i−1 / 4} −t _{i−1) / 2) / (t i -t} i-1), R4 = (t i -t i-1/4) / (t i -t i-1), and defines timing, t _i-1 ~t _{In i-3 / 4} and t _{i-1 / 2 to} t _{i-1 / 4} , the k-th scanning line is proportional to the k column of the conversion matrix H, the numerical value of the i row, and H _ik the voltage, i.e., respectively, the applied voltage near the _{K · Vb · H ik / √R1} , close to _{K · Vb · H ik / √R3} , a voltage of the same polarity
The signal electrode of the j-th column has the i
Numerical row j-th column, a voltage proportional to B _ij, i.e., respectively, and a voltage close to Vb · B _ij / √R1, close to Vb · B _ij / √R3, a voltage of the same polarity, overall, is applied at the same time , when each element of the display matrix a and a _ij, timing, and _{t i-3/4 ~t i} -1/2, in the _{t i-1/4 ~t i} , all scan lines, gives zero potential, at the same timing in the j-th signal electrode, respectively, Vc = Vb × √ {( N-β) (1-Σ i a ij 2 / N) / R
2｝, and Vc = Vb × √ ｛(N-β) (1−Σ _i A _ij ² / N) / R
4 the same polarity of voltage close to}, is applied at each timing (sigma _i is, i = 1, 2, ......, over the N), gray-scale display matrix, characterized in that to complete the half-tone display The driving method of the display device. 6. When β is 0 or a real number greater than 0 and smaller than N, a transformation matrix H which is an orthogonal N-order square matrix in which the norm of all column vectors or row vectors is N−β. The display matrix A of N rows and M columns corresponding to the display pattern of one frame is paired with the rows and columns of the matrix A , including the order in the rows and columns of the matrix display device. > as respond, and, when the binary display for the complete oN pixel -1, completely OFF pixel is defined as +1 corresponding, by matrix multiplication, as H · a = B The display matrix A is converted to obtain a converted display matrix B. One frame period T is divided into N slots, and in one frame period T = t _n -t ₀ , t _{0 to} t ₁ ,
_{t 1 ~t 2, t 2 ~t} 3, ......, in updating the voltage applied to all pixels in t _n-1 ~t _n, the timing, at the timing t _i-1 ~t _i, a scan line , And signal electrodes, individually designated scanning voltages and signal voltages are applied simultaneously and entirely to optimize the display, and the scanning voltage at that time is K · Vb · _Hik and the signal voltage is Vb. · B _ij consisting way, the proportionality constant K, leave predetermine Vb, however, the scanning electron to this time, the scanning lines of the k-th row
The pressure is proportional to the value of column k and row i of the transformation matrix H, _Hik.
And the signal voltage for the signal electrode in the j-th column.
The pressure is proportional to the numerical value B _ij of the row i and the column j of the conversion display column B.
In the case of realizing a gray scale display with a voltage and none, -1 is set to a completely ON pixel.
However, +1 corresponds to a completely OFF pixel, and a display matrix A for associating a halftone display pixel with a real number from -1 to +1 corresponding to the halftone, A = B obtains a conversion display matrix B, and converts each slot, t _{i-1 to} t _i into four semi-slots, t _{i-1 to} t _{i-3 / 4} and t _{i-3 / 4 to} t _{i-1 / 2} , t _{i-1 / 2 to} t
_{i-1/4, t i} -1/4 ~t i, so as to be composed, the ratio R1, R2, R3, R4 and _{R1 = (t i-3/} 4 -t i-1) / (t _i− t _i−1 ), R2 = (t _{i−1 / 2} −t _{i−3 / 4} ) / (t _i− t _i−1 ), R3 = (t _{i−1 / 4} −t _{i−1) / 2) / (t i -t} i-1), R4 = (t i -t i-1/4) / (t i -t i-1), and defines timing, t _i-1 ~t _{In i-3 / 4} and t _{i-1 / 2 to} t _{i-1 / 4} , the k-th scanning line is proportional to the k column of the conversion matrix H, the numerical value of the i row, and H _ik the voltage, i.e., respectively, the applied voltage near the _{K · Vb · H ik / √R1} , close to _{K · Vb · H ik / √R3} , a voltage of the same polarity
The signal electrode of the j-th column has the i
Numerical row j-th column, a voltage proportional to B _ij, i.e., respectively, and a voltage close to Vb · B _ij / √R1, close to Vb · B _ij / √R3, a voltage of the same polarity, overall, is applied at the same time , when each element of the display matrix preA of the previous frame and preA _ij, timing, and _{t i-3/4 ~t i} -1/2, in the _{t i-1/4 ~t i} , all the scanning 0 potential is applied to the line, and at the same timing, the j-th signal electrode is given by Vc = Vb × √ ｛(N-β) (1-Σ _i preA _ij ² / N) /
R2 and}, Vc = Vb × √ { (N-β) (1-Σ i preA ij 2 / N) /
The same polarity voltage close to R4}, is applied at each timing (sigma _i is, i = 1,2, ......, over the N), gray-scale display matrix, characterized in that to complete the half-tone display The driving method of the display device. 7. When β is 0 or a real number greater than 0 and smaller than N, a transformation matrix H which is an orthogonal N-order square matrix in which the norm of all column vectors or row vectors is N−β. The display matrix A of N rows and M columns corresponding to the display pattern of one frame is paired with the rows and columns of the matrix A , including the order in the rows and columns of the matrix display device. > as respond, and, when the binary display for the complete oN pixel -1, completely OFF pixel is defined as +1 corresponding, by matrix multiplication, as H · a = B The display matrix A is converted to obtain a converted display matrix B. One frame period T is divided into N slots, and in one frame period T = t _n -t ₀ , t _{0 to} t ₁ ,
_{t 1 ~t 2, t 2 ~t} 3, ......, in updating the voltage applied to all pixels in t _n-1 ~t _n, the timing, at the timing t _i-1 ~t _i, a scan line , And signal electrodes, individually designated scanning voltages and signal voltages are applied simultaneously and entirely to optimize the display, and the scanning voltage at that time is K · Vb · _Hik and the signal voltage is Vb. · B _ij consisting way, the proportionality constant K, leave predetermine Vb, however, the scanning electron to this time, the scanning lines of the k-th row
The pressure is proportional to the value of column k and row i of the transformation matrix H, _Hik.
And the signal voltage for the signal electrode in the j-th column.
The pressure is a value in the i-th row and the j-th column of the conversion display matrix B, and a voltage proportional to B _ij.
However, +1 corresponds to a completely OFF pixel, and a display matrix A for associating a halftone display pixel with a real number from -1 to +1 corresponding to the halftone, A = B obtains a conversion display matrix B, and converts each slot, t _{i-1 to} t _i into four semi-slots, t _{i-1 to} t _{i-3 / 4} and t _{i-3 / 4 to} t _{i-1 / 2} , t _{i-1 / 2 to} t
_{i-1/4, t i} -1/4 ~t i, so as to be composed, the ratio R1, R2, R3, R4 and _{R1 = (t i-3/} 4 -t i-1) / (t _i− t _i−1 ), R2 = (t _{i−1 / 2} −t _{i−3 / 4} ) / (t _i− t _i−1 ), R3 = (t _{i−1 / 4} −t _{i−1) / 2) / (t i -t} i-1), R4 = (t i -t i-1/4) / (t i -t i-1), and defines timing, t _i-1 ~t _{In i-3 / 4} and t _{i-1 / 2 to} t _{i-1 / 4} , the k-th scanning line is proportional to the k column of the conversion matrix H, the numerical value of the i row, and H _ik the voltage, i.e., respectively, the voltage near the _{K · Vb · H ik / √R1} , close to _{K · Vb · H ik / √R3} , the opposite polarity of the voltage applied
The signal electrode of the j-th column has the i
A voltage in proportion to the numerical value in the row j column, B _ij , that is, a voltage close to Vb · B _ij / √R 1 and a voltage close to Vb · B _ij / √R 3, respectively, having opposite polarities , are simultaneously applied. , when each element of the display matrix a and a _ij, timing, and _{t i-3/4 ~t i} -1/2, in the _{t i-1/4 ~t i} , all scan lines, gives zero potential, at the same timing in the j-th signal electrode, respectively, Vc = Vb × √ {( N-β) (1-Σ i a ij 2 / N) / R
2｝, and Vc = Vb × √ ｛(N-β) (1−Σ _i A _ij ² / N) / R
4 reverse polarity voltage near}, is applied at each timing (sigma _i is, i = 1, 2, ......, over the N), gray-scale display matrix, characterized in that to complete the half-tone display The driving method of the display device. 8. When β is a real number greater than 0 or less than 0 and less than N, a transformation matrix H that is an orthogonal N-order square matrix in which the norm of all column or row vectors is N−β. The display matrix A of N rows and M columns corresponding to the display pattern of one frame is paired with the rows and columns of the matrix A , including the order in the rows and columns of the matrix display device. > as respond, and, when the binary display for the complete oN pixel -1, completely OFF pixel is defined as +1 corresponding, by matrix multiplication, as H · a = B The display matrix A is converted to obtain a converted display matrix B. One frame period T is divided into N slots, and in one frame period T = t _n −t ₀ , t _{0 to} t ₁ ,
_{t 1 ~t 2, t 2 ~t} 3, ......, in updating the voltage applied to all pixels in t _n-1 ~t _n, the timing, the timing t _i-1 ~t _i
At the scan line, and at the signal electrode, individually designated
The scanning voltage and the signal voltage are applied simultaneously and entirely to optimize the display, and the scanning voltage at that time is K · V
b · H _ik, a signal voltage so that Vb · B _ij, proportional constant K, leave predetermine Vb, however, the scanning electron to this time, the scanning lines of the k-th row
The pressure is proportional to the value of column k and row i of the transformation matrix H, _Hik.
And the signal voltage for the signal electrode in the j-th column.
The pressure is a value in the i-th row and the j-th column of the conversion display matrix B, and a voltage proportional to B _ij.
However, +1 corresponds to a completely OFF pixel, and a display matrix A for associating a halftone display pixel with a real number from -1 to +1 corresponding to the halftone, A = B obtains a conversion display matrix B, and converts each slot, t _{i-1 to} t _i into four semi-slots, t _{i-1 to} t _{i-3 / 4} and t _{i-3 / 4 to} t _{i-1 / 2} , t _{i-1 / 2 to} t
_{i-1/4, t i} -1/4 ~t i, so as to be composed, the ratio R1, R2, R3, R4 and _{R1 = (t i-3/} 4 -t i-1) / (t _i− t _i−1 ), R2 = (t _{i−1 / 2} −t _{i−3 / 4} ) / (t _i− t _i−1 ), R3 = (t _{i−1 / 4} −t _{i−1) / 2) / (t i -t} i-1), R4 = (t i -t i-1/4) / (t i -t i-1), and defines timing, t _i-1 ~t _{In i-3 / 4} and t _{i-1 / 2 to} t _{i-1 / 4} , the k-th scanning line is proportional to the k column of the conversion matrix H, the numerical value of the i row, and H _ik the voltage, i.e., respectively, the voltage near the _{K · Vb · H ik / √R1} , close to _{K · Vb · H ik / √R3} , the opposite polarity of the voltage applied
The signal electrode of the j-th column has the i
Numerical row j-th column, a voltage proportional to B _ij, i.e., respectively, and a voltage close to Vb · B _ij / √R1, close to Vb · B _ij / √R3, a reverse polarity voltage, overall, it is applied at the same time , when each element of the display matrix preA of the previous frame and preA _ij, timing, and _{t i-3/4 ~t i} -1/2, in the _{t i-1/4 ~t i} , all the scanning 0 potential is applied to the line, and at the same timing, the j-th signal electrode is given by Vc = Vb × √ ｛(N-β) (1-Σ _i preA _ij ² / N) /
R2 and}, Vc = Vb × √ { (N-β) (1-Σ i preA ij 2 / N) /
The reverse polarity voltage close to R4}, is applied at each timing (sigma _i is, i = 1,2, ......, over the N), gray-scale display matrix, characterized in that to complete the half-tone display The driving method of the display device. 9. The method of driving a gray scale display matrix type display device according to claim 1, wherein an alternating current is applied in two frames.