JP2950171B2 - Reception alarm circuit and regenerative repeater - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reception alarm circuit and a regenerative repeater in digital transmission.

[0002]

2. Description of the Related Art FIG. 4 is a block diagram showing a reception alarm circuit and a regenerative repeater of this kind which have been conventionally used.

In the regenerative repeater 40, the equalizing amplifier 4
Numeral 1 equalizes and amplifies the received signal S of the digital transmission into a waveform that can obtain the optimum identification sensitivity. The DC regeneration unit 42 detects the DC component of the output of the equalization amplification unit 41 and feeds back the DC component to the received signal S. The identification reproducing section 43 identifies and reproduces the equalized signal EQ generated by the equalizing amplification section 41. The timing extraction unit 44 extracts a timing component from the equalized signal EQ generated by the equalization amplification unit 41 to generate a clock signal C and a timing extraction signal T, and supplies the clock signal C to the identification reproduction unit 43. , The timing extraction signal T is supplied to a peak detection circuit 46.

In the reception alarm circuit 45, a peak detection circuit 46 detects a peak value of a timing component in the timing extraction section 44, generates a voltage correlated with the peak value, and supplies it to a comparison circuit 48 as a peak detection signal P. The reference voltage circuit 47 generates a reference voltage serving as a threshold and supplies the reference voltage to the comparison circuit 48. The comparing circuit 48 compares the reference voltage with the voltage P correlated with the peak value, and when the voltage P correlated with the peak value is lower than the reference voltage, sends an alarm signal A. A reset signal R for resetting the output signal of the unit 44 is generated, and the data signal D and the clock signal C are reset.

[0005]

FIG. 5 is a diagram showing a relationship between a received signal level and a peak detection output level (a voltage correlated with a peak value) in a conventional technique using a mark ratio as a parameter. The mark ratio refers to n / N when n bits of “1” are present in a certain finite domain N bits of a received digital signal.

B indicates the characteristic of the relationship between the received signal level and the peak detection output level when the mark rate is 1/2. When the received signal level E crosses the set threshold voltage (reference voltage) or lower, an alarm signal is generated. Is transmitted, and the data signal and the clock signal are reset. In this case, the received signal level E is set to a discriminable limit level.

[0007] Even if the amplitude of the received signal is the same as the identifiable amplitude, if the mark rate is reduced or increased below 1/2, the characteristics of the relationship between the received signal level and the peak detection output level are both A or C. Change in direction. In this case, since the set threshold value is constant, an alarm signal is transmitted at reception levels D and F higher than the recognizable reception level E, and the data signal and the clock signal are reset.
For this reason, an alarm signal is sent out even though reception is still possible,
There is a disadvantage that the data signal and the clock signal are reset.

[0008]

According to the reception alarm circuit of the present invention, an equalizing amplification unit, a DC regeneration unit, an identification regeneration unit,
In a reception alarm circuit of a regenerative repeater having a timing extractor, a timing extractor detects a peak value of a timing component and generates a voltage correlated to the peak value, and a DC regenerator detects a mark ratio. With the mark rate 1/2 as the peak and the mark rate 1/2 as the center
Output voltage decreases in proportion to increase and decrease of mark rate
A mark ratio detection circuit that generates a voltage correlated with the mark ratio to be compared with a voltage correlated with the peak value using the voltage correlated with the mark ratio as a threshold, and a voltage correlated with the peak value is determined as a threshold. It has a comparison circuit that issues an alarm signal if lower.

A regenerative repeater according to the present invention has the above-mentioned reception alarm circuit.

[0010]

In the receiving alarm circuit and the regenerative repeater according to the present invention, a voltage correlated with the mark rate is input as a threshold value to the comparison circuit for transmitting the alarm signal. Fluctuations in the characteristics related to the level are corrected, an alarm signal is transmitted stably at the set received signal level, and the data signal and the clock signal are reset.

[0011]

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of a regenerative repeater according to an embodiment of the present invention. The equalizing amplifier 11 equalizes and amplifies the received signal S of the digital transmission into a waveform that provides the optimum identification sensitivity, and generates an equalized signal EQ. The equalized signal EQ is input to the identification reproducing unit 13 and the timing extracting unit 14. The DC regeneration unit 12 detects a DC signal component output from the equalization amplification unit, and feeds back the DC signal component to the received signal S to reproduce the DC component. The identification reproducing unit 13 identifies and reproduces the equalized signal EQ generated by the equalizing amplification unit based on the clock signal C input from the timing extracting unit 14, and generates a data signal D. The timing extraction unit 14 is configured to output the equalized signal EQ generated by the equalization amplification unit.
A clock signal C and a timing extraction signal T are generated by extracting a timing component from the clock signal C. The clock signal C is supplied to the discrimination / reproduction unit 13 and the outside, and the timing extraction signal T is supplied to a peak detection circuit 16.

In the reception alarm circuit 15, the peak detection circuit 16 detects the peak value of the timing component based on the timing extraction signal T input from the timing extraction unit 14, and outputs a voltage correlated with the peak value to the peak detection signal P.
Is output to the comparison circuit 18. Mark ratio detection circuit 1
In 7, the mark rate is detected by the input from the DC reproducing unit 12, and a voltage correlated with the mark rate is detected by the mark rate detection signal M.
Is output to the comparison circuit 18. The comparison circuit 18 compares the peak detection signal P with the peak detection signal P using the mark ratio detection signal M as a threshold. When the peak detection signal P is lower than the threshold, an alarm signal A is transmitted to the outside, and the reset signal R is identified. The data signal D and the clock signal C transmitted to the reproducing unit 13 and the timing extracting unit 14 are reset.

When the mark rate increases or decreases by more than 1/2, the peak detection output level for the same received signal level decreases, but the mark rate detection signal level serving as a threshold also decreases. Signal R
Is stabilized at the set received signal level.

FIG. 2 is a connection diagram of main components of the reception alarm circuit of the present invention. FIG. 3 is a diagram showing the relationship between the mark ratio and the amplitudes X1 and X2 of the signal from the DC reproducing unit 12 (a).
(B) showing the relationship between the mark ratio and the mark ratio detection signal level M, (c) showing the relationship between the received signal level and the peak detection output level P using the mark ratio as a parameter, and the threshold value of the comparison circuit. It is a figure which shows the relationship between (b) and (c) through FIG.

The DC signals X1 and X2 output from the DC reproducing section 12 by the linear amplifier a22 in a differential manner are input to the mark ratio detecting circuit 17. FIG. 3 shows the relationship between the mark ratio and the amplitudes X1 and X2 of the signal from the DC reproducing unit 12 at that time.
(A).

The mark ratio detection circuit 17 comprises a differential amplifier 23, and inverts and amplifies the difference potential between the inputs X1 and X2. FIG. 3B shows the relationship between the mark ratio and the mark ratio detection signal level M at that time. If the mark ratio is 0 / n to 1/2, X
1, the difference potential of X2 is positive, the difference potential decreases as the mark rate increases, and the mark rate detection signal level M increases.

Since the difference potential becomes 0 at the mark ratio of 1/2, the output M becomes maximum. Similarly, the difference potential between X1 and X2 is negative until the mark rate is 1/2 to n / n, and the difference potential increases as the mark rate increases, and the mark rate detection signal level M decreases. At this time, the output M is output from the comparator 3 of the comparison circuit 18.
It is generated at a level that operates as a reference voltage of 0, and is output to the comparator 30.

In the peak detection circuit 16, the capacitor 28
And the linear amplifier d detects the average value of the timing extraction signal T from the linear amplifier b25 of the timing extraction unit 14. The timing component is a signal having a mark rate of 1/2, and the average value is a value correlated with the peak value. The average value is used as a peak value, amplified to a voltage level appropriate for the operation of the comparator 30 of the comparison circuit 18, and output to the comparator 30 as a peak detection signal P.

FIG. 3C shows the relationship between the received signal level and the peak detection output level using the mark ratio as a parameter. Assuming that B is the case where the mark rate is 1/2, the mark rate detection signal level at that time becomes E from the figure (b), and this becomes the threshold value of the comparison circuit. The relationship between the received signal level and the peak detection output level at that time is shown by the line B in FIG. Therefore, the level below the reception signal level G where the line intersects the threshold value E is the emission level of the alarm signal and the reset signal.

When the mark rate decreases to A, the mark rate detection signal level at that time becomes D from FIG. 7B, and this becomes the threshold value of the comparison circuit. The relationship between the received signal level and the peak detection output level at that time is indicated by the line A in FIG. Therefore, the level below the reception signal level G where the line intersects the threshold value D is the level at which the alarm signal and the reset signal are issued.

When the mark rate increases to C, the mark rate detection signal level at that time becomes F from FIG. 7B, and this becomes the threshold value of the comparison circuit. The relationship between the received signal level and the peak detection output level at that time is indicated by the line C in FIG. Therefore, the level below the reception signal level G where the line intersects the threshold value F is the emission level of the alarm signal and the reset signal.

As described above, in this embodiment, the received signal level for issuing the alarm signal is kept constant irrespective of the change of the mark rate of the received signal, and the data signal and the clock signal are reset at the same received signal level regardless of the mark rate. It becomes possible to do.

[0024]

As described above, according to the present invention, the level of the received signal for generating the alarm signal or the reset signal of the regenerative repeater can be kept constant irrespective of the change in the mark rate.
Even if the mark rate decreases or increases, it is possible to prevent an erroneous operation such as issuing an alarm signal or a reset signal at an identifiable reception signal level and resetting a data signal or a clock signal output.

[Brief description of the drawings]

FIG. 1 is a block diagram of a regenerative repeater according to an embodiment of the present invention.

FIG. 2 is a connection diagram of main components of the reception alarm circuit of the present invention.

3A is a diagram illustrating a relationship between a mark ratio and amplitudes X1 and X2 of a signal from a DC reproducing unit 12. FIG. (B) is a diagram showing a relationship between a mark rate and a mark rate signal level M. (C) is a diagram showing the relationship between the received signal level and the peak detection output level P using the mark ratio as a parameter.

FIG. 4 is a block diagram of a conventional reception alarm circuit and a regenerative repeater.

FIG. 5 is a diagram showing a relationship between a received signal level and a peak detection output level using a mark ratio as a parameter in the related art.

[Explanation of symbols]

 Reference Signs List 10 regeneration repeater 11 equalization amplification unit 12 DC regeneration unit 13 identification regeneration unit 14 timing extraction unit 15 reception alarm circuit 16 peak detection circuit 17 mark ratio detection circuit 18 comparison circuit S reception signal EQ equalization signal C clock signal T timing extraction Signal P Peak detection signal M Mark rate detection signal A Alarm signal R Reset signal D Data signal 21 Buffer 22 Linear amplifier a 23 Differential amplifier 24 Filter 25 Linear amplifier b 26 Linear amplifier c 27 Limiter amplifier 28 Capacitor 29 Linear amplifier d 30 Comparator Reference Signs List 40 Regenerative repeater 41 Equalization amplification unit 42 DC regeneration unit 43 Identification regeneration unit 44 Timing extraction unit 45 Reception alarm circuit 46 Peak detection circuit 47 Reference voltage circuit 48 Comparison circuit

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H04B 17/00-17/02 H04B 1/76-3/44 H04B 3/50-3/60 H04L 7 / 00-7/10

Claims (2)

(57) [Claims] An equalizing amplifier for equalizing and amplifying a received signal of digital transmission into a waveform with an optimum identification sensitivity, detecting a DC component of an output of the equalizing amplifier, and feeding back a DC component to the received signal. A DC regeneration unit, an identification regeneration unit that identifies and reproduces the equalized signal generated by the equalization amplification unit, and a timing component extracted from the equalization signal generated by the equalization amplification unit to generate a clock signal In the reception alarm circuit of the regenerative repeater having a timing extraction unit for supplying a clock signal to the identification reproduction unit, the timing extraction unit detects a peak value of a timing component and generates a voltage correlated with the peak value. a peak detection circuit detects the mark ratio in the DC reproduction unit, the mark of 1
/ 2 is the peak and the mark rate is increased around the mark rate 1/2
A mark rate detection circuit that generates a voltage that is correlated with the mark rate at which the output voltage decreases in proportion to the addition and decrease, and a voltage that is correlated with the peak value with the voltage that is correlated with the mark rate as a threshold. A comparison circuit for comparing and outputting an alarm signal when a voltage correlated with the peak value is lower than the threshold value. 2. A digital transmission regeneration repeater having the reception alarm circuit according to claim 1.