JP2959682B2 - Photodiode - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to optical communication, optical information processing,
The present invention relates to a light receiving element in a field such as an image sensor.

[0002]

2. Description of the Related Art Conventionally, there is a light receiving element using amorphous silicon. This amorphous silicon pin diode can be formed on a glass substrate at low cost and in a large area, and is therefore widely used as an image sensor element in devices such as facsimile machines and copiers.

[0003]

Further, in the conventional pn or pin junction of polycrystalline silicon, the segregation of impurities at the crystal grain boundaries at the junction interface and the concentration of defects at the junction interface are a cause. As a result, there is a serious disadvantage that the density of trapping centers near the junction interface is significantly increased. For this reason, the literature (for example, Journal of the El)
electrochemical Society, vo
l. 125. No. 10 pp. 1648 of 1978), the pn or p of polycrystalline silicon
-When a reverse electric field is applied to an i-n diode, tunnel current or Poole current flows through a trap center near the junction interface.
-Frenkel current flows, and the reverse leakage current of the diode increases. For this reason, even when light is applied to the diode, the photocurrent is buried in the leak current, and cannot be used as a light receiving element.

Further, a p-type semiconductor using amorphous silicon
In the case of an i-n diode, the dark current in the reverse direction is not necessarily low when the pin diode is formed only of amorphous silicon, and light having an incident power of about 1 μW / cm ² is a detection limit. there were. 0.1 μW / cm
^In order to fabricate a high-sensitivity photodiode capable of detecting about ^two light beams, the p or n layer must be made of amorphous SiC.
It is necessary to reduce the dark current in the reverse direction by improving the thickness of the thin film or sandwiching a thin layer of amorphous SiN between the ohmic electrode and the p or n layer.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a photodiode in which a reverse leakage current is significantly reduced in a polycrystalline silicon diode and which can be used as a light receiving element. To provide.

[0006]

According to a first aspect of the present invention, a p-type semiconductor thin film and an n-type semiconductor thin film are provided on both sides of an undoped i-type semiconductor thin film formed on a substrate. In each of the arranged planar pin structures, a pi junction formed in the pin structure and n
-A photodiode characterized in that a required gate electrode is provided above, below, or above and below one or both of the i-junctions via an insulating film. According to a second aspect of the present invention, there is provided a planar pin structure in which a p-type semiconductor thin film and an n-type semiconductor thin film are disposed on both sides of an i-type semiconductor thin film which is formed on a substrate and is not doped with impurities. i
An insulating film having a negative fixed charge is provided above, below, or above and below a pi junction formed in the -n structure, and further formed in the planar pin structure. N
-A photodiode characterized in that an insulating film having a positive fixed charge is provided above, below, or above and below an i-junction. According to a third aspect of the present invention, there is provided a structure in which electrodes are disposed at both ends of an undoped i-type semiconductor thin film formed on a substrate, respectively, above or below a junction between one of the electrodes and the i-type semiconductor thin film, or An insulating film having a negative fixed charge in the film is provided above and below, and an insulating film having a positive fixed charge in the film is provided above or below, or above and below, a junction between the other of the electrodes and the i-type semiconductor. And a photodiode.

[0007]

When an appropriate voltage is applied to this gate electrode, p-i
P-channel on the i- region side of the junction, and ni-junction
An n-channel is induced on the i- region side, and the junction interface can be formed in the i-region having a low trapping center density. As a result, tunnel current passing through the trapping center or Poole
−Frenkel current and the like can be reduced, and the reverse leakage current of the diode is significantly reduced.
Therefore, polycrystalline silicon can be used for the first time as a photodiode, and amorphous silicon improves the S / N ratio with respect to light having low incident power. Further, the electrode i of the pi junction or one of the electrodes i
Negative fixation in membrane above or below, or above and below mold joint
An insulating film having a charge is provided, and an n-i junction is formed.
Or on the other electrode-i-junction or
Insulating film with positive fixed charges in the film below or above and below
, The element structure can be simplified.
You.

[0008]

[Embodiment 1] Embodiments 1 to 4 will be described below with reference to an embodiment using polycrystalline silicon. FIG.
FIG. 2 is a sectional view of the photodiode according to the first embodiment of the present invention. For example, a non-doped i-type polycrystalline silicon thin film 2 having a thickness of about 30 nm is formed on a glass substrate 1, and a boron-doped p-type polycrystalline silicon region 3 and a phosphorus-doped n-type polycrystalline silicon A crystalline silicon region 4 was provided. An SiO ₂ insulating film 5 is formed thereon by sputtering to a thickness of about 100 nm,
Next, the first bonding is performed on the pi junction 17 using aluminum.
The gate electrode 6 was provided, and the second gate electrode 7 was provided on the ni junction 18. Further, an ohmic electrode 8 for the p-type region 3 and an ohmic electrode 9 for the n-type region 4 were provided.

In general, the p formed by ion implantation
At the interface of -i and ni junctions, the number of trapping centers is much larger than in the polycrystalline silicon film due to residual defects caused by ion implantation and segregation of impurities. For this reason, when a reverse bias is applied to the junction, a leak current in the reverse direction becomes extremely large due to a tunnel current or a Pool-Frenkel current through a trap center at the interface. The situation is the same not only in the case of ion implantation but also in the case where a junction is formed by depositing a p-type or n-type polycrystalline silicon film. In the photodiode having the structure shown in FIG. 1 of the present embodiment, the voltage-current characteristics were measured without applying a voltage to the first gate electrode 6 and the second gate electrode 7. As shown in the figure, the leakage current in the reverse direction was very large.

When a negative voltage is applied to the first gate electrode 6 and a positive voltage is applied to the second gate electrode 7 in the structure of FIG. 1, as shown in FIG. A p-channel 10 is formed in the crystalline silicon layer 2
N channel 11 is formed in lower i-type polycrystalline silicon layer 2. Thereby, the p-i junction 17 and the n-i
The interface of the junction 18 moves from a location having many trapping centers to an i-type polycrystalline silicon having few trapping centers. In this state, the voltage-current characteristics of the diode were measured. As shown in FIG. 2B, the reverse leakage current was significantly reduced, and normal diode characteristics were obtained. Also, from the insulating film 5 side or the glass substrate 1 side shown in FIG.
When the i-type polycrystalline silicon layer 2 was irradiated with light, FIG.
As shown in (b), the photocurrent can be observed, and compared with the current in the dark, a sufficient on-
Off ratio was obtained.

In this embodiment, the first gate electrode 6
Although the second gate electrode 7 is formed on the polycrystalline silicon layer 2 with the insulating film 5 interposed therebetween, it may be formed below the polycrystalline silicon layer 2. Alternatively, one of the first gate electrode 6 and the second gate electrode 7 may be formed above and the other may be formed below. Further, the first gate electrode 6 and the second
Even if only one of the gate electrodes 7 is not provided, the reverse leakage current can be reduced to some extent by only one of them.

Further, in this embodiment, the first gate electrode 6
And a four-terminal operation in which a voltage is separately applied to each of the second gate electrode 7, the ohmic electrode 8 to the p-type region 3 and the ohmic electrode 9 to the n-type region 4, but depending on the operating voltage, The first gate electrode 6 and the ohmic electrode 8 to the p-type region 3 are interconnected, and the second gate electrode 7 and the ohmic electrode 9 to the n-type region (4) are interconnected,
Two-terminal operation is also possible.

[0013]

Embodiment 2 FIG. 4 shows a second embodiment of the present invention. The difference from FIG. 1 is that a first SiO ₂ insulating film 12 is sandwiched under the i-type polycrystalline silicon layer 2 below the first gate electrode 6.
A third gate electrode 13 having the same potential as that of the gate electrode 6 of the second type, and an i-type polycrystalline silicon layer 2 under the second gate electrode 7.
The fourth gate electrode 14 having the same potential as the second gate electrode 7 is provided under the SiO ₂ insulating film 12. Since the p-channel 10 and the n-channel 11 are formed from both the upper and lower sides of the i-type polycrystalline silicon layer 2, the i-type polycrystalline silicon layer 2 can be made thicker than in the first embodiment. That is, since the light absorbing layer can be made thicker, there is an advantage that a larger photocurrent can be obtained as compared with the first embodiment.

[0014]

Embodiment 3 FIG. 5 shows a third embodiment of the present invention. The difference from the first embodiment is that, instead of providing the first gate electrode, a negative fixed electrode is provided in the film so that the p-channel 10 Insulating film 15 capable of inducing an electric field, and having a fixed positive electrode in the film instead of providing the second gate electrode, allows the i-type polycrystalline silicon layer 2 directly under the i-type polycrystalline silicon layer 2 without a bias to be provided. Is provided with an insulating film 16 capable of inducing an n-channel. Although it is difficult to control the interface between the insulating film and the i-type polycrystalline silicon depending on the type and forming conditions of the insulating film, there is an advantage that the element structure is simplified.

[0015]

Embodiment 4 FIG. 6 illustrates a fourth embodiment of the present invention
FIG. 3 is a cross-sectional view shown for reference . The difference from the first embodiment is that the p-type and n-type
Instead of disposing the type polycrystalline silicon, ohmic electrodes 8 to the p-type region and ohmic electrodes 9 to the n-type region are directly formed on both sides of the i-type polycrystalline silicon layer 2. There is an advantage that the element structure and the element manufacturing process are simplified.

In the structure shown in FIG. 6, when a negative voltage is applied to the first gate electrode 6 and a positive voltage is applied to the second gate electrode 7, as shown in FIG. A p-channel 10 is provided in the p-type polysilicon layer 2 and an n-channel 11 is provided in the i-type polysilicon layer 2 under the second gate electrode 7.
Was formed to form a pin structure, and the device could be operated in the same manner as in the first embodiment.

In the structure shown in FIG . 6 , the first gate electrode 6 and the second gate electrode 7 may be formed below the polycrystalline silicon layer 2 with an insulating film interposed therebetween. One of the two gate electrodes may be formed above and the other may be formed below. In addition, even if only one of the first gate electrode and the second gate electrode is not provided, it is possible to reduce the reverse leakage current to some extent by using only one of them. Further, depending on the operating voltage, the first gate electrode 6 is connected to the ohmic electrode 8 to the p-type region, and the second gate electrode 7 is connected to the ohmic electrode 9 to the n-type region. Terminal operation is also possible.

[0018] As in the third embodiment, reference Figure 6
In this structure , instead of providing the first gate electrode, an insulating film 15 having a negative fixed charge is provided in the film, and instead of providing the second gate electrode, an insulating film 15 having a positive fixed charge is provided in the film. An insulating film 16 may be provided. Embodiment 4 in this case is shown in FIG.

As described above, the polycrystalline silicon has been described from the first embodiment to the fourth embodiment. However, even if the polycrystalline silicon is replaced with amorphous silicon, the effect of reducing the reverse dark current of the diode can be obtained in the same manner. In the structure shown in FIG. 1, a diode in which polycrystalline silicon was replaced with amorphous silicon was fabricated and its characteristics were measured. The reverse dark current was two orders of magnitude lower than that of the conventional pin diode. Light having a power of 0.1 μW / cm ² or less can be received. Also, instead of polycrystalline silicon and amorphous silicon, amorphous Ge, polycrystalline Ge, amorphous SiGe, polycrystalline SiGe, amorphous SiC, and polycrystalline SiC may be used.

[0020]

As described above, according to the present invention, p
-I and the interface of the ni junction have a low trapping center density i
The formation in the region makes it possible to reduce the tunnel current or the Pool-Frenkel current passing through the trapping center. For this reason, in polycrystalline silicon that could not be used as a photodiode in the past,
The reverse leakage current of the diode has been significantly reduced, and it has become possible to use it as a photodiode. Further, in the case of amorphous silicon, the reverse leakage current of the diode was significantly reduced as compared with the conventional case, and the S / N of the photodiode with respect to light having low incident power was significantly improved.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view for explaining a first embodiment of the present invention.

FIG. 2 (a) shows current-voltage characteristics of a conventional diode,
(B) is a current-voltage characteristic of the diode of the present invention in the dark and when irradiated with light.

FIG. 3 is a sectional view for explaining the operation of the first embodiment of the present invention.

FIG. 4 is a sectional view for explaining a second embodiment of the present invention.

FIG. 5 is a sectional view for explaining the structure of a third embodiment of the present invention.

[6] In order to explain the structure of the fourth embodiment of the present invention
It is sectional drawing shown as a reference .

[7] In order to explain the operation of the fourth embodiment of the present invention
It is sectional drawing shown as a reference .

8 is a sectional view for explaining the fourth embodiment of the present invention.

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-62-145866 (JP, A) JP-A-2-215168 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H01L 31/00-31/119

Claims (5)

(57) [Claims] 1. A planar pin structure in which a p-type semiconductor thin film and an n-type semiconductor thin film are disposed on both sides of an i-type semiconductor thin film not doped with impurities formed on a substrate, respectively. p-i junction formed in i-n structure and n
-A photodiode characterized in that a required gate electrode is provided above, below, or above and below one or both of the i-junctions via an insulating film. 2. A planar pin structure in which a p-type semiconductor thin film and an n-type semiconductor thin film are disposed on both sides of an undoped i-type semiconductor thin film formed on a substrate. An insulating film having a negative fixed charge is provided above, below, or above and below a pi junction formed in the i-n structure, and further formed in the planar pin structure. A photodiode having an insulating film having a positive fixed charge provided above, below, or above and below the ni junction. 3. A structure in which electrodes are provided at both ends of an i-type semiconductor thin film which is formed on a substrate and which is not doped with impurities, above or below a junction between one of the electrodes and the i-type semiconductor thin film, or An insulating film having a negative fixed charge in the film is provided above and below, and an insulating film having a positive fixed charge in the film is provided above or below, or above and below, a junction between the other of the electrodes and the i-type semiconductor. A photodiode, comprising: 4. A photodiode as claimed in any one of claims 3, characterized in that using a polycrystalline silicon thin film on the semiconductor. 5. The photodiode according to any one of claims 1 to 3, characterized in that using an amorphous silicon thin film on the semiconductor.