JP2962879B2 - Manufacturing method of capacitive element - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a capacitor, particularly a capacitor mounted on an active matrix array of an active matrix type liquid crystal display device.

[0002]

2. Description of the Related Art In recent years, an active matrix type liquid crystal display device in which display electrodes are arranged in an active matrix array in which a large number of capacitive elements and thin film transistors are formed and a liquid crystal material is filled between a display electrode substrate and a counter electrode substrate has been commercialized. However, even now, improvements in display quality and manufacturing yield are being actively studied.

One factor that lowers display quality and manufacturing yield lies in the TFT itself.
In addition, realization of a manufacturing method is desired.

As a TFT for an active matrix type liquid crystal display device, a TFT called an inverted staggered type in which a gate electrode, a gate insulating film, a semiconductor film, a source and a drain electrode are sequentially laminated on an insulating substrate is generally used. Further, a storage capacitor is formed in each thin film transistor for stabilizing display performance. In this case, a short circuit between the electrodes due to a film formation defect of the gate insulating film is a serious defect that impairs reliability.

As a countermeasure against the short-circuit failure, there has been proposed a method of preventing a short-circuit with an upper electrode by etching and removing a lower electrode in a defective region of a gate insulating film (Japanese Patent Application Laid-Open No. Sho.
3-133675, JP-A-1-207779).

[0006]

FIG. 8 is a plan view of a pixel unit of a TFT in a conventional active matrix type liquid crystal display device. FIG. 9 is a plan view of each TFT taken along line AA 'in FIG.
It is sectional drawing of a FT manufacturing process. The conventional method and its problems will be described below with reference to FIG.

First Step [FIG. 9 (a)] A gate electrode 2 as a lower electrode and an auxiliary capacitance electrode 3 are formed on the insulating substrate 1 with the same conductive material.

Second step [FIG. 9 (b)] The gate insulating film 4 and the semiconductor film 5 are deposited by P-CVD or the like, and the semiconductor film 5 is converted into islands. In such a case, insulating film defects 11 and 12 that cause a short circuit failure between the gate insulating film 4 and the semiconductor film 5 with the upper electrode due to foreign matter or the like are inevitably generated.

Third step [FIG. 9 (c)] The conductive material forming the gate electrode 2 and the auxiliary capacitance electrode 3 is etched with an etchant or an etching gas for selectively etching, and the lower electrode in the insulating film defect region is etched. Remove.

Fourth step [FIG. 9 (d)] The display electrode 6 as the upper electrode, the source electrode 7 and the drain electrode 8 are formed, and the TFT is completed. In the TFT manufactured by this method, since the lower electrode in the insulating film defect area is removed by etching, a short-circuit failure between the lower electrode and the upper electrode does not occur.

According to this method, after depositing the gate insulating film, the lower electrode (gate electrode, auxiliary capacitance electrode e) is not affected by the gate insulating film.
Short circuit failure can be eliminated by a relatively easy method of etching the lower electrode using the gate insulating film as a mask with an etchant or an etching gas that selectively attacks tc), but the lower electrode at the defective portion of the gate insulating film is entirely etched. For this reason, when a gate insulating film defect occurs in a wide range, lower electrodes such as the gate bus line 20 and the auxiliary capacitance bus line 30 are disconnected. This defect is fatal for a TFT for an active matrix type liquid crystal display device, and its improvement is strongly desired.

[0012]

According to the present invention, there is provided a capacitive element forming method, comprising: forming a lower electrode on an insulating substrate; forming an upper electrode on the electrode via an insulating film; The electrode is made of at least two kinds of conductive materials, and after the insulating film is deposited, the conductive film constituting the lower electrode is etched with an etchant or an etching gas that selectively removes a part of the conductive material, thereby forming a region exposed by the insulating film defect. The upper electrode is formed after the conductive material is removed by etching.

Further, of the plurality of conductive materials constituting the lower electrode, the lower electrode is formed of a conductive material which is selectively etched and removed after depositing the insulating film, as compared with an electrode pattern formed of a conductive material which is not etched and removed after depositing the insulating film. The electrode pattern is enlarged.

Further, the thickness of the upper electrode is made smaller than the thickness of the conductive material which is selectively removed by etching after depositing the insulating film among the plurality of conductive materials constituting the lower electrode.

Further, the insulating film has a laminated structure of at least upper and lower two layers. After the lower insulating film is deposited, a part of the lower electrode in the lower insulating film defect region is removed by etching, and then the upper insulating film is deposited. An insulating film is deposited thereon.

Further, of the plurality of conductive materials constituting the lower electrode, the conductive material which is not etched and removed after the insulating film is deposited is an opaque conductive material, and the conductive material which is selectively etched and removed after the insulating film is deposited is It is a transparent conductive material.

[0017]

According to the present invention, not all of the conductive material constituting the lower electrode in the insulating film defect generation region is removed by etching, but part of the conductive material constituting the lower electrode is removed by etching. No disconnection occurs in the lower electrode due to the above etching process.

Strictly speaking, the lower electrode in the insulating film defect generation region is over-etched under the condition that side etching occurs with respect to the insulating film. Therefore, even if the upper electrode is deposited in that region, the upper electrode is disconnected at the step portion of the insulating film, and the lower electrode and the upper electrode are not short-circuited.

Further, it is effective to make the thickness of the upper electrode smaller than the thickness of the conductive material to be removed by etching so that the step of the upper electrode is surely generated in the insulating film defect generation region.

It is also effective to prevent the short-circuit with the upper electrode by adding an insulating film again after etching the lower electrode in the insulating film defect generating area and removing the insulating film again.

As described above, according to the present invention, a short-circuit failure with the upper electrode formed via the gate insulating film can be prevented without disconnection of the lower electrode.

[0022]

【Example】

<Embodiment 1> FIG. 1 is a plan view of a pixel unit of a TFT array of an active matrix display device obtained by the manufacturing method of the present invention, and a cross-sectional view after a manufacturing process along line AA ′ in FIG. It is shown in FIG. This will be described below with reference to FIG.

First Step [FIG. 2 (a)] A gate bus line 20 and a storage capacitor bus line 30 as lower electrodes are formed on an insulating substrate 1 using a first conductive material.

Second Step [FIG. 2B] A gate bus line 20, an auxiliary capacitance bus line 30, a gate electrode 2 and an auxiliary capacitance electrode 3 are formed of a second conductive material.

Third step [FIG. 2C] The gate insulating film 4 and the semiconductor film 5 are deposited by P-CVD or the like, and the semiconductor film 5 is turned into islands. In this case, foreign matter or the like inevitably causes insulating film defects 13, 14, 15, 16 that cause a short circuit between the upper electrode and the lower electrode in the gate insulating film 4.

Fourth step [FIG. 2D] The second conductive material of the insulating film defects 13, 14, 15 and 16 is etched away by etching with an etchant which selectively permeates the second conductive material. . In this step, only the second conductive material is etched, and the electrode pattern formed of the first conductive material is not affected. The line 30 does not break.

Fifth Step [FIG. 2 (e)] A display electrode 6, a source electrode 7, and a drain electrode 8, which are upper electrodes, are formed. Regarding the insulating film defects 13 and 16, there is a lower electrode pattern formed of the first conductive material, but in that region, a so-called overhang occurs in which the upper layer of the second conductive material is side-etched with respect to the insulating film. As a result, the upper electrode is disconnected, and the upper electrode is not electrically connected to the lower electrode even when the upper electrode is formed.

When the thickness of the upper electrode is larger than the thickness of the second conductive material to be removed by etching, a short circuit between the upper electrode and the lower electrode rarely occurs. Therefore, when the thickness of the upper electrode is smaller than the thickness of the second conductive material to be removed by etching, the upper electrode is surely disconnected in the insulating film defect generation region,
Short circuit failure can be prevented.

The thickness of the source electrode 7 and the drain electrode 8, which are the upper electrodes of the TFT, is generally larger than the thickness of the lower electrode. Since the semiconductor film 5 is small and the semiconductor film 5 is formed on the gate insulating film 4, the defect generation density is lower than that of the gate insulating film 4. Occurrence can be at a level close to zero. In the TFT, the short-circuit failure is most likely to occur in a region where the cross-sectional area between the lower electrode and the upper electrode forms a storage capacitor that is much larger.

The display electrode 6 is formed as an upper electrode in the auxiliary capacitance forming region. Making the display electrode film thickness smaller than the thickness of the second conductive material to be removed by etching is effective in reducing short circuit failure. The present invention is effective in reducing short-circuit failure even if the thickness of the display electrode is larger than the thickness of the second conductive material to be removed by etching, but is smaller than the thickness of the second conductive material to be removed by etching the display electrode. The probability of occurrence of short-circuit failure increases as compared with the case where the short-circuit failure occurs.

As shown in FIG. 1, the second conductive material to be removed by etching is preferably larger than the lower electrode pattern formed of the first conductive material to reduce short circuit failure. When the lower electrode pattern formed of the first conductive material is larger than the lower electrode pattern formed of the second conductive material,
Since no countermeasures against short-circuit failure are taken for the first conductive material pattern region protruding from the second conductive material, the probability of occurrence of short-circuit failure is inevitably increased. However, the number of occurrences of short-circuit defects is small, and practical use is possible.

In this embodiment, the TFT in which an auxiliary capacitance is formed by crossing the auxiliary capacitance electrode 3 and the display electrode 6 which are independently provided has been described. However, the front gate bus line and the display electrode 6 are crossed. The present invention is also applicable to a TFT that forms an auxiliary capacitance by using the same.

In this embodiment, the lower electrode is formed of two types of conductive films. However, the lower electrode may have another film configuration, and the lower electrode pattern to be removed by etching may have an island shape.
Conversely, the lower electrode pattern that is not removed by etching may have an island shape.

FIG. 3 shows the first gate insulating film 4 as a gate insulating film.
This is an embodiment in the case of forming a two-layer structure of the first and second gate insulating films 42. This is a case where the etching process of the present invention is performed after the first gate insulating film 41 is deposited, and the second conductive material in the defect generating region of the first gate insulating film 41 is removed by etching, and then the second gate insulating film 42 is deposited. In this case, the defect generation area of the first gate insulating film 41 is repaired by the second gate insulating film 42 so that the occurrence of short-circuit failure is extremely reduced.

Naturally, the present invention is not limited to the TFT having the structure shown in the figure, but can be applied to an element structure in which a lower electrode and an upper electrode overlap with an insulating film interposed therebetween. It is also effective for an active matrix array.

<Embodiment 2> FIG. 4 is a plan view of a pixel unit of a TFT array of an active matrix display device obtained by the manufacturing method of the present invention, and FIG. 5 is a sectional view taken along the line AA 'in FIG. Shown in

Although the method of manufacturing the TFT is the same as that of the first embodiment, a description thereof will be omitted. However, this embodiment is an embodiment in which the present invention is applied only to a region (auxiliary capacitance forming region) where the short-circuit occurrence probability is highest in the TFT.

On an insulating substrate 1, a first conductive material is used.
A gate bus line 20 serving as a lower electrode and an auxiliary capacitance bus line 30 are formed. Next, the auxiliary capacitance electrode 3 is formed of a transparent conductive material (second conductive material). Next, PC
The gate insulating film 4 and the semiconductor film 5 are deposited by VD or the like,
The semiconductor film 5 is turned into an island. Further, etching is performed with an etchant that selectively attacks the second conductive material, and the insulating film defect 1 is removed.
The second and seventh conductive materials are removed by etching. Finally, a display electrode 6, a source electrode 7, and a drain electrode 8, which are upper electrodes, are formed, and the TFT of FIG. 5 is completed. In this way, short-circuit failure between the auxiliary capacitance electrode 3 and the display electrode 6 can be prevented in the insulating film defect 17 and 18 regions.

FIG. 6 is a plan view in pixel unit of a TFT array of an active matrix display device obtained by the manufacturing method of the present invention, and FIG. 7 is a cross-sectional view along the line AA 'in FIG.

Another feature of the present embodiment is that the auxiliary capacitance electrode is a transparent electrode to improve the aperture ratio of the TFT. In this way, it is possible to eliminate only the cause of the highest short-circuit failure occurrence probability in the high aperture ratio type TFT. As a matter of course, the second conductive material to be removed by etching may be located below the first conductive film that is not removed by etching, as shown in FIG. In that case, the probability of occurrence of short-circuit failure increases in the first conductive film pattern region that is not removed by etching. The same applies to the case where the second conductive film to be etched away is formed of a transparent electrode also in the TFT pattern of the first embodiment.

[0041]

According to the present invention, in a device structure in which a lower electrode and an upper electrode overlap with each other via an insulating film, a short circuit between the lower electrode and the upper electrode can be prevented without disconnecting the lower electrode. It greatly contributes to improving the production yield of TFT arrays for active matrix type liquid crystal display devices.

[Brief description of the drawings]

FIG. 1 is a plan view of an active matrix substrate having a capacitance element according to a first example of the present invention.

FIG. 2 is a cross-sectional view of a manufacturing process of a substrate having a capacitive element according to a first example of the present invention.

FIG. 3 is a cross-sectional view of a main part of a substrate having a capacitor formed of a two-layer insulating film of the present invention.

FIG. 4 is a plan view of an active matrix substrate having a capacitance element according to a second example of the present invention.

FIG. 5 is a sectional view of a main part of a substrate having a capacitive element according to a second example of the present invention.

FIG. 6 is a plan view of an active matrix substrate having a capacitance element according to a third example of the present invention.

FIG. 7 is a sectional view of a main part of a substrate having a capacitive element according to a third embodiment of the present invention.

FIG. 8 is a plan view of an active matrix substrate having a conventional capacitive element.

FIG. 9 is a cross-sectional view of a main part of a substrate having a conventional capacitive element.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 insulating substrate 2 gate electrode 3 auxiliary capacitance electrode 4 gate insulating film 5 semiconductor film 6 display electrode 7 source electrode 8 drain electrode 11 insulating film defect 12 insulating film defect 13 insulating film defect 14 insulating film defect 15 insulating film defect 16 insulating film Defect 17 Insulating film defect 18 Insulating film defect 20 Gate bus line 30 Auxiliary capacitance bus line 41 First gate insulating film 42 Second gate insulating film

Continuation of the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) G02F 1/136 500 G02F 1/1343 H01L 27/12

Claims (5)

(57) [Claims] 1. A capacitor in which a lower electrode is formed on an insulating substrate and an upper electrode is formed on the electrode via an insulating film, wherein the lower electrode is made of at least two kinds of conductive materials, After depositing the insulating film, the upper electrode is formed by etching with an etchant or an etching gas that selectively removes a part of the conductive material constituting the lower electrode by etching, and etching away the conductive material in a region exposed by the insulating film defect. A method of manufacturing a capacitive element. 2. A conductive material which is selectively etched and removed after depositing an insulating film, as compared with an electrode pattern formed of a conductive material which is not etched and removed after depositing an insulating film, among a plurality of conductive materials forming a lower electrode. 2. The method according to claim 1, wherein the electrode pattern is large. 3. The method according to claim 1, wherein the thickness of the upper electrode is smaller than the thickness of the conductive material selectively etched away after the insulating film is deposited, among the plurality of conductive materials forming the lower electrode. 1. A method for manufacturing a capacitive element. 4. An insulating film having a laminated structure of at least upper and lower two layers, a part of a lower electrode in a lower insulating film defect region is removed by etching after depositing a lower insulating film, and then an upper insulating film is deposited. 4. The method according to claim 1, wherein an insulating film is deposited thereon. 5. A conductive material which is not removed by etching after depositing an insulating film is an opaque conductive material, and a conductive material which is selectively removed by etching after depositing an insulating film is a plurality of conductive materials constituting the lower electrode. 2. The method according to claim 1, wherein the capacitive element is a transparent conductive material.