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JP2964546B2 - Method for forming SOI substrate - Google Patents
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JP2964546B2 - Method for forming SOI substrate - Google Patents

Method for forming SOI substrate

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Publication number
JP2964546B2
JP2964546B2 JP13179790A JP13179790A JP2964546B2 JP 2964546 B2 JP2964546 B2 JP 2964546B2 JP 13179790 A JP13179790 A JP 13179790A JP 13179790 A JP13179790 A JP 13179790A JP 2964546 B2 JP2964546 B2 JP 2964546B2
Authority
JP
Japan
Prior art keywords
film
sio
substrate
forming
amorphous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP13179790A
Other languages
Japanese (ja)
Other versions
JPH0426112A (en
Inventor
厚志 小椋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP13179790A priority Critical patent/JP2964546B2/en
Publication of JPH0426112A publication Critical patent/JPH0426112A/en
Application granted granted Critical
Publication of JP2964546B2 publication Critical patent/JP2964546B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、半導体装置の形成に必要なSi基板の一種で
あるSOI基板の形成方法に関するものである。
Description: TECHNICAL FIELD The present invention relates to a method for forming an SOI substrate, which is a kind of Si substrate required for forming a semiconductor device.

(従来の技術) 従来、結晶性に優れた気相成長法を利用したSOI基板
の形成方法としては、例えばジャーナル・オブ・エレク
トロケミカル・ソサイェティー(J.of Electrochem.So
c.)、130巻1571ページにあるエピタキシャル・ラテラ
ル・オーバーグロウス(Epitaxial Lateral Overgrowt
h)と呼ばれる方法や、第50回応用物理学会学術講演会
・講演予稿集・第2分冊、588ページ(28a−C−8)に
ある様なトンネルエピタキシーと呼ばれる方法がある。
(Prior Art) Conventionally, as a method for forming an SOI substrate using a vapor phase growth method having excellent crystallinity, for example, a method described in J. of Electrochem.
c.), Vol. 130, p. 1571, Epitaxial Lateral Overgrowt
h) and a method called tunnel epitaxy as shown in the 50th Annual Meeting of the Japan Society of Applied Physics, Proceedings of Lectures, Second Volume, page 588 (28a-C-8).

(発明が解決しようとする課題) 従来技術のうちエピタキシャル・ラテラル・オーバー
グロウスでは、シード領域からSiO2上に横方向にエピタ
キシャル成長が進行する際に、膜厚方向の成長速度と横
方向の成長速度に大きな差を与える事が難しいために、
横方向への成長が進むにつれて膜厚が厚くなり、大きな
面積で薄いSOI(SiO2上の単結晶Si)領域を得る事が困
難であった。
(Problems to be Solved by the Invention) In the prior art, in the case of epitaxial lateral overgrowth, when epitaxial growth proceeds laterally from the seed region onto SiO 2 , the growth rate in the film thickness direction and the growth rate in the lateral direction are increased. It is difficult to give a big difference to
As the growth in the lateral direction progressed, the film thickness increased, and it was difficult to obtain a thin SOI (single crystal Si on SiO 2 ) region with a large area.

トンネルエピタキシーではエピタキシャル・ラテラル
・オーバーグロウスのこの様な欠点を克服できる。トン
ネルエピタキシーでは上下をSiO2で挟まれたトンネル領
域内を結晶成長が横方向に進行する。この方法ではSOI
膜厚がトンネルの高さで正確に制御されるため、大きな
面積で薄いSOIを形成することが可能であるが、トンネ
ルの形成の際にSiO2上に多結晶Siを堆積しさらにSiO2
堆積して多結晶SiをHClによるガスエッチングで除去す
るため、上のSiO2膜の下面に多結晶Siの表面形状を反映
した凹凸が生じ、結果的に得られたSOIの表面に凹凸が
生じるという欠点があった。
Tunnel epitaxy overcomes these disadvantages of epitaxial lateral overgrowth. In tunnel epitaxy, crystal growth proceeds laterally in a tunnel region sandwiched between upper and lower portions of SiO 2 . This method uses SOI
Since the film thickness is accurately controlled by the height of the tunnel, it is possible to form a thin SOI a large area, a further SiO 2 is deposited a polycrystalline Si on the SiO 2 during the formation of the tunnel Since the polycrystalline Si is deposited and removed by gas etching with HCl, irregularities reflecting the surface shape of the polycrystalline Si occur on the lower surface of the upper SiO 2 film, and irregularities occur on the surface of the resulting SOI There was a disadvantage.

(課題を解決するための手段) 本発明によれば、Si基板表面に第1のSiO2膜を形成す
る工程と、第1のSiO2膜の一部領域を除去してSi基板を
露出する工程と、Si基板を露出した領域にのみSiをエピ
タキシャル成長して成長表面とSiO2膜表面の高さがほぼ
同一になる様にシードを形成する工程と、非晶質Siを堆
積してパターニングする工程と、Si3N4膜または第2のS
iO2膜を堆積する工程とこのSi3N4膜または第2のSiO2
の一部領域を除去して窓を形成する工程と、この窓から
HClガスを導入して非晶質Siを除去する工程と、窓からS
iを含む成長ガスを導入してシードから第1のSiO2膜上
にエピタキシャルSiを成長する工程とからなるSOI基板
の形成方法が得られる。
According to (SUMMARY for a) the present invention, it is exposed and forming a first SiO 2 film on the Si substrate surface, the Si substrate by removing a partial region of the first SiO 2 film Process, a process of epitaxially growing Si only in the region where the Si substrate is exposed, and forming a seed so that the height of the growth surface and the surface of the SiO 2 film are substantially the same, and depositing and patterning amorphous Si Process and the Si 3 N 4 film or the second S
depositing an iO 2 film, removing a portion of the Si 3 N 4 film or the second SiO 2 film to form a window,
HCl gas is introduced to remove amorphous Si, and S
introducing a growth gas containing i and growing epitaxial Si on the first SiO 2 film from the seed to obtain an SOI substrate forming method.

(作用) 以下本発明によって、表面の凹凸が小さく大面積で薄
いSOIを形成する事が可能となる理由について述べる。
(Operation) Hereinafter, the reason why the present invention makes it possible to form a thin SOI with a small surface unevenness and a large area will be described.

本発明では、トンネルエピタキシーの多結晶Siの代わ
りに非晶質Siを用いている。多結晶SiはSiの微小な結晶
粒の集まりであるため、その結晶粒に対応した凹凸が表
面に現れるが、非晶質SiではSi原子が完全にランダムに
配置しており、その表面は多結晶Siに較べると極めて平
坦である。従ってこの非晶質Siをエッチングして形成さ
れるトンネルの上部となる第2のSiO2膜あるいはSi3N4
膜の下面も多結晶Siの場合に比べて平坦なものとなり、
得られるSOI表面も平坦となる。また、一度非晶質Siを
堆積すると、その上にSiO2膜やSi3N4膜を形成する工程
で基板温度が上昇し非晶質Siが多結晶Siに変質しても、
その表面の荒さは最初から多結晶Siを堆積するのに比べ
て十分に平坦である。SOI表面に凹凸があると、SOIにデ
バイスを形成する際のリソグラフィー技術の障害となり
好ましくないが、本発明によってこの様な欠点が克服さ
れる。
In the present invention, amorphous Si is used in place of polycrystalline Si for tunnel epitaxy. Since polycrystalline Si is a collection of fine crystal grains of Si, irregularities corresponding to the crystal grains appear on the surface.Since amorphous Si has completely randomly arranged Si atoms, It is extremely flat compared to crystalline Si. Therefore, a second SiO 2 film or Si 3 N 4 to be an upper part of a tunnel formed by etching this amorphous Si
The lower surface of the film is also flatter than that of polycrystalline Si,
The resulting SOI surface is also flat. Also, once the amorphous Si is deposited, even if the substrate temperature rises in the process of forming an SiO 2 film or a Si 3 N 4 film thereon and the amorphous Si is transformed into polycrystalline Si,
The surface roughness is sufficiently flat compared to depositing polycrystalline Si from the beginning. Irregularities on the surface of the SOI are not preferred because they hinder lithography techniques when forming devices on the SOI, but the present invention overcomes such disadvantages.

(実施例) 以下本発明の実施例について図面を用いて詳細に説明
する。
(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

第1図(a)〜(e)は本発明の実施例を説明するた
めの概略断面図である。面方位(100),(110),(11
1)の3種類のSi基板10上に、基板温度900〜1100℃のド
ライまたはウエット酸化法および基板温度500〜900℃の
LPCVD法でSiO2膜20を膜厚0.2〜0.8μm形成し、そのSiO
2膜の一部領域を通常のフォトリソグラフィーとドライ
エッチング法で除去してシード30を形成した(第1図
(a))。次にシードの領域にのみ選択的にエピタキシ
ャルSi130をエピタキシャル成長の表面とSiO2膜の表面
がほぼ同じ高さになるまで成長した(第1図(b))。
成長は、SiH2Cl2(SiH4またはSi2H6でも良い)/HCl/H2
混合ガスを用いて、基板温度800〜1050℃で行った。次
に非晶質Si240を超高真空中の分子線デポジション法で
0.05〜0.6μm堆積してパターニングした。また、比較
のために非晶質SiのかわりにLPCVD法で多結晶Siを堆積
した試料も同時に作製した。その後全面にSiO2膜または
Si3N4膜250を0.1〜0.5μm堆積しガス導入窓260をシー
ドから5〜50μm離れた位置に通常のドライエッチング
技術で形成した(第1図(c))。次にHClを使ったガ
スエッチングで、非晶質Si240を除去して上部をSiO2
たはSi3N4膜250、下部をSiO2膜20で挟まれたトンネル37
0を得た(第1図(d))。最後に第1図(b)と同じ
選択成長の条件で、トンネル内でエピタキシャル成長を
行ってSOI領域480を得た(第1図(e))。得られたSO
IはSEM及びSTMを使ってその表面荒さを測定した。
1 (a) to 1 (e) are schematic sectional views for explaining an embodiment of the present invention. Plane orientation (100), (110), (11
1) A dry or wet oxidation method at a substrate temperature of 900 to 1100 ° C and a substrate temperature of 500 to 900 ° C
An SiO 2 film 20 is formed to a thickness of 0.2 to 0.8 μm by LPCVD,
A part of the two films was removed by ordinary photolithography and dry etching to form a seed 30 (FIG. 1A). Next, an epitaxial Si 130 was selectively grown only in the seed region until the surface of the epitaxial growth and the surface of the SiO 2 film became almost the same height (FIG. 1B).
The growth is SiH 2 Cl 2 (which may be SiH 4 or Si 2 H 6 ) / HCl / H 2
The test was performed at a substrate temperature of 800 to 1,050 ° C. using a mixed gas. Next, the amorphous Si240 was deposited by molecular beam deposition in ultra-high vacuum.
0.05 to 0.6 μm was deposited and patterned. For comparison, a sample in which polycrystalline Si was deposited by LPCVD instead of amorphous Si was also fabricated. After that, SiO 2 film or
A Si 3 N 4 film 250 was deposited to a thickness of 0.1 to 0.5 μm, and a gas introduction window 260 was formed at a position 5 to 50 μm away from the seed by a normal dry etching technique (FIG. 1C). Next, the amorphous Si240 is removed by gas etching using HCl, and a tunnel 37 in which the upper portion is sandwiched by the SiO 2 or Si 3 N 4 film 250 and the lower portion by the SiO 2 film 20 is used.
0 was obtained (FIG. 1 (d)). Finally, epitaxial growth was performed in the tunnel under the same selective growth conditions as in FIG. 1B to obtain an SOI region 480 (FIG. 1E). Obtained SO
I measured its surface roughness using SEM and STM.

その結果、トンネルの高さが0.05μmの場合、トンネ
ルの形成に多結晶Siを用いた場合にはSOIの表面荒さが
0.01〜0.02μmあったのに対して、非晶質Siの場合には
測定限界の0.005μm以下であった。またトンネルの高
さが0.5μmの場合には、多結晶Si場合には表面荒さが
0.05〜0.1μmであったのに対して、非晶質Siの場合に
は0.01〜0.02μmであり、いずれの場合も多結晶Siを用
いるよりも非晶質Siを用いる事によって表面荒さの減少
効果が確認された。
As a result, when the tunnel height is 0.05 μm, the surface roughness of SOI
In contrast to 0.01 to 0.02 μm, in the case of amorphous Si, the measurement limit was 0.005 μm or less. When the tunnel height is 0.5 μm, the surface roughness is
0.05 to 0.1 μm, compared to 0.01 to 0.02 μm in the case of amorphous Si, and in any case, the reduction in surface roughness by using amorphous Si rather than using polycrystalline Si The effect was confirmed.

(発明の効果) 以上本発明によって、従来技術に比較してより表面が
平坦で大面積のSOI形成が可能なトンネルエピタキシー
技術を得る事が可能となり、高性能なSiLSI形成の為の
基板の供給が可能となった。
(Effects of the Invention) As described above, according to the present invention, it is possible to obtain a tunnel epitaxy technique capable of forming a SOI with a flat surface and a large area more than the conventional technique, and supply a substrate for forming a high-performance SiLSI. Became possible.

【図面の簡単な説明】[Brief description of the drawings]

第1図は、本発明の実施例を説明するための概略断面図
である。 10……Si基板、20……SiO2膜、30……シード、 130……エピタキシャルSi、240……非晶質Si、 250……SiO2またはSi3N4膜、260……ガス導入窓、 370……トンネル、480……SOI領域
FIG. 1 is a schematic sectional view for explaining an embodiment of the present invention. 10: Si substrate, 20: SiO 2 film, 30: Seed, 130: Epitaxial Si, 240: Amorphous Si, 250: SiO 2 or Si 3 N 4 film, 260: Gas introduction window , 370 …… Tunnel, 480 …… SOI area

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】Si基板表面に第1のSiO2膜を形成する工程
と、第1のSiO2膜の一部領域を除去してSi基板を露出す
る工程と、Si基板を露出した領域にのみSiをエピタキシ
ャル成長して成長表面とSiO2膜表面の高さがほぼ同一に
なる様にシードを形成する工程と、非晶質Siを堆積して
パターンニングする工程と、Si3N4膜または第2のSiO2
膜を堆積する工程とこのSi3N4膜または第2のSiO2膜の
一部領域を除去して窓を形成する工程と、この窓からHC
lガスを導入して非晶質Siを除去する工程と、窓からSi
を含む成長ガスを導入してシードから第1のSiO2膜上に
エピタキシャルSiを成長する工程とからなるSOI基板の
形成方法。
A step of forming a first SiO 2 film on the surface of the Si substrate, a step of removing a partial region of the first SiO 2 film to expose the Si substrate, and a step of exposing the Si substrate to a region where the Si substrate is exposed. A step of forming a seed so that the height of the growth surface and the surface of the SiO 2 film are substantially the same by epitaxially growing Si, a step of depositing and patterning amorphous Si, and a step of forming a Si 3 N 4 film or Second SiO 2
Depositing a film, removing a part of the Si 3 N 4 film or the second SiO 2 film to form a window, and removing HC from the window.
l A process to remove amorphous Si by introducing gas and
Introducing a growth gas containing Si and growing epitaxial Si on the first SiO 2 film from the seed.
JP13179790A 1990-05-22 1990-05-22 Method for forming SOI substrate Expired - Lifetime JP2964546B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13179790A JP2964546B2 (en) 1990-05-22 1990-05-22 Method for forming SOI substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13179790A JP2964546B2 (en) 1990-05-22 1990-05-22 Method for forming SOI substrate

Publications (2)

Publication Number Publication Date
JPH0426112A JPH0426112A (en) 1992-01-29
JP2964546B2 true JP2964546B2 (en) 1999-10-18

Family

ID=15066346

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13179790A Expired - Lifetime JP2964546B2 (en) 1990-05-22 1990-05-22 Method for forming SOI substrate

Country Status (1)

Country Link
JP (1) JP2964546B2 (en)

Also Published As

Publication number Publication date
JPH0426112A (en) 1992-01-29

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