JP2970262B2 - Program dispatch method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic computer system, and more particularly, to a high-speed arithmetic unit having no virtual memory function and a low-speed arithmetic unit having a virtual memory function in a high-speed computer system such as a supercomputer. The present invention relates to a program dispatch method that enables efficient system operation by combining an arithmetic device with a multiprocessor.

[0002]

2. Description of the Related Art Conventionally, a high-speed computer system such as a supercomputer, which is required to execute a program at a high speed, performs advanced pipeline processing, and an exception generated in the program is deleted from that point. Many do not guarantee re-execution.

[0003]

For this reason, in a conventional computer system such as a supercomputer, a main storage device is not allocated to a program, and the program is triggered by an exception caused by the fact that the program does not exist in the main storage device. A so-called virtual memory that allocates a main storage device and executes the program again to execute a program requiring more space than the real memory has not been realized. Conversely, if virtual storage can be realized, high-speed operations cannot be performed.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a high-speed arithmetic unit which does not guarantee that an exception generated by a program will be re-executed from that point in time, and a low-speed arithmetic unit which guarantees that an exception generated by a program will be re-executed from that point. It is an object of the present invention to provide a program dispatch method capable of improving the processing efficiency of a system by using a combination with an arithmetic device.

[0005]

To achieve the above object, the present invention provides: (A) a main storage device, an auxiliary storage device, and a program existing on the main storage device or the auxiliary storage device.
An address translation mechanism that translates a logical address of the program into a physical address on the main storage device; and an instruction that fails in address translation when the address translation mechanism fails during the execution of the program. A high-speed operation device that is accelerated on the assumption that re-execution is not performed, and the main storage device is shared between the high-speed operation device, and the same instruction as the high-speed operation device can be executed. , during execution of the program, address translation when the address conversion by the address conversion mechanism fails
A low-speed operation device capable of re-executing from the failed instruction, virtual space management means for realizing virtual storage for a program executed by the low-speed operation device, and whether or not the program can be executed by the high-speed operation device. A high-speed execution flag to execute, and when allocating the main storage device to the program, if the entire program can be allocated to the main storage device, the high-speed execution flag corresponding to the program can be executed by the high-speed operation device. Main memory allocating means to be displayed, and allocating the program whose corresponding high-speed execution flag indicates executable to the high-speed arithmetic device and allocating the program not indicating executable to the low-speed arithmetic device Program dispatch means.

[0006] By the present invention to be executed as much as possible high speed arithmetic unit operations center program, to improve overall system performance, in the (B) program dispatch method of claim 1, wherein the program and displays whether or not to be executed at a high speed arithmetic unit, the high-speed execution flag indicating a preference to be executed by the high-speed computing unit is provided, a program corresponding high speed run flag indicates viable, corresponding Program dispatching means for allocating to the high-speed operation device or the low-speed operation device according to the priority indicated by the high-speed execution flag, and allocating, to the low-speed operation device, a program indicating that the corresponding high-speed execution flag is not executable; When the program is executed by the system continuously for a predetermined time or more, When an arithmetic unit is used, a program characteristic determining means is provided for increasing the priority indicated by the high-speed execution flag corresponding to the program, and lowering the priority of the high-speed execution flag corresponding to the program when the arithmetic processing by the program is interrupted. It is a thing.

Further, according to the present invention, in order to improve the performance of the entire system by executing an arithmetic-oriented program on a high-speed arithmetic device as much as possible, (C) the program dispatching method according to claim 2, Instead of the means, when compiling a program to be executed on the high-speed operation device or the low-speed operation device, a code that indicates that the program is not an operation-centered program is set at a place where the operation is interrupted by statically analyzing the program. And
A program characteristic analysis means for setting a code indicating that the program is an operation-centered program is provided at a place where only the operation is to be executed, and further according to the code set by the program characteristic analysis means, before the program enters an operation-centered process. And a program characteristic declaring means for lowering the priority of the high-speed execution flag corresponding to the high-speed execution flag before the program enters the place where the arithmetic processing is interrupted.

In the present invention, processing requiring a large memory area is performed by a low-speed operation device using the function of virtual storage, and sufficient processing in a small memory area is performed by a high-speed operation device. (D) In the program dispatch method according to claim 1, when compiling a program executed on the high-speed operation device or the low-speed operation device, the program the program uses memory analyzing means for embedding before the process unit code to declare an address processing unit to access statically analyzed to program provided, when allocating the main storage device in the program, all of the program Is added when it can be assigned to the main storage device.
In addition, the high-speed execution flag corresponding to the program indicates that the program can be executed by the high-speed arithmetic device even when the processing unit of the program whose address to be accessed by the code is declared can be allocated to the main storage device. to, is provided with a main memory allocation means.

[0009]

In the configuration (A), when the main memory allocating means allocates the main memory to the program, if the entire program can be allocated to the main memory,
The high-speed execution flag corresponding to the program is set to indicate that the program can be executed by the high-speed arithmetic device.

If the corresponding high-speed execution flag indicates that the program can be executed by the high-speed operation device, the program dispatch means executes the program on the high-speed operation device.
If the display indicates that the program cannot be executed, the program is executed by a low-speed arithmetic device.

In the configuration (B), when the main memory allocating means can allocate all of the program to the main memory when allocating the main memory to the program, the high-speed execution flag corresponding to the program is used. Indicates that it can be executed by the high-speed arithmetic device.

[0012] When the program uses a high-speed operation device or a low-speed operation device continuously for a period of time determined by the system or more, the program characteristic determination means increases the priority indicated by the high-speed execution flag corresponding to the program. ,
When the arithmetic processing by the program is interrupted, the priority indicated by the high-speed execution flag corresponding to the program is lowered.

[0013] The program dispatch means assigns a program whose corresponding high-speed execution flag indicates executable to a high-speed operation device or a low-speed operation device in accordance with the priority indicated by the corresponding high-speed execution flag. The program indicating the possibility is assigned to the low-speed arithmetic device.

In the configuration (C), at the time of compiling, the program characteristic analysis means statically analyzes the program and sets a code indicating that the program is not an operation-centered program at a place where the operation processing is interrupted, and only executes the operation. A code indicating that the program is a calculation-centric program is set at the point where the processing starts.

On the basis of the code set by the program characteristic analyzing means, the program characteristic declaring means increases the priority of the corresponding high-speed execution flag before the program enters the processing centered on the arithmetic operation, so that the program characteristic declaring means is provided at a position where the arithmetic processing is interrupted. Before entering, lower the priority of the high-speed execution flag.

[0016] The program dispatch means assigns a program whose corresponding high-speed execution flag indicates executable to a high-speed operation device or a low-speed operation device according to the priority indicated by the corresponding high-speed execution flag. The program indicating the possibility is assigned to the low-speed arithmetic device.

In the configuration (D), when compiling a program to be executed on the high-speed operation device or the low-speed operation device, the program use memory analyzing means statically analyzes the program and the processing unit of the program is reduced. The code that declares the address to be accessed is embedded before the processing unit.

The main memory allocating means, when allocating the main memory to the program, allocates all of the program to the main memory and a processing unit of the program in which an address to be accessed by a code is declared. If the high-speed execution flag can be assigned to the program, the high-speed execution flag corresponding to the program indicates that the program can be executed by the high-speed operation device.

When the program is executed, the program dispatch means allocates, to the high-speed operation device, a program whose corresponding high-speed execution flag indicates that the program can be executed by the high-speed operation device, and assigns the program that indicates that the program cannot be executed to a low-speed operation device. Assign to arithmetic unit.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention, in which a main storage device 1, an auxiliary storage device 2, and a main storage device 1 are shown.
A program 3 existing on the upper or auxiliary storage device 2;
An address translation mechanism 4-1 for translating a logical address on the program 3 into a physical address on the main storage device 1.
4-2, the address translation mechanism 4 during execution of the program 3
If the address translation by -1 fails, the high-speed operation device 5 and the high-speed operation device 5, which are accelerated on the assumption that re-execution from the instruction is not performed, share the main storage device 1 and operate at high speed. The low-speed arithmetic device 6 is capable of executing the same instruction as the arithmetic device 5 and re-executable from the instruction when the address translation by the address translation mechanism 4-2 fails during the execution of the program.

In the main storage device 1, a virtual space management means 7, a high-speed execution flag 8, a main storage allocating means 9
A program dispatching unit 10, a program characteristic determining unit 11, a program characteristic analyzing unit 12, a program characteristic declaring unit 13, and a program use memory analyzing unit 14.

The virtual space management means 7 allocates a part of the program executed in the low-speed operation device 6 to the main storage device 1 and stores the remaining portion in the auxiliary storage device 2,
When the address translation by the address translation mechanism 4-2 fails, an area is secured in the main storage device 1, and further, the contents held in the auxiliary storage device 2 are written in the secured area.
Thereafter, by re-executing the instruction, there is a function of enabling execution of a program that uses a space larger than the capacity of the main storage device 1 that can be actually used.

The high-speed execution flag 8 is provided corresponding to the program 3 and indicates whether or not the program 3 can be executed by the high-speed operation device 5. Shows the priority when it is executed. Although FIG. 1 shows only the program 3, only the high-speed execution flags corresponding to the program 3 are shown, but the high-speed execution flags are provided for all the programs to be executed.

When compiling a program executed on the high-speed operation device 5 or the low-speed operation device 6, the program use memory analysis means 14 statically analyzes the program,
It has a function of embedding a code for declaring an address to be accessed by a certain processing unit of a program before entering the processing unit.

The main memory allocating means 9 allocates the program 3 to the main storage device 1 when the main storage device 1 has free space necessary for executing the program 3 and sets the high-speed execution flag 8 corresponding to the program 3 to the high-speed operation device. And a processing unit embedded in the program 3 by the program use memory analysis unit 14 when there is no free space required for the execution of the program 3 in the main storage device 1. Reads the code indicated by the address to be accessed, and determines whether or not there is free space in the main storage device 1 to allocate the program portion indicated by the code. The function also determines that the free space to allocate the program portion indicated by the code exists in the main storage device 1. If it is determined that this is the case, the certain processing unit (program portion indicated by the code) of the program 3 is stored in the main storage device 1. A function for setting the high-speed execution flag 8 corresponding to the allocation and the program 3 to indicate that the program can be executed by the high-speed arithmetic unit 5; And a function for setting the high-speed execution flag 8 corresponding to the flag 3 to indicate that the high-speed operation device 5 cannot execute.

The program dispatching means 10 converts the program indicating that the corresponding high-speed execution flag can be executed by the high-speed operation device 5 according to the priority indicated by the corresponding high-speed execution device 5 or the low-speed operation device 5 or the low-speed operation device. It has a function of allocating to the low-speed operation device 6 a program that is allocated to the operation device 6 and that indicates that the corresponding high-speed execution flag indicates that execution by the high-speed operation device 5 is impossible.

The program characteristic judging means 11 determines that the program whose corresponding high-speed execution flag indicates that the program can be executed by the high-speed operation device 5 is continuously executed for a time longer than the time determined by the system. Is used, it is determined that the program is a program that is executing computation-intensive processing, the priority of the high-speed execution flag corresponding to the program is increased, and if the computation processing is interrupted due to a program system call, etc. It has a function of determining that the program is not executing the main process and lowering the priority of the high-speed execution flag corresponding to the program.

When compiling a program to be executed on the high-speed operation device 5 or the low-speed operation device 6, the program characteristic analysis means 12 statically analyzes the program, and analyzes the program before it enters a place where processing is interrupted by a system call or the like. A function to set a code indicating that the program is not executing the processing centered on the operation, and to set a code indicating that the program is executing the processing centered on the operation in a part before entering the processing only for the operation Having.

In accordance with the code set by the program characteristic analyzing means 12, the program characteristic declaring means 13 raises the priority of the high-speed execution flag before starting only the processing, and conversely, places where the processing is interrupted due to a system call or the like. First, it has a function of lowering the priority of the high-speed execution flag.

FIG. 2 is a flowchart showing a processing example of the main memory allocating means 9.

When executing the program 3, the main memory allocating means 9 first determines whether or not there is a free space required for executing the program 3 in the main storage device 1 (step S21).

If it is determined that there is free space (step S21: yes), the main memory allocating means 9
Allocates the main storage device 1 to the program 3 (step S23). Since the program 3 can be executed on the high-speed operation device 5, the main memory allocating means 9 executes the program 3
The corresponding high-speed execution flag 8 is set to indicate that it can be executed by the high-speed operation device 5 (step S23).

When there is no free space required for executing the program 3 in the main storage device 1 (step S21 is n
o) reads a code indicating an address to be accessed by a certain processing unit of the program 3 embedded in the program 3 by the program use memory analyzing means 14,
It is determined whether or not there is free space in the main storage device 1 to which the program portion indicated by the code can be assigned.
(Step S24).

When it is determined that the program 3 exists (Yes in step S24), the certain processing unit of the program 3 is allocated to the main storage device 1 (step S25). Since this program 3 can also be executed on the high-speed operation device 5, the main memory allocating means 9 sets the high-speed execution flag 8 corresponding to the program 3 to indicate that the high-speed operation device 5 can be executed (step S26).

If it is determined that there is no free space on the main storage device 1 to which the program portion indicated by the code can be allocated (No in step S24), the main storage allocating means 9 determines that the program 3 is a high-speed processing device. In step S5, it is determined that execution is not possible, and the high-speed execution flag 8 corresponding to the program 3 is set to indicate that execution is not possible in the high-speed operation device 5 (step S27). If the high-speed execution flag 8 is set to indicate that the high-speed operation device 5 cannot execute the high-speed execution,
The program 3 is executed on the low-speed operation device 6, and the necessary memory is allocated by the virtual space management means 7 when it is actually needed.

FIG. 3 is a flowchart showing a processing example of the program dispatch means 10.

The program dispatching means 10 is a program to be assigned to the arithmetic unit which is a high-speed arithmetic unit 5
(Yes in step S31), the program whose execution in the high-speed operation device 5 is prioritized, that is, the corresponding high-speed execution flag indicates that the program can be executed in the high-speed operation device 5, and the priority becomes high. It is determined whether or not a program exists (step S32).

If it is determined that the program exists (Yes in step S32), the program dispatch unit 1
0 indicates that the high-speed execution flag can be executed by the high-speed operation device 5, and selects one of the programs having higher priority and causes the high-speed operation device 5 to execute the program (step S3).
5).

If it is determined that the program does not exist (step S32 is no), the program dispatching means 10
Indicates whether there is a program executable in the high-speed operation device 5 on the main storage device 1, that is, a program whose corresponding high-speed execution flag indicates that the program can be executed in the high-speed operation device 5 and whose priority is low. (Step S3
3).

If it is determined that the program is present (Yes in step S33), the program dispatch unit 1
0 indicates that the high-speed execution flag indicates that the high-speed operation device 5 can be executed, and 1 of the programs whose priority is low.
Is selected and executed by the high-speed operation device 5 (step S
35).

If it is determined that the program does not exist (step S33: no), there is no program to be allocated, so that the apparatus enters an idle state (step S34).

If the arithmetic device to which the program is assigned is the low-speed arithmetic device 6 (step S31)
No) indicates that the program dispatching means 10 does not give priority to execution in the high-speed operation device 5, that is, a program whose high-speed execution flag indicates that execution is possible in the high-speed operation device 5 and whose priority is low. It is determined whether or not exists (step S36).

If it is determined that the program exists (Yes in step S36), the program dispatching means 1
0 indicates that the high-speed execution flag indicates that the high-speed operation device 5 can be executed, and 1 of the programs whose priority is low.
Is selected and executed by the low-speed operation device 6 (step S
35).

On the other hand, when it is determined that the program does not exist (step S36 is no), the program dispatching means 10
Determines whether there is an executable program, that is, a program whose high-speed execution flag indicates that the high-speed operation device 5 cannot execute (step S37).

Then, if it is determined that the program exists (Yes in step S37), the program dispatch unit 1
A value of 0 selects one of the programs whose high-speed execution flag indicates that the high-speed operation device 5 cannot be executed, and causes the low-speed operation device 6 to execute the program (step S35).

When it is determined that the program does not exist (No in step S37), the program enters an idle state because there is no program to be allocated (step S38).

Here, whether or not the program corresponding to the high-speed execution flag can be executed by the high-speed operation device 5 and the priority are displayed, and the program is transmitted to the high-speed operation device 5 or the low-speed operation device 6 in consideration of the priority. Was assigned.
The high-speed execution flag indicates only whether or not the execution by the high-speed operation device 5 is possible, and the corresponding high-speed execution flag indicates that the high-speed operation device 5 is executable.
, And the program that is displayed as unexecutable may be assigned to the low-speed operation device 6.

FIG. 4 is a flowchart showing the processing performed by the program characteristic determining means 11 in the processing for controlling the priority of the high-speed execution flag.

When the program being executed by the high-speed arithmetic unit 5 calls the supervisor (step S41), the program characteristic judging means 11 judges that the program is not executing the operation-centered processing, and The priority of the high-speed execution flag is reduced (step S42).

Further, the program characteristic determining means 11 has triggered the interruption by the time slice shown in step S43 to determine whether the program has been using the high-speed operation device 5 and the low-speed operation device 6 continuously for at least the time determined by the system. It is checked whether or not it is (step S44).

When the program uses the high-speed operation device 5 and the low-speed operation device 6 continuously for a period of time determined by the system (step S44: yes), the program performs a process centered on the operation. Is determined,
The priority of the high-speed execution flag corresponding to the program is increased (step S45).

When it is determined that the program does not use the high-speed operation device 5 and the low-speed operation device 6 continuously for a time specified in the system (step S44 is no).
Does not change the priority of the high-speed execution flag corresponding to the program.

The processing by the program characteristic determining means 11 shown in FIG. 4 is not performed on a program in which a code is embedded by the program characteristic analyzing means 12.

FIG. 5 is a flowchart showing the processing performed by the program characteristic declaration means 13 in the processing for controlling the priority of the high-speed execution flag.

When executing the program 3, the program characteristic declaring means 13 determines that the program 3 enters the processing of only the operation based on the code embedded in the program 3 by the program characteristic analyzing means 12. Before executing the calculation-centric processing shown in step S52, the priority of the high-speed execution flag 8 corresponding to the program 3 is increased (step S51).

When the program characteristic declaring means 13 determines that the program 3 enters a place where the processing is interrupted by a system call or the like based on the code embedded in the program 3 by the program characteristic analyzing means 12, the program 3 Before terminating the computation-centered process shown in step S54, the priority of the high-speed execution flag 8 corresponding to the program 3 is lowered (step S53).

[0058]

As described above, according to the present invention, when all the programs can be allocated to the main storage device, the programs are allocated to the high-speed processing device, and when they cannot be allocated, the function of the virtual storage is used. Since it is assigned to the low-speed arithmetic unit, the processing efficiency of the system can be increased, and even if the system memory must be configured and used for some reason, all programs can be used. This has the effect of being executable.

Further, according to the present invention, the priority of a high-speed execution flag corresponding to a program (a program centered on calculation) using a high-speed operation device or a low-speed operation device continuously for a predetermined time or more is set to be high, and the program has priority. Since it is provided with a program characteristic determining means for assigning to a high-speed arithmetic device, it is possible to allocate an arithmetic device according to the characteristics of a program, and to further improve the processing efficiency of the system. There is an effect.

The present invention also provides a program characteristic analysis that statically analyzes a program when compiling the program, and sets a code indicating this in a portion where the program enters into a process centered on the operation and a portion in which the program enters a process which is not centered on the operation. Means and program characteristic declaration means for changing the priority of the corresponding high-speed execution flag in accordance with the code set by the program characteristic analysis means at the time of execution of the program. This makes it possible to improve the processing efficiency of the system.

Further, according to the present invention, at the time of compiling a program, a program use memory analyzing means for embedding a code for declaring an address to be accessed by the processing unit of the program before the processing unit, and the processing unit can be allocated to the main storage device. Main memory allocating means for displaying, in a high-speed execution flag, that the program can be executed by the high-speed processing device, and processing requiring a large memory area is performed at a low speed by using a virtual memory function. In an arithmetic unit, sufficient processing in a small memory area can be executed by a high-speed arithmetic unit. Therefore, even when the entire program cannot be allocated to the main storage device under a high system load, the processing of the system can be performed. There is an effect that the efficiency can be increased.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a flowchart showing a processing example of a main memory allocating unit 9;

FIG. 3 is a flowchart showing a processing example of a program dispatching means 10;

FIG. 4 is a flowchart showing a processing example of a program characteristic determining unit 11;

FIG. 5 is a flowchart showing a processing example of a program characteristic declaring means 13;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Main storage device 2 ... Auxiliary storage device 3 ... Program 4-1 and 4-2 ... Address conversion mechanism 5 ... High-speed operation device 6 ... Low-speed operation device 7 ... Virtual space management means 8 ... High-speed execution flag 9 ... Main storage allocation Means 10: Program dispatch means 11: Program characteristic determination means 12: Program characteristic analysis means 13: Program characteristic declaration means 14: Program use memory analysis means

Claims (4)

(57) [Claims] 1. A main storage device, an auxiliary storage device, a program existing on the main storage device or the auxiliary storage device, and a logical address of the program being a physical address on the main storage device. An address translation mechanism that translates into: a high-speed arithmetic device that is accelerated on the assumption that when the address translation by the address translation mechanism fails during the execution of the program, the instruction that failed in the address translation is not re-executed. Sharing the main storage device with the high-speed processing device;
And can execute the same instruction as the high-speed operation device,
During execution of the program, when the address translation by the address translation mechanism fails, a low-speed operation device capable of re-executing an instruction whose address translation has failed, and a virtual space for realizing virtual storage for the program executed by the low-speed operation device Management means; a high-speed execution flag indicating whether or not the program can be executed by a high-speed arithmetic device; and when allocating the main storage device to the program, all of the program can be allocated to the main storage device. Main memory allocating means for setting a high-speed execution flag corresponding to the program to indicate that the program can be executed by the high-speed operation device; To the low-speed computing device. And a program dispatching means. 2. The high-speed execution method according to claim 1, further comprising: displaying whether or not the program can be executed by a high-speed operation device, and displaying a priority to be executed by the high-speed operation device. comprising a flag, it assigns the program corresponding high speed run flag indicates executable, to the high-speed arithmetic device or the low-speed computing unit according to preference indicated by the corresponding high-speed execution flag,
A program dispatching means for assigning a program whose corresponding high-speed execution flag indicates that execution is not possible to the low-speed arithmetic device; and the program causes the system to continuously execute the high-speed arithmetic device or the low-speed arithmetic device for a predetermined time or more. When used, a program characteristic determining means for increasing the priority indicated by the high-speed execution flag corresponding to the program, and lowering the priority of the high-speed execution flag corresponding to the program when arithmetic processing by the program is interrupted. Characteristic program dispatch method. 3. The program dispatching method according to claim 2, wherein a program executed on the high-speed operation device or the low-speed operation device is compiled statically in place of the program characteristic determining means. A program characteristic analysis means for setting a code indicating that the program is not an operation-centered program at a place where analysis and operation processing is interrupted, and setting a code indicating that the program is an operation-centered program at a place where only processing is executed, Further, according to the code set by the program characteristic analyzing means, the priority of the high-speed execution flag corresponding to before the program enters into the processing centered on the arithmetic operation is increased, and the high-speed execution flag corresponding to before the program enters the place where the arithmetic processing is interrupted is set. A program disk comprising program characteristic declaration means for lowering the priority of a flag. Pitch system. 4. The program dispatching method according to claim 1, wherein when compiling a program executed on the high-speed operation device or the low-speed operation device, the program is statically analyzed and a processing unit of the program is executed. If There comprising program uses memory analyzing means for embedding before the process unit code to declare an address to be accessed, when assigning the main storage device in the program, which can be assigned to all of the program to the main memory In addition, a high-speed execution flag corresponding to the program indicates that the program can be executed by the high-speed arithmetic unit even when a processing unit of a program in which an address to be accessed by the code is declared can be allocated to the main storage device. flop, characterized in to, further comprising a main memory allocation means which Gram dispatch system.