JP2990906B2 - Heat sink for mounting semiconductor elements - Google Patents
Heat sink for mounting semiconductor elementsInfo
- Publication number
- JP2990906B2 JP2990906B2 JP3327337A JP32733791A JP2990906B2 JP 2990906 B2 JP2990906 B2 JP 2990906B2 JP 3327337 A JP3327337 A JP 3327337A JP 32733791 A JP32733791 A JP 32733791A JP 2990906 B2 JP2990906 B2 JP 2990906B2
- Authority
- JP
- Japan
- Prior art keywords
- heat sink
- layer
- mounting
- semiconductor element
- thickness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Die Bonding (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Semiconductor Lasers (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体レーザやＬＥＤ
等の光発光素子を実装するための金属膜をもったセラミ
ックス製の半導体素子実装用ヒートシンクに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor laser and an LED.
The present invention relates to a ceramic semiconductor element mounting heat sink having a metal film for mounting a light emitting element such as the above.
【０００２】[0002]
【従来の技術】半導体レーザやＬＥＤ等の光発光素子を
実装するための金属膜を有するセラミックス製ヒートシ
ンクは、半導体素子をヒートシンク上に接合するため、
並びに導体としての金属膜が形成されている。これらの
金属膜は一般に下地のセラミックスと金属膜を強固に結
合するための接合層、例えば、チタン，クロム等の活性
金属層が０.１〜０.２μｍ形成されており、表面層に素
子を接合するためのろう材が良く濡れる金等が０.２〜
１.５μｍ形成されており、活性金属層と表面層の層間
にろう材等の拡散防止層としてニッケルや、白金が０.
２〜１.０μｍ形成された構造になっている。2. Description of the Related Art A ceramic heat sink having a metal film for mounting a light emitting element such as a semiconductor laser or an LED is used for bonding a semiconductor element on the heat sink.
In addition, a metal film as a conductor is formed. These metal films generally have a bonding layer for firmly bonding the underlying ceramic and the metal film, for example, an active metal layer of titanium, chromium, etc. formed in a thickness of 0.1 to 0.2 μm. 0.2-0.2
It is formed to a thickness of 1.5 μm, and nickel or platinum is used as a diffusion preventing layer of a brazing material between the active metal layer and the surface layer.
The structure is 2 to 1.0 μm.
【０００３】従来の実施例を図１に示す。１は表面層の
金等であり、２は中間の拡散防止層のニッケルや、白金
等、３はセラミック等４との接合層であるチタンやクロ
ム等である。FIG. 1 shows a conventional embodiment. 1 is a surface layer of gold or the like, 2 is an intermediate diffusion preventing layer such as nickel or platinum, and 3 is a bonding layer with a ceramic or the like 4 such as titanium or chromium.
【０００４】[0004]
【発明が解決しようとする課題】前記、膜構成のヒート
シンクを用い、素子を鉛−すず系半田や金−すず系半田
を用いてヒートシンク上に接合する場合、最上層の金表
面上を前記半田が濡れ拡がる際にこれら金が半田中に拡
散するとともに、合金化し、表面張力により、特にヒー
トシンクの端部の金属膜厚が薄くなる現象を生じ、上下
面間の導通抵抗が増大する不具合を生じる。本発明の目
的は、ろう材が施される半導体実装用ヒートシンクの上
下面間の導通抵抗が増大しないようにすることにある。 In the case where the above-described heat sink having a film structure is used and the element is joined to the heat sink using lead-tin-based solder or gold-tin-based solder, the uppermost gold surface is soldered to the solder. When the gold spreads and spreads, the gold diffuses into the solder, alloys with it, and the surface tension causes a phenomenon that the metal film thickness particularly at the end of the heat sink becomes thin, resulting in an increase in conduction resistance between the upper and lower surfaces. . Eye of the invention
The target is above the semiconductor mounting heat sink to which the brazing material is applied.
An object is to prevent the conduction resistance between the lower surfaces from increasing.
【０００５】[0005]
【課題を解決するための手段】本発明は、前述の様に、
鉛−すず系半田や金−すず系半田等を用いても、上下面
間の抵抗増大の不具合を生じない様にするため金等の表
面金属膜が前記半田材中に必要以上に拡散するのを防止
する金属膜を設けるとともに、その拡散防止層金属膜下
に導体抵抗低下用金属膜を設けた半導体素子実装用ヒー
トシンクにある。本発明の目的は、半導体素子接合用の
ろう材を施す半導体素子実装用ヒートシンクにおいて、
該ヒートシンクに、前記ヒートシンクとの接合用の活性
金属である接合層、該ろう材の拡散を防止する第一の拡
散防止層、導体抵抗を確保するための層、該ろう材の拡
散を防止する第二の拡散防止層、該ろう材との濡れ性が
良い表面層を順次設けたことにより達成される。 又は、
本発明の目的は、半導体素子実装用ヒートシンクの上下
面に、チタン又はクロム等の活性金属からなる第一の金
属層と、ニッケル又は白金からなる第二の金属層と、金
からなる第三の金属層と、ニッケル又は白金からなる第
四の金属層と、金からなる第五の金属層とを、該ヒート
シンク側から順次設けたことにより達成される。 According to the present invention, as described above,
Even if lead-tin-based solder or gold-tin-based solder is used, the surface metal film such as gold diffuses more than necessary in the solder material so as not to cause a problem of resistance increase between the upper and lower surfaces. The present invention provides a heat sink for mounting a semiconductor element, wherein a metal film is provided for preventing the occurrence of the diffusion, and a metal film for lowering the conductor resistance is provided below the metal film for the diffusion preventing layer. An object of the present invention is to provide a semiconductor device bonding method.
In a heat sink for mounting a semiconductor element to which a brazing material is applied,
The heat sink has an activity for bonding with the heat sink.
A bonding layer which is a metal, a first expansion for preventing diffusion of the brazing material.
Scattering prevention layer, layer for securing conductor resistance, and expansion of the brazing material.
Second diffusion preventing layer to prevent scattering, wettability with the brazing material
This is achieved by sequentially providing good surface layers. Or
It is an object of the present invention to provide a heat sink for mounting a semiconductor element.
On the surface, a first gold made of an active metal such as titanium or chromium
Metal layer, a second metal layer made of nickel or platinum, and gold
A third metal layer made of nickel or platinum
The fourth metal layer and the fifth metal layer made of gold are heated.
This is achieved by providing them sequentially from the sink side.
【０００６】[0006]
【作用】本発明は半田材の拡散防止層、例えば、ニッケ
ルや白金層等を０.１μｍ 以上設け、その下層に導通抵
抗を下げるための金属層、例えば、金を０.３μｍ 以上
設けることにより、表面層の金が、接合用半田材に喰わ
れて端部の金膜厚が薄くなっても、上，下間の導体抵抗
が拡散防止層下の金によって保持されることになり、抵
抗値が増大することはない。According to the present invention, a diffusion prevention layer of a solder material, for example, a nickel or platinum layer is provided at a thickness of 0.1 μm or more, and a metal layer for lowering conduction resistance, for example, a gold is provided at a thickness of 0.3 μm or more under the layer. Even if the gold of the surface layer is eaten by the solder material for bonding and the thickness of the gold at the end is reduced, the conductor resistance between the upper and lower portions is maintained by the gold below the diffusion prevention layer, and the resistance is reduced. The value does not increase.
【０００７】[0007]
【実施例】図２に本発明の実施例を示す。基本的には、
従来の実施例である表面層１と拡散防止層２の間に上下
面間の導体抵抗を確保するための層１ａを設け、この１
ａ層は金等が良く、厚さも０.３μｍ 以上あれば十分で
ある。この１ａと１の間にろう材の拡散防止層２ａを設
け、２ａ層はチタン，クロム等が０.１μｍ 以上であれ
ば、十分なバリア効果を示す。FIG. 2 shows an embodiment of the present invention. Basically,
The layer 1a to ensure conductor resistance between the upper and lower surfaces between the surface layer 1 and the diffusion preventing layer 2 is a conventional example provided, the 1
The layer a is preferably made of gold or the like and has a thickness of at least 0.3 μm. An anti-diffusion layer 2a of brazing material is provided between the layers 1a and 1 and the layer 2a shows a sufficient barrier effect if titanium, chromium or the like is 0.1 μm or more.
【０００８】図１に示す従来例で１に金で０.５μｍ、
２に白金で０.２μｍ、３にチタンで０.１μｍ にした
場合に、鉛−すず系の半田を用いて素子を接合した場合
の上下面の抵抗値に対し、図２に示す実施例で、１に金
を０.０５μｍ 、２ａに白金を０.１μｍ、１ａに金を
０.５μｍ、２に白金を０.１μｍ、３にチタンを０.１
μｍにした場合、従来の実施例に対し全体で金が０.０
５μｍ 増大しただけにもかかわらず、同一半田材を用
いて接合した後の上下面間抵抗は従来品に比べ１／３の
抵抗値であった。[0008] In the conventional example shown in FIG.
In the embodiment shown in FIG. 2, the resistance value of the upper and lower surfaces when the element was joined using lead-tin based solder when the thickness was set to 0.2 μm with platinum for 2 and 0.1 μm for titanium with 3 was used. 1, 1 μm of gold, 2 a with 0.1 μm of platinum, 1 a with 0.5 μm of gold, 2 with 0.1 μm of platinum, 3 with 0.1 of titanium
When the thickness is set to μm, the total amount of gold is 0.0
Despite the increase of only 5 μm, the resistance between the upper and lower surfaces after joining using the same solder material was １ ／ of that of the conventional product.
【０００９】[0009]
【発明の効果】本発明によれば、全体の膜厚がほとんど
変化しないにもかかわらず、接合用に用いた半田材が拡
散防止層のバリア効果により導通抵抗を保持する層に拡
散しないため、半導体実装用ヒートシンクの上下面間の
導通抵抗が増大しないようにすることができるという効
果を奏する。 According to the present invention, the solder material used for bonding is expanded even though the overall film thickness hardly changes.
The barrier effect of the scattering prevention layer extends to a layer that maintains conduction resistance.
Between the upper and lower surfaces of the heat sink for semiconductor mounting
The effect that the conduction resistance can be prevented from increasing
Play a fruit.
【図１】従来の半導体素子実装用ヒートシンクの断面
図。FIG. 1 is a cross-sectional view of a conventional heat sink for mounting a semiconductor element.
【図２】本発明の半導体素子実装用ヒートシンクの一実
施例の断面図。FIG. 2 is a sectional view of an embodiment of a heat sink for mounting a semiconductor element according to the present invention.
１…表面層、２…拡散防止層、３…接合層、４…セラミ
ック等。 DESCRIPTION OF SYMBOLS 1 ... Surface layer, 2 ... Diffusion prevention layer , 3 ... Bonding layer , 4 ... Ceramic
And so on .
Claims (4)
子実装用ヒートシンクにおいて、該ヒートシンクに、前
記ヒートシンクとの接合用の活性金属である接合層、該
ろう材の拡散を防止する第一の拡散防止層、導体抵抗を
確保するための層、該ろう材の拡散を防止する第二の拡
散防止層、該ろう材との濡れ性が良い表面層を順次設け
たことを特徴とする半導体素子実装用ヒートシンク。1. A facilities to semiconductor element mounting sink brazing material for semiconductor elements bonded to the heat sink, the active metal is a bonding layer for bonding with the heat sink, the
The first diffusion preventing layer for preventing the diffusion of the brazing material, the conductor resistance
A mounting layer, a second anti-diffusion layer for preventing diffusion of the brazing material, and a surface layer having good wettability with the brazing material . heatsink.
シンクにおいて、前記導体抵抗を確保するための層の厚
さを０.３μｍ 以上とし、且つ前記第二の拡散防止層の
厚さを０.１μｍ 以上とすることを特徴とする半導体素
子実装用ヒートシンク。 2. The heat sink for mounting a semiconductor element according to claim 1, wherein the thickness of the layer for securing the conductor resistance is at least 0.3 μm, and the thickness of the second diffusion prevention layer is 0. A heat sink for mounting a semiconductor element, wherein the heat sink has a thickness of 0.1 μm or more.
に、チタン又はクロム等の活性金属からなる第一の金属
層と、ニッケル又は白金からなる第二の金属層と、金か
らなる第三の金属層と、ニッケル又は白金からなる第四
の金属層と、金からなる第五の金属層とを、該ヒートシ
ンク側から順次設けたことを特徴とする半導体素子実装
用ヒートシンク。 3. A first metal layer made of an active metal such as titanium or chromium, a second metal layer made of nickel or platinum, and a third metal made of gold on upper and lower surfaces of a heat sink for mounting a semiconductor element. A heat sink for mounting a semiconductor element, wherein a layer, a fourth metal layer made of nickel or platinum, and a fifth metal layer made of gold are sequentially provided from the heat sink side.
シンクにおいて、前記第三の金属層の厚さを０.３μｍ
以上とし、且つ前記第四の金属層の厚さを０.１μｍ以
上とすることを特徴とする半導体素子実装用ヒートシン
ク。 4. The semiconductor element mounting heat sink according to claim 3, 0.3 [mu] m the thickness of the third metallic layer
A heat sink for mounting a semiconductor element, wherein the thickness of the fourth metal layer is 0.1 μm or more.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3327337A JP2990906B2 (en) | 1991-12-11 | 1991-12-11 | Heat sink for mounting semiconductor elements |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3327337A JP2990906B2 (en) | 1991-12-11 | 1991-12-11 | Heat sink for mounting semiconductor elements |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05160169A JPH05160169A (en) | 1993-06-25 |
| JP2990906B2 true JP2990906B2 (en) | 1999-12-13 |
Family
ID=18198013
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3327337A Expired - Fee Related JP2990906B2 (en) | 1991-12-11 | 1991-12-11 | Heat sink for mounting semiconductor elements |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2990906B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08330507A (en) * | 1995-05-30 | 1996-12-13 | Motorola Inc | Hybrid multi-chip module and manufacturing method thereof |
| JP3165779B2 (en) * | 1995-07-18 | 2001-05-14 | 株式会社トクヤマ | Submount |
-
1991
- 1991-12-11 JP JP3327337A patent/JP2990906B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH05160169A (en) | 1993-06-25 |
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