JP2990969B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device laminated by a thin film process, and more particularly to a method of irradiating an amorphous conductor layer deposited on a large area with ultraviolet rays for annealing. The present invention relates to a method of annealing for obtaining a polycrystalline semiconductor layer by crystallizing with a method.

[0002]

2. Description of the Related Art In recent years, large and high-resolution liquid crystal panels,
As the demand for high-speed, high-resolution contact image sensors increases, thin-film transistors (T
It is desired to produce FT) with high performance and uniformity. When fabricating a TFT on a glass substrate which has a low strain point temperature but is inexpensive and easy to increase in area, as a method of forming a polycrystalline silicon (poly-Si) layer serving as a TFT operation layer, for example, Deposit an amorphous silicon layer,
A method of obtaining polycrystalline silicon by annealing this amorphous silicon layer with an excimer laser which is a pulse laser has been proposed (Extended Abstracts of the 1991).
International Conference on Solid State Devices a
nd Materials, 1991, pp623). According to the above method, ultraviolet rays have high energy but a short pulse width (20 nsec)
Excimer laser (for example, Kr
Since the oscillation wavelength is 248 nm for F), defects in the film can be reduced and the substrate is hardly damaged by heat.
There is an advantage that a glass substrate having a low thermal strain point can be used as an insulating substrate and a high-performance TFT can be realized.

[Problems to be solved by the invention]

According to the above-mentioned method, when irradiating a laser beam, the particle size of polycrystalline silicon changes depending on the energy density. Usually, in order to obtain a good field effect mobility μ by increasing the grain size of the polycrystalline silicon,
Irradiation is performed with a laser having a relatively large energy density of about 450 mJ / cm ^2, but in this case, the surface flatness of the polycrystalline silicon layer is deteriorated and the TFT characteristics are not sufficient, and the characteristics of the film are not uniform. Therefore, there is a problem that adversely affects the design and creation of a drive circuit such as a shift register. In addition, when irradiation with a laser having a low energy density is performed in order to improve the surface flatness of the polycrystalline silicon layer, the field effect mobility μ becomes small and a TFT having good characteristics cannot be obtained.

The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide a method of manufacturing a polycrystalline semiconductor layer whose characteristics are less likely to vary within a substrate while maintaining a high field effect mobility μ. .

[0005]

According to the first aspect of the present invention, an amorphous semiconductor layer deposited on an insulating substrate is irradiated with a laser beam a plurality of times.
Melting and recrystallizing it to obtain a polycrystalline semiconductor layer.
A method for manufacturing a semiconductor device, comprising the following steps:
I have it. As a first step, the amorphous semiconductor layer
When polycrystallizing by laser irradiation , a large number of crystal nuclei having a threshold energy density _ETH required for phase transition from an amorphous semiconductor to a polycrystalline semiconductor and having a grain size of 1000 Å or less are formed. annealing the amorphous semiconductor layer at an energy density E ₁ being. As a second step, melting the energy density E crystal nuclei inside and outside defects prepared high in energy density E ₂ a polycrystalline semiconductor layer in which the crystal nuclei are formed from ₁ again annealed first step. Then, the energy density E ₂ is set smaller than the size to completely re-melting of all the crystallites nuclei formed in the first step.

According to a second aspect of the present invention, an excimer laser is applied to an amorphous silicon layer deposited on an insulating substrate a plurality of times.
By irradiating the laser, it is melted and recrystallized.
Semiconductor device comprising a step of obtaining a polycrystalline silicon layer by
This is a manufacturing method including the following steps. As a first step, the amorphous silicon layer is irradiated with a laser.
By the time of polycrystalline, amorphous silicon layer is annealed at a threshold energy density E _TH is greater than the energy density E ₁ required for phase transition to polycrystalline silicon from amorphous silicon, a particle size of 10 angstroms to 1000 angstroms A crystal nucleus is formed. The As 2 step, larger than the energy density E ₁ and polycrystalline silicon layer all crystal nuclei completely crystalline nuclei in a small energy density E ₂ than the size remelting formed in the first step is prepared Is again annealed to melt the defects inside and outside the crystal nuclei.

[0007]

According to the present invention, the irradiation threshold energy density E _TH laser light of a larger energy density E ₁ required for the phase transition to the amorphous semiconductor polycrystalline semiconductor from (amorphous silicon) (polycrystalline silicon) Thereby, the amorphous semiconductor layer is annealed to form a large number of microcrystal nuclei of 1000 Å or less in the amorphous semiconductor layer.

[0008] The polycrystalline semiconductor layer (po
The ly-Si layer) has many defects inside the crystal nuclei and at the boundaries. Then, by irradiating a laser beam of the energy density E ₁ is greater than the energy density E _2, melting the crystal nuclei inside and outside defects. At this time, since the energy density E ₂ was made smaller than the size that completely remelts all the crystal nuclei formed in the first step, the crystal nuclei themselves formed in the first step hardly melted. The nucleus becomes the limiting factor, forcing the particle size to be small and uniform.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described with reference to FIGS. L on an insulating substrate 11 such as glass
An amorphous silicon (a-Si) layer 12 having a thickness of about 1000 angstroms is deposited by a PCVD method or the like (FIG. 1A), and a threshold energy density E required for a phase transition from a-Si to poly-Si is obtained. annealing is performed in a-Si by irradiation with an excimer laser having a _TH greater energy density E _1, to form a poly-Si layer 13a having a large number of crystal nuclei (Figure 1 (b)). Subsequently, an excimer laser having an energy density E ₂ higher than the energy density E ₁ is irradiated, and the energy density E ₁
Melts and removes defects inside and outside the crystal nuclei formed by irradiating the excimer laser of
The -Si layer 13b is formed (FIG. 1C). At this time, by setting the energy density E ₂ to a value smaller than the size at which all the crystal nuclei formed in the above step are completely re-melted, the crystal nuclei formed in the above step are not melted, and the particle diameter of this nucleus is reduced. Determines the particle size of poly-Si, so that it can be forcibly made smaller and uniform. Excimer laser is KrF
(248 nm oscillation), a pulse width of 20 nsec, a beam size of 7 × 7 mm ² , and an energy uniformity within the beam of ± 5% or less were used. In this case, the threshold energy density E _TH was 170 mJ / cm ² .

Next, the poly-Si layer is patterned into an island shape by a photolithography method to form an operation layer 14, and then a 1000 Å SiO 2 film is formed by an LPCVD method.
₂ is deposited on the entire surface to form a gate insulating film 15. Then, 3000 Å of poly-Si is deposited on the gate insulating film 15 corresponding to the substantially central portion of the operation layer 14 by LPCVD, and is patterned to form a gate electrode 16.
Is formed (FIG. 1D). Using the gate electrode 16 as a mask, a dopant is implanted by ion implantation to form a source portion 17a and a drain portion 17b (FIG. 1E).
By depositing SiO ₂ to a thickness of 7000 Å by LPCVD, an interlayer insulating film 18 is formed (FIG. 1).
(F)). At the time of ion implantation, phosphorus (P) was implanted into a portion desired to be an n-channel TFT, and boron (B) was implanted into a portion desired to be a p-channel TFT. Next, the interlayer insulating film 18 is patterned to form the source 17a and the drain 1
A contact hole 19 is opened at a position corresponding to 7b, hydrogenation is performed at 350 ° C., Al is deposited and patterned to form a wiring 20, and a thin film transistor is manufactured (FIG. 1 (g)).

Next, in the above-mentioned TFT manufacturing method, the energy density E ₁ and the energy density E ₂ for obtaining a TFT having good characteristics and uniformity were examined. N-channel TF obtained by the above method
Regarding the variation in the mobility of the T and p channel TFTs,
The graph illustrating the energy density E ₁ dependent upon securing the energy density E ₂ to 450 mJ / cm ² shown in FIG. Energy density E ₁ = 0 mJ in FIG.
/ Cm ² corresponds to the conventional example (annealing is performed at a single energy density E ₂ ). In the case of the above embodiment, the threshold energy density ETH is about 170 mJ / cm.
^Although it is ² , it can be confirmed that the mobility sharply becomes uniform from the vicinity where the energy density E ₁ exceeds 270 mJ / cm ² , and that uniformity which has not been obtained before can be obtained.

Next, an n-channel TFT and a p-channel TFT
Regarding the variation in the mobility of the FT, the energy density E ₁
FIG. 3 is a graph showing a measurement of the energy density E ₂ dependence when is fixed at 270 mJ / cm ² . According to this graph, although the characteristics of mobility with increasing energy density E ₂ is improved, the energy density E ₂ 520
If it is too large, such as mJ / cm ^2, the uniformity will deteriorate.
Therefore, the energy density E _2, 400 to 500
It turns out that about mJ / cm ² is appropriate.

[0013] In the above embodiment, to form a large number of crystal nuclei in the first annealing by energy density E _1, performs a second annealing by the energy density E ₁ is greater than the energy density E _2, the crystal nucleus out of the defect Is removed. Second
In order to make the nucleus small enough not to be extinguished by annealing,
In the annealing, the size of the nucleus needs to be 10 Å or more. In order to keep a nucleus that is too small, it is conceivable to use a lower energy density E ₂ , but in that case, defects in the film are not melted away and good TFT characteristics cannot be obtained. On the other hand, if the nucleus is too large, the surface flatness of the film deteriorates, and the T
Since the FT characteristics are deteriorated, the size of the nucleus needs to be 1000 Å or less. On the other hand, if the energy density E ₂ is too large, all nuclei are completely melted regardless of the size of the nuclei, resulting in a non-uniform film quality as in the conventional case where E ₁ = 0. The above phenomenon occurs when the energy density E ₂ is 520 mJ / cm ² or more.

Since the surface flatness greatly depends on the energy density E ₁ of the first annealing, the energy density E _{2 is set} to 4
The surface flatness was fixed at 50 mJ / cm ² , and the dependence of the surface flatness on the energy density E ₁ was measured with an atomic force microscope. FIG. 4 shows the results. Surface flatness is annealed poly
-The lowest position of the Si layer was defined as a reference plane, and the height was defined by a difference in height from the reference plane. In the measurement, the annealed
In the poly-Si layer, a height difference from the reference surface in an arbitrarily selected area portion (3 or 4 positions) of 2 μm × 2 μm is measured at about 20,000 points for each energy density E ₁ , and the average is measured. The values are shown in FIG. In the figure, the energy density E1 = 0 corresponds to the conventional method. If E ₁ = 0 or E ₁ is small, the nucleus generated at E ₁ is too small and E _1
2 It disappears at the time of irradiation, and the effect of annealing stepwise does not appear. Also, the energy density E ₁ is too great, the ultimate flatness of the film from the relationship of FIG. 5 to be described below is not appropriate since deteriorated. From FIG. 4, the energy density E ₁ at which the surface flatness at each measurement point becomes uniform is 24
A 0~380mJ / cm ² or so, the surface flatness excellent and uniformity indicates the low value energy density E ₁ was confirmed to be 270mJ / cm ^2. In another experiment, it was found that under the condition that the energy density E ₁ was 270 mJ / cm ² , not only the flatness but also the particle size became the most uniform. Since the size of the nucleus (grain) to changes in the energy density of the excimer laser is as shown in FIG. 5, the energy density E ₁ is grain size corresponding to 270mJ / cm ² becomes 200 angstroms, polycrystalline having this particle size TFT with silicon layer
Has good characteristics and can achieve uniform characteristics. In addition, the energy density E ₂ of the second annealing needs to be smaller than the size at which the crystal nuclei formed in the first annealing are completely remelted, and the energy density E ₁ of the first annealing is set to 270 mJ. / Cm ²
In this case, the energy density E ₂ is about 450 mJ / cm ² .

From the above, as the optimum energy densities E ₁ and E ₂ in the above embodiment, E ₁
= 270 mJ / cm ² and E ₂ = 450 mJ / cm ² , and an n-channel TFT and a p-channel TFT were manufactured. As a result, the characteristics could be made uniform, the mobility μ, the threshold voltage VTH, the minimum The following good value was obtained as the leak current IMIN (the size of the TFT is gate width / gate length = 50 μm / 10 μm). n-channel TFT p-channel TFT mobility μ (cm ² / V · S) 57 45 threshold voltage VTH (V) 0.8 -2.7 minimum leak current IMIN (pA) 8 -2

Here, poly-S when the mobility is uniformed
When the particle size of the i-film was evaluated by a transmission electron microscope, the average particle size was reduced to about 50% of the conventional one, but the distribution in the substrate confirmed that the particle size was extremely uniform. . Therefore, when annealing is performed in a stepwise manner with different energy densities as in the above-described embodiment, it can be understood that the mobility is made uniform by making the particle diameter uniform.

Next, the principle of making the particle diameter uniform by the method of this embodiment will be described. Although the energy density E _{1 of the} laser irradiated at the time of the first annealing is larger than the threshold energy E _TH but relatively small to completely polycrystallize a-Si, the energy density E ₁ in the film after annealing is low. , Many fine crystalline nuclei are generated, and many amorphous-like defects remain. In this state, the large energy density E ₂ laser - is irradiated with, since defects large number of crystal nuclei, but is melted removed that has been prepared is not melted in the film, the particle diameter is forcibly reduced uniform by the nuclear Is done. At this time, if the energy density E ₂ is increased (520 mJ / cm ² or more in the above embodiment), even the prepared crystal nuclei are completely re-melted, which is the same as the conventional annealing using only a single energy density. Results.

That is, as shown in FIG. 6A, the annealing is carried out by moving the laser beam 61 over the substrate, but about 10% of the length L of one side of one beam is applied for uniform irradiation. Irradiation is performed by overlapping. Therefore, the influence of the energy reduction portion at the beam end, the energy variation in the beam, and the temperature gradient and temperature fluctuation generated in the film are directly reflected on the particle size of the poly-Si film, and as shown in FIG. Angstrom, which is large but causes variation in the grain size of the grains (especially, the grain size is extremely small in the overlap region compared to other portions). In contrast, when annealing is performed stepwise with different energy densities, FIG.
As shown in (b), the energy density E ₁ (270
The portion annealed at mJ / cm ² ) is again annealed at energy density E ₂ (450 mJ / cm ² ). Therefore, although the grain diameter is determined by the first annealing having a small energy density, the grain diameter becomes as small as 800 angstroms, but the grain diameter becomes small due to the energy density variation and the temperature variation in the beam during the second annealing. The influence of the variation is prevented (as shown in FIG. 7, the drop width of the grain diameter particularly in the overlap region is reduced). From the above, it can be said that the energy density E ₁ has a role of preparing a nucleus having an appropriate size to make the grain size and flatness uniform, and the energy density E ₂ has a role of removing the remaining defects.

Further, when performed alone annealing with an energy density of ^{270mJ / cm 2, 270mJ / cm} 2
FIG. 8 shows the results of measuring the distribution of surface flatness when annealing was performed twice at an energy density of 450 J / cm ² and when annealing was performed independently at an energy density of 450 mJ / cm ² . As in FIG. 4, the surface flatness on the horizontal axis was defined as the lowest position of the annealed poly-Si layer as a reference plane, and the height difference from this reference plane. In the measurement, an arbitrarily selected 2 μm × 2 μm was selected in the annealed poly-Si layer.
The height difference from the reference plane at an area of m (for example, three or four positions) is measured for about 20,000 points for each area, and the height difference (surface) of 0 to 100 (nm) is determined using the number as a denominator. The ratio occupied by the flatness is plotted on the vertical axis. As shown in the figure, compared to the case where the single annealing was performed at the energy density of 450 mJ / cm ² ,
Person for performing twice annealing with an energy density of J / cm ² and 450 J / cm ^2, together with the width of the spread of the distribution of height difference (surface flatness) becomes smaller, the average value of the height difference (surface flatness) Was also shifted to the left side of the figure to reduce the value, and it was confirmed that the surface flatness could be made uniform. When single annealing is performed at an energy density of 270 mJ / cm ² , the flatness is good, but it cannot be applied to a TFT because there are many defects in the film.

In the above embodiment, the semiconductor film is made of S
Although the example using i has been described, Ge, SiGe,
The present invention can be applied to a semiconductor film such as InSb. Further, the laser is not limited to an excimer laser, and another pulse laser such as a ruby laser may be used. In the case of the above embodiment, the poly-Si layer formed by laser annealing was used as the active layer of the TFT. However, when the poly-Si layer was used for the gate electrode or the resistor of the semiconductor device or the TFT, these poly-Si layers were not used. The method of this embodiment may be applied at the time of fabrication.

[0021]

According to the method of the present invention, the threshold energy density E _TH required for a phase transition from an amorphous semiconductor (amorphous silicon) to a polycrystalline semiconductor (polycrystalline silicon) is obtained.
By irradiating a laser beam having a higher energy density E ₁ , the amorphous semiconductor layer is annealed so that 1
000 angstroms of large number of fine crystal nuclei are formed, by irradiating a laser beam of the energy density E ₁ is greater than the energy density E _2, so to melt the crystal nuclei out of the defect, the particle diameter by the crystal nuclei Is compulsorily reduced and uniformized, and the characteristics and uniformity of the semiconductor element can be improved.

[Brief description of the drawings]

FIGS. 1A to 1G are process diagrams for explaining a manufacturing process of an embodiment of the method of the present invention.

FIG. 2 is a graph showing the energy density E ₁ dependence of the mobility of a TFT obtained by an example method.

FIG. 3 is a graph showing the energy density E ₂ dependence of the mobility of the TFT obtained by the method of the embodiment.

FIG. 4 is a graph showing the energy density E ₁ dependence of the surface flatness of the semiconductor film obtained by the method of the embodiment.

FIG. 5 is a graph showing the energy density E ₁ dependence of the grain size when polycrystallizing a-Si.

FIGS. 6A and 6B are schematic diagrams when annealing by a laser beam is performed.

FIG. 7 is a graph showing a relationship between a beam position and a grain size when annealing is performed.

FIG. 8 is a graph showing the distribution of surface flatness during annealing.

[Explanation of symbols]

11: insulating substrate, 12: amorphous silicon layer,
13: poly-Si layer, 14: operating layer, 15: gate insulating film, 16: gate electrode, 17a: source part, 1
7b: drain portion, 18: interlayer insulating film, 19: contact hole, 20: wiring

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 21/20

Claims (2)

(57) [Claims] 1. An amorphous semiconductor layer deposited on an insulating substrate .
Then, laser irradiation is performed several times to
A method for manufacturing a semiconductor device comprising a step of obtaining a polycrystalline semiconductor layer by melting and recrystallizing, the method comprising the steps of: higher than the threshold energy density E _TH required for phase transition semiconductor, and particle size first annealing an amorphous semiconductor layer at an energy density E ₁ a number of crystal nuclei becomes less 1000 angstroms is formed second step of melting a step, the energy density crystal nuclei and out of the defect E ₁ a polycrystalline semiconductor layer in which the crystal nuclei are formed at a higher energy density E ₂ was prepared again annealed first step has the door, the energy density E ₂ is a method of manufacturing a semiconductor device, characterized in that less than the size to completely re-melting of all the crystallites nuclei formed in the first step. 2. The method according to claim 1 , wherein the excimer laser is irradiated a plurality of times to the amorphous silicon layer deposited on the insulating substrate.
A method for producing a polycrystalline silicon layer by melting and recrystallizing the polycrystalline silicon layer , wherein the polycrystalline silicon layer is polycrystallized by irradiating a laser beam. Threshold energy density E _TH required for phase transition to crystalline silicon
The amorphous silicon layer is annealed at a higher energy density E ₁ and has a particle size of 10 Å or more.
First to form crystal nuclei of not more than 00 angstroms
Of the process, the polycrystalline silicon layer energy greater than the density E ₁ and the crystal nucleus first of all crystal nuclei formed in step with a small energy density E ₂ than the size to completely remelted was prepared again A second step of annealing to melt the defects inside and outside the crystal nuclei.