JP2996090B2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JP2996090B2 JP2996090B2 JP6063316A JP6331694A JP2996090B2 JP 2996090 B2 JP2996090 B2 JP 2996090B2 JP 6063316 A JP6063316 A JP 6063316A JP 6331694 A JP6331694 A JP 6331694A JP 2996090 B2 JP2996090 B2 JP 2996090B2
- Authority
- JP
- Japan
- Prior art keywords
- side electrode
- chip
- substrate
- semiconductor device
- bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07531—Techniques
- H10W72/07532—Compression bonding, e.g. thermocompression bonding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07531—Techniques
- H10W72/07532—Compression bonding, e.g. thermocompression bonding
- H10W72/07533—Ultrasonic bonding, e.g. thermosonic bonding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07551—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/59—Bond pads specially adapted therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/931—Shapes of bond pads
- H10W72/932—Plan-view shape, i.e. in top view
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
- H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Wire Bonding (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は、半導体装置に関するも
のであり、特に、高温環境下で使用される半導体装置に
関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device used in a high-temperature environment.
【0002】[0002]
【従来の技術】半導体チップを基台上に実装して、その
半導体チップ上に形成されたチップ側電極と基板上に形
成された回路パターンの基板側電極をボンディングワイ
ヤにて接続する半導体装置において、半導体チップ上に
形成されるチップ側電極には、Al,Au等の材料が用いら
れているが、コスト面または半導体チップ上への薄膜の
作りやすさという面からはAl製の電極が使用される。ま
た、基板上に形成される基板側電極は、Auペーストを用
いて形成されている。このAuペーストは、導電率が優れ
ており、かつ信頼性も高いので、コンピュータ部品回
路、感熱印字ヘッド、各種センサ、サーディプパッケー
ジ等の高品質を要求される製品に使用されている。ボン
ディングワイヤは、Auワイヤが一般的な量産IC、LSI に
多く採用されている。2. Description of the Related Art In a semiconductor device in which a semiconductor chip is mounted on a base and a chip-side electrode formed on the semiconductor chip and a substrate-side electrode of a circuit pattern formed on a substrate are connected by bonding wires. Materials such as Al and Au are used for the chip-side electrodes formed on the semiconductor chip, but Al electrodes are used in terms of cost or ease of forming a thin film on the semiconductor chip. Is done. Further, the substrate-side electrode formed on the substrate is formed using Au paste. Since the Au paste has excellent conductivity and high reliability, it is used for products requiring high quality, such as computer component circuits, thermal printing heads, various sensors, and sardip packages. Au wires are widely used in mass-produced ICs and LSIs, in general, as bonding wires.
【0003】[0003]
【発明が解決しようとする課題】ところが、センサ素子
のセンサチップを例にとると、センサチップのAl電極と
Au製のボンディングワイヤとの接合界面にAl及びAuによ
る金属間化合物が生成され、接合劣化(パープルプレー
グ)が発生するという問題点があった。特に、高温環境
( 150℃以上)に曝されると、金属間化合物の生成が急
激に広がり接合不良が発生してセンサチップ素子として
の動作が不可能となった。However, taking the sensor chip of the sensor element as an example, the Al electrode of the sensor chip is
There is a problem that an intermetallic compound due to Al and Au is generated at a bonding interface with a bonding wire made of Au, and bonding deterioration (purple plague) occurs. In particular, when exposed to a high-temperature environment (150 ° C. or higher), the generation of intermetallic compounds rapidly increased, and bonding failure occurred, making it impossible to operate as a sensor chip element.
【0004】本発明は、上記課題に鑑みなされたもの
で、その目的とするところは、金属間化合物の生成によ
る接合劣化を防止することができ、信頼性の向上が図れ
る半導体装置の構造を提供することにある。SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object of the present invention is to provide a structure of a semiconductor device capable of preventing junction deterioration due to generation of an intermetallic compound and improving reliability. Is to do.
【0005】[0005]
【課題を解決するための手段】上記目的を達成するた
め、請求項1記載の半導体装置は、半導体チップ上に形
成されたチップ側電極と基板上に形成された基板側電極
をボンディングワイヤを介して接続する半導体装置にお
いて、前記チップ側電極をAlで構成し、前記基板側電極
をAuPtで構成すると共に、前記ボンディングワイヤをAl
で構成することを特徴とするものである。According to a first aspect of the present invention, there is provided a semiconductor device comprising: a chip-side electrode formed on a semiconductor chip and a substrate-side electrode formed on a substrate via a bonding wire. In the semiconductor device, the chip-side electrode is made of Al, the substrate-side electrode is made of AuPt, and the bonding wire is made of Al.
It is characterized by comprising.
【0006】また、請求項2記載の半導体装置は、半導
体チップ上に形成されたチップ側電極と基板上に形成さ
れた基板側電極をボンディングワイヤを介して接続する
半導体装置において、前記チップ側電極をAlで構成し、
前記基板側電極をAgPtで構成すると共に、前記ボンディ
ングワイヤをAlで構成することを特徴とするものであ
る。According to a second aspect of the present invention, there is provided a semiconductor device for connecting a chip-side electrode formed on a semiconductor chip to a substrate-side electrode formed on a substrate via a bonding wire. Is composed of Al,
The substrate-side electrode is made of AgPt, and the bonding wire is made of Al.
【0007】[0007]
【作用】請求項1記載の半導体装置では、チップ側電極
をAlで構成すると共に、ボンディングワイヤをAlで構成
したので、半導体チップのチップ側電極(1st パッド
側)の接合部において、金属間化合物が生成されず、経
時的な金属学的変化が発生しない。また、基板側電極
(2nd リード側)の接合部において、ペーストに含有さ
れるPtによりAu中へのAlの拡散が低減されるので金属間
化合物が生成されにくくなる。In the semiconductor device according to the present invention, since the chip-side electrode is made of Al and the bonding wire is made of Al, the intermetallic compound is formed at the junction of the chip-side electrode (1st pad side) of the semiconductor chip. Is not generated, and no metallurgical change over time occurs. In addition, at the joint of the substrate-side electrode (2nd lead side), the diffusion of Al into Au is reduced by Pt contained in the paste, so that intermetallic compounds are less likely to be generated.
【0008】請求項2記載の半導体装置では、チップ側
電極をAlで構成すると共に、ボンディングワイヤをAlで
構成したので、半導体チップのチップ側電極(1st パッ
ド側)の接合部において、金属間化合物が生成されず、
経時的な金属学的変化が発生しない。また、基板側電極
(2nd リード側)の接合部において、ペーストに含有さ
れるPtによりAg中へのAlの拡散が低減されるので金属間
化合物が生成されにくくなる。In the semiconductor device according to the present invention, the chip-side electrode is made of Al and the bonding wire is made of Al. Therefore, the intermetallic compound is formed at the junction of the chip-side electrode (1st pad side) of the semiconductor chip. Is not generated,
No metallurgical changes occur over time. In addition, at the junction of the substrate-side electrode (2nd lead side), the diffusion of Al into Ag is reduced by Pt contained in the paste, so that intermetallic compounds are less likely to be generated.
【0009】[0009]
【実施例】図3に基づいて車載用圧力センサの一実施例
を説明する。図は車載用圧力センサのセンサ部分及び信
号処理回路基板部分を示す分解斜視図である。センサ部
は、中空部1a及び中空部1aの底面に圧力検知孔(図
示省略)を備えた六角ボルト状のボディ1と、中空部1
aの開口を覆う有底円筒状のカバー2と、カバー2の側
面に形成された略U字状の切欠部2aに嵌挿され、セン
サ部分から引き出されるリード線3との間隙を埋めるパ
ッキン4で構成されている。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a vehicle-mounted pressure sensor will be described with reference to FIG. The figure is an exploded perspective view showing a sensor part and a signal processing circuit board part of the on-vehicle pressure sensor. The sensor section includes a hollow portion 1a and a hexagonal bolt-shaped body 1 having a pressure detection hole (not shown) on the bottom surface of the hollow portion 1a;
and a packing 4 which is inserted into a substantially U-shaped notch 2a formed on a side surface of the cover 2 and fills a gap between a lead wire 3 drawn out from a sensor portion. It is composed of
【0010】中空部1aには圧力センサチップ5と、圧
力センサチップ5の実装台となる台座6と、圧力センサ
チップ5とボンディングワイヤ(図示省略)を介して接
続されるセラミック回路基板7が封止される。ボディ1
に台座6を溶接等で接合した後、セラミック回路基板7
に穿設された開口aから圧力センサチップ5が露出する
ようにセラミック回路基板7をボディ3に接着等により
固定する。セラミック回路基板7はリード線3を介して
ケース8に実装される信号処理回路基板9と接続され、
さらに、信号処理回路基板9は車載コンピュータ(図示
省略)に信号線10によって接続されることになる。以
上のように構成された圧力センサのセンサ部分はエンジ
ンルーム内に取り付けられるので、高温環境下での高信
頼性が要求されている。In the hollow portion 1a, a pressure sensor chip 5, a pedestal 6 on which the pressure sensor chip 5 is mounted, and a ceramic circuit board 7 connected to the pressure sensor chip 5 via bonding wires (not shown) are sealed. Is stopped. Body 1
After the pedestal 6 is joined to the ceramic circuit board 7 by welding or the like,
The ceramic circuit board 7 is fixed to the body 3 by bonding or the like so that the pressure sensor chip 5 is exposed from the opening a formed in the body 3. The ceramic circuit board 7 is connected to the signal processing circuit board 9 mounted on the case 8 via the lead wire 3,
Further, the signal processing circuit board 9 is connected to a vehicle-mounted computer (not shown) by a signal line 10. Since the sensor portion of the pressure sensor configured as described above is mounted in the engine room, high reliability in a high-temperature environment is required.
【0011】図1に圧力センサチップ5とセラミック回
路基板7とを接続するワイヤボンディング部分の斜視図
を示す。11はセラミック回路基板7上に形成された基
板側電極、12は圧力センサチップ5上に形成されたチ
ップ側電極、13はボンディングワイヤである。この
時、基板側電極11はAuPtペーストを焼成して形成し、
チップ側電極12をAlで構成しておく。このように構成
した電極間を25〜30μφのAl製のボンディングワイヤ1
3を超音波ワイヤボンディングにより電気的に接続す
る。AuPtペーストとしては、デュポン社製の9596,988
5,9572等が適当である。基板側電極11の材料としてA
gPtペーストを用いることもできる。基板側電極11の
材料をAuPtペーストまたはAgPtペーストとした場合の各
種の信頼性評価試験の結果を次の表1に示す。表1に示
すように、以上に説明した半導体装置は高温下において
も高い信頼性を示している。FIG. 1 is a perspective view of a wire bonding portion for connecting the pressure sensor chip 5 and the ceramic circuit board 7. Reference numeral 11 denotes a substrate-side electrode formed on the ceramic circuit board 7, 12 denotes a chip-side electrode formed on the pressure sensor chip 5, and 13 denotes a bonding wire. At this time, the substrate-side electrode 11 is formed by firing AuPt paste,
The chip-side electrode 12 is made of Al. The bonding wire 1 made of Al having a diameter of 25 to 30 μφ between the electrodes thus configured.
3 is electrically connected by ultrasonic wire bonding. As AuPt paste, 9596,988 manufactured by DuPont
5,9572 etc. are suitable. A as the material of the substrate side electrode 11
gPt paste can also be used. Table 1 shows the results of various reliability evaluation tests when the material of the substrate-side electrode 11 is AuPt paste or AgPt paste. As shown in Table 1, the semiconductor device described above has high reliability even at high temperatures.
【0012】[0012]
【表1】 [Table 1]
【0013】図2は異なる実施例を示した斜視図で、基
板側電極11をAuペーストを焼成して形成し、チップ側
電極12をAuで構成し、25〜30μφのAu製のボンディン
グワイヤ14を超音波併用熱圧着ワイヤボンディングに
より基板側電極11とチップ側電極12間に接合するよ
うに構成してもよい。本実施例は、基板側電極11及び
チップ側電極12及びボンディングワイヤ14を同じ材
料(Au)で構成して、金属間化合物の発生を抑えたが、
材料はAuに限定されるものではなく、Alを用いて基板側
電極11及びチップ側電極12及びボンディングワイヤ
14を構成することもできる。FIG. 2 is a perspective view showing a different embodiment. The substrate side electrode 11 is formed by baking Au paste, the chip side electrode 12 is made of Au, and a bonding wire 14 made of Au having a diameter of 25 to 30 μφ. May be joined between the substrate side electrode 11 and the chip side electrode 12 by thermocompression wire bonding combined with ultrasonic wave. In this embodiment, the substrate-side electrode 11, the chip-side electrode 12, and the bonding wire 14 are formed of the same material (Au) to suppress the generation of intermetallic compounds.
The material is not limited to Au, and the substrate-side electrode 11, the chip-side electrode 12, and the bonding wire 14 can be formed using Al.
【0014】なお、実施例では、基板側電極11は、ペ
ースト状の材料を焼成して形成すると説明したが実施例
に限定されるものではない。In the embodiment, the substrate-side electrode 11 is described as being formed by baking a paste-like material, but the present invention is not limited to the embodiment.
【0015】[0015]
【発明の効果】以上のように、請求項1または請求項2
記載の半導体装置によれば、高温環境下においても金属
間化合物の発生を抑止することができるためワイヤボン
ディング部の接合劣化を防止することができるので信頼
性向上及び長寿命化を図ることができる。As described above, claim 1 or claim 2 is provided.
According to the described semiconductor device, generation of an intermetallic compound can be suppressed even in a high-temperature environment, so that bonding deterioration of a wire bonding portion can be prevented, so that reliability can be improved and life can be extended. .
【図1】本発明に係る半導体装置の一実施例を示す斜視
図である。FIG. 1 is a perspective view showing one embodiment of a semiconductor device according to the present invention.
【図2】本発明に係る半導体装置の異なる実施例を示す
斜視図である。FIG. 2 is a perspective view showing another embodiment of the semiconductor device according to the present invention.
【図3】本発明に係る半導体装置の一実施例を示す斜視
図である。FIG. 3 is a perspective view showing one embodiment of a semiconductor device according to the present invention.
5 圧力センサチップ 7 セラミック回路基板(基板) 11 基板側電極 12 チップ側電極 13 ボンディングワイヤ 5 pressure sensor chip 7 ceramic circuit board (substrate) 11 substrate side electrode 12 chip side electrode 13 bonding wire
Claims (2)
極と基板上に形成された基板側電極をボンディングワイ
ヤを介して接続する半導体装置において、前記チップ側
電極をAlで構成し、前記基板側電極をAuPtで構成すると
共に、前記ボンディングワイヤをAlで構成することを特
徴とする半導体装置。1. A semiconductor device for connecting a chip-side electrode formed on a semiconductor chip and a substrate-side electrode formed on a substrate via a bonding wire, wherein the chip-side electrode is made of Al, A semiconductor device comprising an electrode made of AuPt and the bonding wire made of Al.
極と基板上に形成された基板側電極をボンディングワイ
ヤを介して接続する半導体装置において、前記チップ側
電極をAlで構成し、前記基板側電極をAgPtで構成すると
共に、前記ボンディングワイヤをAlで構成することを特
徴とする半導体装置。2. A semiconductor device for connecting a chip-side electrode formed on a semiconductor chip and a substrate-side electrode formed on a substrate via a bonding wire, wherein the chip-side electrode is made of Al, A semiconductor device, wherein an electrode is made of AgPt and the bonding wire is made of Al.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6063316A JP2996090B2 (en) | 1994-01-31 | 1994-03-31 | Semiconductor device |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1005094 | 1994-01-31 | ||
| JP6-10050 | 1994-01-31 | ||
| JP6063316A JP2996090B2 (en) | 1994-01-31 | 1994-03-31 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH07254625A JPH07254625A (en) | 1995-10-03 |
| JP2996090B2 true JP2996090B2 (en) | 1999-12-27 |
Family
ID=26345221
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6063316A Expired - Fee Related JP2996090B2 (en) | 1994-01-31 | 1994-03-31 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2996090B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6520663B2 (en) * | 2015-11-27 | 2019-05-29 | 日亜化学工業株式会社 | Element mounting substrate and light emitting device |
-
1994
- 1994-03-31 JP JP6063316A patent/JP2996090B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH07254625A (en) | 1995-10-03 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |