JP2996712B2 - Semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device, for example, a sensor, a TF
The present invention relates to a highly reliable semiconductor device applied to an image sensor having T or the like, a liquid crystal display, and the like.

[Conventional technology]

Conventionally, in semiconductor devices typified by long sensors using amorphous silicon, it is necessary to keep the wiring as low as possible in order to suppress output variations.For example, materials such as Al and Al alloys are allowed. The wiring width has been widened within the range and used. In order to suppress crosstalk between the upper and lower wiring and to prevent disconnection due to poor coverage in the wiring direction of the wiring,
The amorphous semiconductor layer common to the TFT and the photoelectric conversion unit is left.

FIG. 4 is a sectional view of a wiring portion of the semiconductor device according to the conventional example. In FIG. 4, for example, after patterning a gate electrode on a transparent insulating substrate (101) such as glass,
A gate insulating film (102) such as an amorphous SiN: H film, a semiconductor layer (103) made of amorphous silicon, an impurity semiconductor layer (104) doped with phosphorus or the like are sequentially deposited, and an Al or Al alloy wiring (105) is deposited. , After pattern formation
The semiconductor layer (10
3) The gate insulating layer (102) is left, and the protective layer (106) deposited on the gate insulating layer (102) is improved in coverage. Finally, a transparent insulating layer such as glass (10
8) The adhesive was formed. In such a conventional semiconductor device, in order to ensure the reliability of the wiring, a structure and a process that do not particularly form a hole such as a crack in the protective layer (106) are required.

[Problems to be solved by the invention]

However, in the above structure, unnecessary hillocks are generated due to the heat history of the post-process, and the protective layer is cracked from the protrusion,
There is a problem in reliability that impurities such as water and ions invade and corrode the wiring. It has been found that this hillock occurs more frequently at a heat history of 200 ° C. or higher as the wiring width is wider, and is particularly emphasized on amorphous silicon. Therefore, as long as the present structure as shown in FIG. 4 is employed, the occurrence of hillocks is further promoted as described above, and the problem of reliability cannot be avoided.

In view of the above, in the present invention, a semiconductor having a wiring structure that improves the reliability by suppressing the occurrence of hillocks in the wiring that must be on amorphous silicon while maintaining good coverage of the protective layer with respect to the above problem. It is intended to provide a device.

[Means to solve the problem (and action)]

The present invention provides a semiconductor layer made of amorphous silicon deposited on an insulating substrate, and a line width of at least twice the minimum line width made of aluminum or an aluminum alloy provided on the semiconductor layer via an impurity semiconductor layer. In a semiconductor device having a required wiring and a protective layer covering the wiring, the wiring is divided into a plurality of parallel-arranged portions having a width smaller than the line width, and the semiconductor layer By using a common layer for the parts arranged in parallel to each other, it is possible to improve the reliability of wiring by suppressing wiring hillocks while maintaining good coverage of the protective layer deposited on the wiring are doing.

Preferably, the end of the semiconductor layer made of amorphous silicon is set to extend to the outside of the end of the wiring.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a cross section of an A1 or A1 alloy wiring portion, and FIG. 2 is a cross-sectional view taken along line AA of FIG.
In the figure, 101 is, for example, the product name “Corning 705
Transparent insulating substrate such as 9 '', 102 is a gate insulating film, 103
Denotes a semiconductor layer, 104 denotes an impurity semiconductor layer, 105 denotes a wiring, 106 denotes a protective layer for the wiring 105, 107 denotes an adhesive layer made of an organic adhesive, and 108 denotes a wear-resistant layer such as glass. Gate insulating film 10
2. The semiconductor layer 103 and the impurity semiconductor layer 104 are each made of amorphous silicon. The amorphous silicon semiconductor layer 103 supports the aluminum wiring, and also functions as a current path together with the impurity semiconductor layer 104, thereby improving reliability against disconnection.

The wiring 105 is made of A1 or an A1 alloy, and has a structure in which a wiring requiring a width twice or more the minimum line width rule is divided into a plurality of portions. That is, the wiring 105 is different from a known comb-shaped electrode having a groove on the surface. The semiconductor layer 103 and the insulating film 102 located below the wiring 105 extend outside the end of the wiring 105.

The steps of manufacturing a semiconductor device having such a wiring structure will be described with reference to FIGS. 3 (a) to 3 (c). First, after forming a gate electrode pattern made of A1 / Cr on the cleaned insulating substrate 101, a gate insulating film 102 such as an amorphous SiN: H film, an amorphous silicon semiconductor layer 103, and an ohmic An impurity semiconductor layer 104 for contact is sequentially deposited, and a contact hole is formed by dry etching. Then, an upper electrode 105 made of A1 or an A1 alloy or the like is formed by DC sputtering.
(FIG. 3A). The gate electrode is not shown because no contact hole exists at the cross-sectional position in FIG.

Next, after the upper electrode 105 is patterned by a wet process, the TFT and the impurity semiconductor in the sensor gap for photoelectric conversion are removed by dry etching using the same resist pattern (FIG. 3B). At this time, the impurity semiconductor layer between the wirings is also removed at the same time. Thereafter, in the element isolation step, the lower amorphous silicon semiconductor layer 103 and the gate insulating film 102 are removed by dry etching so as to remain outside the wiring ends (FIG. 3C).

Finally, after annealing at 200 ° C., a protective layer 106 made of an insulator such as an amorphous SiN: H film is deposited using an RF glow discharge method, and an adhesive layer 1 such as an epoxy resin is
The wear-resistant layer 108, which is the uppermost layer, is bonded through the layer 07 to complete the semiconductor device as shown in FIGS. 1 and 2. In this semiconductor device, a photoelectric conversion unit, a TFT unit, and a capacitor unit are each configured as a line sensor including common layers 102, 103, and 104 made of amorphous silicon.

In the semiconductor device having such a configuration, when the protective layer 106 made of glass is provided in the final step of the manufacturing process, the end of the lead wire near the wire pad (the reference numeral C in FIG. 2).
), The abrasion-resistant layer 108 forms a protrusion, and when affixed with an adhesive, is easily broken by hillocks generated by annealing.
There is a problem that the wiring is corroded due to the mixing of impurities from the adhesive, but in the present invention, good coverage can be maintained only by changing the mask, so that the projection is not destroyed.

〔The invention's effect〕

As described above, in the semiconductor device of the present invention, while maintaining good coverage of the protective layer provided on the wiring,
Since unnecessary projections of hillocks can be eliminated, it is possible to prevent a problem that the projections of the protective layer are destroyed by the impact of a later process, thereby improving the reliability of wiring.

[Brief description of the drawings]

FIG. 1 is a sectional view of a part of a semiconductor device according to an embodiment of the present invention, FIG. 3 is a sectional view taken along line AA of FIG.
1A to 1C are explanatory views showing steps of manufacturing the semiconductor device shown in FIGS. 1 and 2, and FIG. 4 is a cross-sectional view of a part of a conventional semiconductor device. 101 ... insulating substrate, 102 ... gate insulating film, 103 ... semiconductor layer, 104 ... impurity semiconductor layer, 105 ... wiring, 106 ...
Protective layer, 107: adhesive layer, 108: wear-resistant layer.

Claims (2)

(57) [Claims] 1. A semiconductor layer made of amorphous silicon deposited on an insulating substrate, and a line width not less than twice a minimum line width made of aluminum or an aluminum alloy provided on said semiconductor layer via an impurity semiconductor layer. And a protective layer covering the wiring, wherein the wiring is divided into a plurality of parallel-arranged portions having a width smaller than the line width. A semiconductor device, which is a layer common to a plurality of portions arranged in parallel. 2. The semiconductor device according to claim 1, wherein an end of said semiconductor layer made of amorphous silicon extends to an outside of an end of said wiring.