JP3011502B2 - Hybrid integrated circuit - Google Patents
Hybrid integrated circuitInfo
- Publication number
- JP3011502B2 JP3011502B2 JP3272647A JP27264791A JP3011502B2 JP 3011502 B2 JP3011502 B2 JP 3011502B2 JP 3272647 A JP3272647 A JP 3272647A JP 27264791 A JP27264791 A JP 27264791A JP 3011502 B2 JP3011502 B2 JP 3011502B2
- Authority
- JP
- Japan
- Prior art keywords
- power
- circuit
- conductive path
- heat sink
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07551—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
- H10W72/07552—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting changes in structures or sizes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/521—Structures or relative sizes of bond wires
- H10W72/527—Multiple bond wires having different sizes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は混成集積回路、特にパワ
ー部と小信号部とを集積化したパワーモノICを搭載し
た混成集積回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit, and more particularly to a hybrid integrated circuit having a power mono IC in which a power section and a small signal section are integrated.
【0002】[0002]
【従来の技術】従来、パワー系の半導体素子を搭載した
混成集積回路は図3に示す如く、セラミックスあるいは
表面を陽極酸化したアルミニウム等の絶縁基板(11)
と、前記基板(11)上に任意の形状に設けられた導電
路(12)と、前記導電路(12)上に半田付けされた
ヒートシンク(13)とそのヒートシンク(13)上に
固着されたパワートランジスタ等のパワー系の素子(1
4)と、そのパワー素子(14)と周辺の導電路(1
2)とを接続するボンディングワイヤ線(15)とで構
成され、所望出力の混成集積回路が実現されている。2. Description of the Related Art Conventionally, as shown in FIG. 3, a hybrid integrated circuit on which a power semiconductor element is mounted is an insulating substrate (11) made of ceramics or aluminum whose surface is anodized.
A conductive path (12) provided in an arbitrary shape on the substrate (11), a heat sink (13) soldered on the conductive path (12), and fixed on the heat sink (13). Power devices such as power transistors (1
4) and its power element (14) and its surrounding conductive path (1).
2) and a bonding wire line (15) for connection, and a hybrid integrated circuit having a desired output is realized.
【0003】このような混成集積回路のヒートシンク上
に搭載されるパワー素子は、パワー段のみを構成する回
路が集積化されており、そのパワー素子を駆動させるド
ライバー用の小信号系の駆動用の回路素子は図3では示
されてないがパワー素子の近傍の導電路上に接続され両
者が接続される。In a power element mounted on a heat sink of such a hybrid integrated circuit, a circuit constituting only a power stage is integrated, and a small signal system for driving a driver for driving the power element is used. Although not shown in FIG. 3, the circuit elements are connected on a conductive path near the power element, and both are connected.
【0004】[0004]
【発明が解決しようとする課題】従って、従来の混成集
積回路ではパワー素子とそのパワー素子を駆動させる小
信号素子とが夫々別に搭載されているため約10A以上
の大出力を有するパワー用の混成集積回路が実現でき
る。最近、パワー部とそのパワー部を駆動させる小信号
部とが1チップ化された(例えば高耐圧用のMOSFE
T等)LSI素子が出現している。かかる素子のパワー
出力は前述した従来の混成集積回路の如き、大出力では
なく約1〜10A位の大きさの出力である。Therefore, in a conventional hybrid integrated circuit, a power element and a small signal element for driving the power element are separately mounted, so that a power hybrid having a large output of about 10 A or more is used. An integrated circuit can be realized. Recently, a power section and a small signal section for driving the power section have been integrated into one chip (for example, a MOSFE for high breakdown voltage).
T etc.) LSI elements have appeared. The power output of such a device is not a large output as in the conventional hybrid integrated circuit described above, but an output of about 1 to 10 A.
【0005】しかしながら、放熱性を考慮するとヒート
シンクの厚みは最低でも2.5〜3mm位の厚みが必要
であり、パワー部の電極と導電路とを接続する約200
μ径の太いAlワイヤ線はボンディング接続できるもの
の、小信号部の電極と導電路とを接続する約40μ径の
細いAlワイヤ線はボンディング接続が行えず、パワー
部と小信号部とを備えた、いわゆるパワーモノICを従
来の混成集積回路では実装することができなかった。However, in consideration of heat radiation, the thickness of the heat sink needs to be at least about 2.5 to 3 mm, and the thickness of the heat sink is about 200 to connect the electrode of the power section and the conductive path.
Although a thick Al wire having a diameter of μ can be connected by bonding, a thin Al wire having a diameter of about 40 μ connecting an electrode of a small signal portion and a conductive path cannot be connected by bonding, and has a power portion and a small signal portion. That is, a so-called power mono IC cannot be mounted on a conventional hybrid integrated circuit.
【0006】[0006]
【課題を解決するための手段】本発明は上述した課題に
鑑みて為されたものであり、この発明に係わる混成集積
回路は、良熱伝導性の良好な混成集積回路基板と、前記
基板上に形成された導電路の所定位置に固着されたヒー
トシンクと、前記ヒートシンク上に固着され且つ近傍の
導電路とワイヤ線に接続されたパワー回路部とそのパワ
ー回路部を駆動させる小信号系回路とが1チップ化され
たパワー半導体素子とを具備し、前記パワー半導体素子
の小信号回路用の比較的細いワイヤ線のみが、前記ヒー
トシンクを囲む周辺部に配置された中継部材を介して導
電路と接続されたことを特徴とする。SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and a hybrid integrated circuit according to the present invention includes a hybrid integrated circuit board having good thermal conductivity and A heat sink fixed to a predetermined position of the conductive path formed on the heat sink, a power circuit part fixed on the heat sink and connected to the nearby conductive path and wire wire, and a small signal circuit for driving the power circuit part; And a power semiconductor element integrated into a single chip, and only a relatively thin wire for a small signal circuit of the power semiconductor element is connected to a conductive path via a relay member disposed around the heat sink. It is characterized by being connected.
【0007】また、この発明に係わる混成集積回路は、
良熱伝導性の良好な混成集積回路基板と、前記基板上に
形成された導電路の所定位置に固着されたヒートシンク
と、前記ヒートシンク上に固着され且つ近傍の導電路と
ワイヤ線に接続されたパワー回路部とそのパワー回路部
を駆動させる小信号系回路とが1チップ化されたパワー
半導体素子とを具備し、前記パワー半導体素子の小信号
回路用の比較的細いワイヤ線のみが、前記ヒートシンク
を囲む周辺に配置され且つ上面及び底面に電極が形成さ
れた表面実装型の中継部材を介して導電路と接続され、
パワー回路部用の比較的太いワイヤ線が直接前記導電路
に接続されたことを特徴とする。Further, a hybrid integrated circuit according to the present invention comprises:
A hybrid integrated circuit board having good thermal conductivity, a heat sink fixed to a predetermined position of a conductive path formed on the substrate, and a conductive path fixed to the heat sink and connected to a nearby conductive path and wire line A power semiconductor element in which a power circuit section and a small signal system circuit for driving the power circuit section are integrated into one chip; Is connected to the conductive path via a surface-mount type relay member arranged around the surroundings and having electrodes formed on the top and bottom surfaces,
A relatively thick wire for a power circuit is directly connected to the conductive path.
【0008】[0008]
【作用】以上のように構成される混成集積回路において
は、ヒートシンクを囲む周辺に表面実装型の中継部材を
設けているために、従来の構造では実装不可能であっ
た、パワー回路部とそのパワー回路部を駆動させる小信
号系回路とが1チップ化されたパワーモノ型のパワー半
導体素子を固着実装することができる。即ち、細線(約
30μ〜40μ)と太線(約200μ〜300μ)との
ボンディングワイヤ接続を必要とするパワー半導体素子
をヒートシンク上に固着実装することができる。In the hybrid integrated circuit constructed as described above, since the surface mounting type relay member is provided around the heat sink, the power circuit portion and the power circuit portion which cannot be mounted by the conventional structure are provided. A power mono type power semiconductor element in which a small signal circuit for driving the power circuit unit and a small signal circuit are integrated into one chip can be fixedly mounted. That is, a power semiconductor element that requires bonding wire connection between a thin wire (about 30 μm to 40 μm) and a thick wire (about 200 μm to 300 μm) can be fixedly mounted on a heat sink.
【0009】[0009]
【実施例】以下に図1及び図2に示した実施例に基づい
て本発明を説明する。図1は本発明の混成集積回路の要
部拡大断面図であり、(1)は混成集積回路基板、
(2)は絶縁樹脂層、(3)は導電路、(4)はヒート
シンク、(5)はパワー半導体素子、(6)は中継部
材、(7)はワイヤ線である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the embodiments shown in FIGS. FIG. 1 is an enlarged sectional view of a main part of a hybrid integrated circuit according to the present invention.
(2) is an insulating resin layer, (3) is a conductive path, (4) is a heat sink, (5) is a power semiconductor element, (6) is a relay member, and (7) is a wire.
【0010】混成集積回路基板(1)は良熱伝導性に優
れたアルミニウム基板が用いられ、その表面は周知技術
である陽極酸化法により、酸化アルミニウム膜が形成さ
れている。基板(1)上にはエポキシ樹脂等の絶縁樹脂
層(2)を介して、銅箔あるいは金属メッキ等の手段に
より所望形状の導電路(3)が形成されている。導電路
(3)上の所定位置には、図示されないがトランジス
タ、チップ抵抗、チップコンデンサー等の複数の回路素
子が固着実装されている。一方、パワー系の回路素子は
ヒートシンク(4)を介してし実装される。As the hybrid integrated circuit substrate (1), an aluminum substrate having excellent heat conductivity is used, and an aluminum oxide film is formed on the surface of the substrate by an anodic oxidation method which is a well-known technique. A conductive path (3) having a desired shape is formed on the substrate (1) by means such as copper foil or metal plating via an insulating resin layer (2) such as an epoxy resin. At a predetermined position on the conductive path (3), a plurality of circuit elements such as transistors, chip resistors, and chip capacitors are fixedly mounted, though not shown. On the other hand, power circuit elements are mounted via a heat sink (4).
【0011】本実施例で使用されるパワー半導体素子
(5)はパワートランジスタの如き、パワー回路のみが
形成されるものではなく、パワー回路部とそのパワー回
路部を駆動させる小信号系回路とが1チップ化された、
例えば高耐圧用MOSFET等のパワーモノICが使用
される。かかる素子(5)を基板(1)上の導電路
(3)と接続する場合二種類のワイヤ線(7)を必要と
する。即ち、パワー回路部領域に形成された電極は約2
00μ〜500μ径の比較的太いAlワイヤ線(7A)
が用いられて接続され、小信号回路領域に形成された電
極は約20μ〜50μ径の比較的細いAl等のワイヤ線
(7B)が用いられて接続される。The power semiconductor element (5) used in the present embodiment is not one in which only a power circuit is formed, such as a power transistor, but includes a power circuit section and a small signal circuit for driving the power circuit section. One chip,
For example, a power mono IC such as a high breakdown voltage MOSFET is used. When such an element (5) is connected to the conductive path (3) on the substrate (1), two types of wire lines (7) are required. That is, about 2 electrodes are formed in the power circuit area.
A relatively thick Al wire with a diameter of 00μ to 500μ (7A)
The electrodes formed in the small signal circuit area are connected using a relatively thin wire (7B) of Al or the like having a diameter of about 20 to 50 μm.
【0012】一方、ヒートシンク(4)は銅等の材質が
用いられ、パワー半導体素子(5)の熱放散を考慮する
とヒートシンク(4)の肉厚は約2.5mm〜3.5m
m位必要である。ヒートシンク(4)はパワー半導体素
子(5)と略同一の大きさに形成され、ヒートシンク
(4)上に素子(5)が半田等のろう材により固着され
る。On the other hand, the heat sink (4) is made of a material such as copper, and the thickness of the heat sink (4) is about 2.5 mm to 3.5 m in consideration of heat dissipation of the power semiconductor element (5).
m is required. The heat sink (4) is formed to have substantially the same size as the power semiconductor element (5), and the element (5) is fixed on the heat sink (4) with a brazing material such as solder.
【0013】本発明の特徴とするところは、パワー半導
体素子(5)が固着されたヒートシンク(4)を囲む周
辺に中継部材(6)を配置し、小信号系回路用の細いA
l等のワイヤ線(7B)を中継部材(6)を介して導電
路(3)に接続するところにある。中継部材(6)はエ
ポキシ等の絶縁樹脂あるいはセラミックス等の絶縁材料
により形成される。本実施例で用いられる中継部材
(6)は枠状に形成することでヒートシンク(4)を囲
むが、I型あるいはL型に形成してヒートシンク(4)
を囲むことも可能である。A feature of the present invention is that a relay member (6) is arranged around a heat sink (4) to which a power semiconductor element (5) is fixed, and a thin A for a small signal system circuit is provided.
1 is connected to the conductive path (3) via the relay member (6). The relay member (6) is formed of an insulating resin such as epoxy or an insulating material such as ceramics. The relay member (6) used in the present embodiment is formed in a frame shape and surrounds the heat sink (4).
Can also be enclosed.
【0014】中継部材(6)の上面及び底には電極が形
成されている。即ち、中継部材(6)の側面には導電路
(3)とパワー半導体素子(5)の小信号回路の電極と
を接続するための導体(6X)が形成されている。かか
る導体(6X)は銅等のメッキあるいはエッチング、若
しくは金属製のリード端子を加工して中継部材(6)と
一体化することでも形成することができる。Electrodes are formed on the top and bottom of the relay member (6). That is, the conductor (6X) for connecting the conductive path (3) and the electrode of the small signal circuit of the power semiconductor element (5) is formed on the side surface of the relay member (6). Such a conductor (6X) can also be formed by plating or etching copper or the like, or by processing a metal lead terminal and integrating it with the relay member (6).
【0015】中継部材(6)は前述したようにヒートシ
ンク(4)を囲むようにヒートシンク(4)の周辺に延
在された導電路(3)上に底面電極(6B)が半田付さ
れる。このとき、中継部材(6)とパワー半導体素子
(5)との段差を細いAl等のワイヤ線(7B)をボン
ディング可能とするために約1mm程度に保つ必要性か
ら、中継部材(6)の肉厚は約0.4mm〜1.4mm
程度の高さにする必要性がある。As described above, the bottom electrode (6B) of the relay member (6) is soldered on the conductive path (3) extending around the heat sink (4) so as to surround the heat sink (4). At this time, it is necessary to keep the step between the relay member (6) and the power semiconductor element (5) at about 1 mm in order to enable bonding of a thin wire (7B) made of Al or the like. The wall thickness is about 0.4mm to 1.4mm
It needs to be about as high.
【0016】基板(1)上にパワー半導体素子(5)が
実装されたヒートシンク(4)及び中継部材(6)を半
田等のろう材で固着実装した後、パワー半導体素子
(5)の小信号系回路領域に形成された電極と中継部材
(6)の上面電極(6A)とが細いAl等のワイヤ線
(7B)により接続される。パワー半導体素子(5)の
パワー回路領域に形成された例えばベース、エミッタ電
極と基板(1)上の導電路(3)が太いAlワイヤ線
(7A)により接続される。After the heat sink (4) having the power semiconductor element (5) mounted on the substrate (1) and the relay member (6) are fixedly mounted with a brazing material such as solder, a small signal of the power semiconductor element (5) is formed. The electrode formed in the system circuit area and the upper electrode (6A) of the relay member (6) are connected by a thin wire (7B) of Al or the like. For example, the base and emitter electrodes formed in the power circuit region of the power semiconductor element (5) and the conductive path (3) on the substrate (1) are connected by a thick Al wire (7A).
【0017】パワー半導体素子(5)と周辺の導電路
(3)とを接続した後、パワー半導体素子(5)及びワ
イヤ線(7)は図示されないがエポキシ樹脂等の封止樹
脂層によって封止される。After connecting the power semiconductor element (5) and the peripheral conductive path (3), the power semiconductor element (5) and the wire (7) are sealed with a sealing resin layer such as an epoxy resin (not shown). Is done.
【0018】[0018]
【考案の効果】以上に詳述した如く、本発明に依れば、
ヒートシンク上を囲む周辺に中継部材を配置することに
より、パワー回路部とそのパワー回路部を駆動させる小
信号回路とが1チップ化された、いわゆるパワーモノ型
のパワー半導体素子の実装が可能となる。As described in detail above, according to the present invention,
By arranging the relay member around the heat sink, it is possible to mount a so-called power mono type power semiconductor element in which the power circuit section and a small signal circuit for driving the power circuit section are integrated into one chip. .
【0019】また、表面実装型の中継部材を用いている
ことにより、基板実装密度をあまり低下させることな
く、パワーモノ型のパワー半導体素子の実装が可能とな
る。Further, the use of the surface-mount type relay member makes it possible to mount a power mono type power semiconductor element without significantly lowering the board mounting density.
【図1】図1は本発明の実施例を示す要部拡大断面図で
ある。FIG. 1 is an enlarged sectional view of a main part showing an embodiment of the present invention.
【図2】図2は図1の平面図である。FIG. 2 is a plan view of FIG. 1;
【図3】図3は従来の混成集積回路を示す断面図であ
る。FIG. 3 is a sectional view showing a conventional hybrid integrated circuit.
(1) 混成集積回路基板 (2) 絶縁樹脂層 (3) 導電路 (4) ヒートシンク (5) パワー半導体素子 (6) 中継部材 (7) ワイヤ線 (1) Hybrid integrated circuit board (2) Insulating resin layer (3) Conductive path (4) Heat sink (5) Power semiconductor element (6) Relay member (7) Wire wire
Claims (2)
と、前記基板上に形成された導電路の所定位置に固着さ
れたヒートシンクと、前記ヒートシンク上に固着され且
つ近傍の導電路とワイヤ線に接続されたパワー回路部と
そのパワー回路部を駆動させる小信号系回路とが1チッ
プ化されたパワー半導体素子とを具備し、 前記パワー半導体素子の小信号系回路用の比較的細いワ
イヤ線のみが、前記ヒートシンクを囲む周辺部に配置さ
れ、前記パワー半導体素子との段差が所定範囲内となる
ように形成された中継部材を介して導電路と接続された
ことを特徴とする混成集積回路。1. A hybrid integrated circuit board having good thermal conductivity, a heat sink fixed to a predetermined position of a conductive path formed on the substrate, and a conductive path and a wire fixed on and adjacent to the heat sink. A power semiconductor element in which a power circuit unit connected to the line and a small signal system circuit for driving the power circuit unit are integrated into one chip; a relatively thin wire for the small signal system circuit of the power semiconductor element; Only the line is arranged in the peripheral portion surrounding the heat sink, and the step with the power semiconductor element is within a predetermined range.
The hybrid integrated circuit is connected to the conductive path via the relay member formed as described above .
と、前記基板上に形成された導電路の所定位置に固着さ
れたヒートシンクと、前記ヒートシンク上に固着され且
つ近傍の導電路とワイヤ線に接続されたパワー回路部と
そのパワー回路を駆動させる小信号系回路とが1チップ
化されたパワー半導体素子とを具備し、 前記パワー半導体素子の小信号系回路用の比較的細いワ
イヤ線のみが、前記ヒートシンクを囲む周辺部に配置さ
れ、前記パワー半導体素子との段差が所定範囲内となる
ように形成された中継部材を介して導電路と接続され、
パワー回路部用の比較的太いワイヤ線が直接導電路に接
続されたことを特徴とする混成集積回路。2. A hybrid integrated circuit board having good thermal conductivity, a heat sink fixed to a predetermined position of a conductive path formed on the substrate, and a conductive path and a wire fixed on and adjacent to the heat sink. A power semiconductor element in which a power circuit portion connected to the power circuit and a small-signal circuit for driving the power circuit are integrated into one chip; a relatively thin wire line for the small-signal circuit of the power semiconductor element; Only is disposed in a peripheral portion surrounding the heat sink, and a step from the power semiconductor element is within a predetermined range.
Is connected to the conductive path via a relay member formed as
A hybrid integrated circuit, wherein a relatively thick wire for a power circuit is directly connected to a conductive path.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3272647A JP3011502B2 (en) | 1991-10-21 | 1991-10-21 | Hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3272647A JP3011502B2 (en) | 1991-10-21 | 1991-10-21 | Hybrid integrated circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05109941A JPH05109941A (en) | 1993-04-30 |
| JP3011502B2 true JP3011502B2 (en) | 2000-02-21 |
Family
ID=17516841
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3272647A Expired - Fee Related JP3011502B2 (en) | 1991-10-21 | 1991-10-21 | Hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3011502B2 (en) |
-
1991
- 1991-10-21 JP JP3272647A patent/JP3011502B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH05109941A (en) | 1993-04-30 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |