JP3033629B2 - Alarm processing circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to an alarm processing circuit, and more particularly to an ATM processing circuit.
(Asynchronous Transfer Mode) The present invention relates to an alarm processing circuit in communication.

[0002]

2. Description of the Related Art With the practical use of ATM communication, it has been desired to develop a circuit for performing alarm processing such as detection and release of an alarm in an ATM. Here, the well-known SDH (Synchronous Digi
Although it is conceivable to apply various alarm processing methods used for communication as they are, it is not possible to apply ATM and SDH because the transmission methods are completely different.

[0003]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional disadvantages, and an object of the present invention is to provide an alarm processing circuit suitable for use in ATM communication.

[0004]

An alarm processing circuit according to the present invention is an alarm processing circuit in ATM communication, comprising: a cell type determining circuit for determining a cell type according to information in an ATM cell; and a virtual path in the ATM cell. a search address specific information, and status management table that holds the state of each virtual path, in response to the state information of the retrieved said state management table by said a cell type by the cell type determination circuit virtual path identification information Perform fault detection ,
One, the and means for rewriting the contents of the state management table corresponding to the virtual path, characterized in that to perform the failure recovery processing according to the contents of the state management table. Further, another alarm processing circuit according to the present invention includes:
An alarm processing circuit in ATM communication, comprising: a cell type determination circuit for determining a cell type according to information in an ATM cell; and a virtual path identification information in the ATM cell as a search address, and a state of each virtual path. A state management table to be held, and means for rewriting the contents of the state management table corresponding to the virtual path to an alarm release state when an alarm cell is not detected for a predetermined period by the cell type determination circuit; Characterized in that a failure recovery process is performed in accordance with the contents of (1).

[0005]

Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of an alarm processing circuit according to the present invention. In the figure, an alarm processing circuit according to one embodiment of the present invention includes a latch circuit 1 for temporarily holding information in an ATM cell, and a cell type for determining a cell type based on the information held in the latch circuit 1. A judgment circuit 2; a VP state management table 4 for storing the state of each VP (Virtual Path);
And a detection cancellation processing unit 3 that performs alarm processing such as detection and cancellation of an alarm by rewriting.

In such a configuration, all ATM cells flowing in the signal S1 are input to the latch circuit 1, and the latch circuit 1 supplies a VPI (Virtual Path Identifier), VCI
(Virtual Channel Identifier) and OAM (Operatin
g Administration Monitoring) type information is retained. The held VPI is sent to the VP status management table 4 as an address signal S4, and becomes the VP specific information and the search address of the table. Also, VP
The information of the I, VCI, and OAM types is sent to the cell type determination circuit 2 as a signal S2.

Here, one cell is generally 53 bytes, of which 5 bytes are a header and the remaining 48 bytes are a data portion. Since the VPI and VCI are included in the header, it can be determined from this that the cell is an OAM cell. That is, according to the information held in the latch circuit 1, it is determined whether the cell is a cell transferring user data, an empty cell not transferring any information, or an OAM cell. The determination can be made by the type determination circuit 2. Further, the OAM type can be determined by looking at the data portion, and it can be determined whether or not the cell is an alarm cell.

On the other hand, upon receiving the address signal S4, the VP state management table 4 sends out data in its own table corresponding to the input address to the detection cancellation processing unit 3 as a signal S5. Based on the information S3 from the cell type determination circuit 2 and the signal S5 from the VP state management table 4, the detection cancellation processing unit 3 performs alarm detection or cancellation processing on the VP currently being processed. The new VP state information S6 determined as a result of this processing is written to the VP state management table 4. The above operation is performed for all cells. In addition,
An external circuit (not shown) performs a failure recovery process according to the contents of the VP state management table 4.

The VP state management table 4 can be realized by a known memory element or the like. For example, as shown in FIG. 2, the VP state management table 4 may be configured to associate VPI as an address with VP state data. . According to this table, alarm processing can be individually performed for 4096 types of VPIs. As the VP status data, in this example, an alarm status display,
There are three types of information: protection status indication and alarm cell reception indication. These will be described later.

Next, a procedure for rewriting the VP status management table 4 in the detection cancellation processing section 3 will be described with reference to FIG. FIG. 3 is a flowchart illustrating an example of a procedure for rewriting the VP state management table.

In this processing procedure, the protection status display is set to "2". This is to determine that a mere bit error is an alarm state so that the alarm state display in the table is not erroneously rewritten.

As a premise, a cell type is determined (step 30). As a result of the determination, if it is determined that the cell is an alarm cell, the detection cancellation processing unit 3 determines the current alarm state display value in order to set an alarm detection state due to the occurrence of a failure in the device (steps 30 to 37). . And
If the alarm status display is "0", that is, if there is no alarm status,
This time, the value of the current protection status display is determined (step 3
7 → 38).

As a result, if the protection status display is "0", the protection status display is rewritten to "1" and the process is terminated (steps 38 → 39). On the other hand, the protection status display is “1”
If so, the alarm status display is rewritten to "1" (alarm detection) and the protection status display is rewritten to "0", and the process is terminated (steps 38 to 40).

If the alarm state display is "1", that is, if the alarm state is already set, the value of the current protection state display is determined (steps 37 to 41).

As a result, if the protection status display is "1", the protection status display is rewritten to "0" and the process is terminated (steps 41 to 42). If the protection status display is “0”, the process is terminated.

As a result of the cell type determination, if it is determined that the cell is a user cell, it is determined that the fault has been recovered, and the alarm is released. Therefore, first, the detection release processing unit 3 determines the current value of the alarm state display. (Steps 30 → 31). Then, if the alarm status display is "1", that is, if the alarm status has already been set, the value of the current protection status display is determined (steps 31 → 35).

As a result, if the protection status display is "0", the protection status display is rewritten to "1" and the process is terminated (steps 35 → 34). On the other hand, the protection status display is “1”
If so, the alarm status display is rewritten to "0" (alarm release) and the protection status display is rewritten to "0", respectively, and the process is terminated (steps 35 to 36).

If the alarm status display is "0", that is, if there is no alarm status, the value of the current protection status display is determined (steps 31 → 32).

As a result, if the protection status display is "1", the protection status display is rewritten to "0" and the process is terminated (steps 32 → 33). If the protection status display is “0”, the process is terminated.

According to the above operation procedure, the alarm status display changes to "1" after the protection status display changes to "1".
Also, since the protection status display changes to "0" after the alarm status display changes to "0", the alarm detection state is not easily set, and once the alarm detection state is set, the alarm reset state is not easily set. It is.

By the way, as a result of the cell type determination (step 30), when it is determined that the cell is an empty cell,
The process ends as it is. Therefore, in the alarm detection state, if a user cell is not detected for a long time and empty cells are continuously detected, according to the above-described operation procedure, even if a fault is recovered during that time and the alarm cell is no longer detected, an alarm is generated. It remains in the detection state.

Therefore, in the present embodiment, the detection release processing unit 3 performs the operation of FIG. 4 in parallel in addition to the operation of FIG. The operation of FIG. 4 automatically cancels the alarm detection state when an alarm cell or a user cell is not detected for a certain period and empty cells are continuously detected.

In FIG. 4, first, the VPI is input to the VP state management table, and the detection release processing section 3 reads out data (step 51). As a result, if the alarm status display is "1", that is, the alarm is detected, and the alarm cell reception display is "0", that is, the alarm cell is not received (steps 52 → 53 → 55), the alarm status is displayed. Rewrite the display to "0" (alarm release). If the alarm status display is "1" and the alarm cell reception display is "1" (steps 52 → 53 → 54), the alarm cell reception display is rewritten to “0”. Furthermore, the alarm status display is "0"
If so (step 52), the process is terminated.

As described above, even if an alarm cell is not detected for a certain period (for example, what should be detected every one second is not detected for three seconds), the alarm is automatically canceled.

[0026]

As described above, the present invention has an effect that effective alarm processing can be performed for each VP by judging the type of cell and rewriting the state management table according to the contents of the cell. . Also, by rewriting the state management table to the alarm canceling state when the alarm cell is not detected for a certain period, the alarm can be automatically canceled early even when only an empty cell is detected for a long time.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an alarm processing circuit according to an embodiment of the present invention.

FIG. 2 is a conceptual diagram illustrating an example of a state management table.

FIG. 3 is a flowchart illustrating an example of an operation of rewriting a state management table.

FIG. 4 is a flowchart illustrating an operation for automatically canceling an alarm.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Latch circuit 2 Cell type determination circuit 3 Detection cancellation processing part 4 VP state management table

──────────────────────────────────────────────────続 き Continuing on the front page (72) Ryuichi Ikematsu 5-7-1 Shiba, Minato-ku, Tokyo NEC Corporation (72) Inventor Akihiro Miyamoto 5-7-1 Shiba 5-chome, Minato-ku, Tokyo NEC Nippon Telegraph and Telephone Co., Ltd. (72) Inventor Koji Kanayama 1-1-6 Uchisaiwai-cho, Chiyoda-ku, Tokyo Nippon Telegraph and Telephone Corporation (72) Inventor Hiromi Ueda 1-6-1, Uchisaiwai-cho, Chiyoda-ku, Tokyo In-house (72) Inventor Mitsumi Taniguchi 1015 Uedanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Inside Fujitsu Limited (72) Inventor Koji Tezuka 1015 Uedanaka, Nakahara-ku, Nakasaki-ku, Kawasaki City, Kanagawa Prefecture Inside Fujitsu Laboratory (72) Invention Person Yoshihiro Ashi 216 Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Within the Information and Communication Division, Hitachi, Ltd. (72) Inventor Yukio Nakano Tokyo 1-280 Higashi-Koigakubo, Hitachi, Ltd. Central Research Laboratory, Hitachi, Ltd. (56) References JP-A-1-183939 (JP, A) JP-A-4-181839 (JP, A) JP-A-4-356849 (JP) , A) IEICE Technical Report CS91-92 1991 IEICE Autumn Conference B-481 (58) Fields investigated (Int. Cl. ⁷ , DB name) H04L 12/28 H04L 12/24 H04L 12 / 26 H04L 12/56

Claims (2)

(57) [Claims] An alarm processing circuit for ATM communication, comprising: a cell type determining circuit for determining a cell type according to information in an ATM cell; and a virtual path specifying information in the ATM cell as a search address. and a state management table which holds the state of the virtual path, depending on the state information of the retrieved said state management table by said a cell type by the cell type determination circuit virtual path identification information
Characterized Te performs fault detection and said and means for rewriting the contents of the state management table corresponding to the virtual path, and to perform failure recovery processing according to the contents of the state management table Alarm processing circuit. 2. An alarm processing circuit in an ATM communication, comprising: a cell type determining circuit for determining a cell type according to information in an ATM cell; and virtual path specifying information in the ATM cell as a search address. A state management table for holding the state of the virtual path, and means for rewriting the contents of the state management table corresponding to the virtual path to an alarm release state when an alarm cell is not detected by the cell type determination circuit for a certain period of time. An alarm processing circuit for performing a failure recovery process in accordance with the contents of the state management table.