JP3035945B2 - Semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a structure of an opening of a semiconductor device using an aluminum-based metal for a wiring layer.

[Conventional technology]

Conventionally, in this type of semiconductor device, after an opening reaching an element or a lower wiring layer is provided in an insulating film formed on a semiconductor substrate, an upper wiring layer made of an aluminum-based metal is formed. When the lower wiring layer is a silicon substrate or polycrystalline silicon, an electrical connection between the upper wiring layer and the lower wiring layer has been obtained by an alloying reaction between the aluminum-based metal in the opening and silicon in the lower wiring layer. As the temperature decreased from the alloying reaction temperature, supersaturated silicon precipitated in the openings, and the connection resistance at the openings increased, and tended to increase with time. Further, when the upper wiring layer is formed only of an aluminum-based metal, there is a problem that the coverage in the opening may be insufficient.

Therefore, in recent years, after an opening reaching an element or a lower wiring layer is provided in an insulating film formed on a semiconductor substrate, tungsten is buried in the opening by a low-pressure vapor deposition method to be planarized, and then sputtering is performed. Aluminum and silicon alloy is deposited by the
An upper wiring layer was formed by patterning a silicon alloy into a desired shape.

[Problems to be solved by the invention]

FIG. 3 is a sectional view of a semiconductor device in which tungsten is buried in the above-described opening. The opening provided in the silicon oxide film 2 on the silicon substrate 1 is buried with tungsten 9, and the upper wiring layer made of aluminum / silicon alloy 4 provided on the upper surface of the silicon oxide film 2 is provided with tungsten 9 buried in the opening. And is electrically connected to the silicon substrate 1 via.

In this case, silicon is not deposited in the opening, but the specific resistance of tungsten is higher than that of the aluminum-silicon alloy, so that there is a problem that the connection resistance in the opening does not decrease.

When a current flows between the upper wiring layer made of the aluminum-silicon alloy 4 and the silicon substrate 1 serving as the lower wiring layer, the current always flows through the aluminum-silicon alloy 4 and the tungsten 9 localized in the opening. Through the interface.

At this time, for example, when a direct current flows from the aluminum / silicon alloy 4 to the silicon substrate 1, electrons flow in the opposite direction from the silicon substrate 1 to the aluminum / silicon alloy 4. Due to this flow of electrons, only the aluminum-silicon alloy 4 moves at the interface between the aluminum-silicon alloy 4 and the tungsten 9 (so-called electromigration), and finally at the interface between the aluminum-silicon alloy 4 and the tungsten 9. There is a disadvantage that the wire is disconnected.

[Means for solving the problem]

According to a semiconductor device of the present invention, in a semiconductor device in which an upper wiring layer made of an aluminum-based metal is connected to a lower wiring layer by an opening provided in an insulating film, the opening directly covers a side surface and a bottom surface of the opening. Said upper wiring layer;
A high-melting-point metal-based conductor film directly covering the surface of the upper wiring layer, wherein the high-melting-point metal-based conductor film has a thickness of 50 to 200 nm on the upper wiring layer on the insulating film.
And a structure in which the refractory metal-based conductor film is not laminated on the side surface of the upper wiring layer.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

FIG. 1 is a cross-sectional view of main steps for realizing the structure of the related art of the present invention.

First, an element is formed as shown in FIG.
A molybdenum silicide 3 is formed on a silicon substrate 1 whose upper surface is covered with a silicon oxide film 2 having a desired opening.
About 0.1μm, 1.0μm of aluminum / silicon alloy 4
It is continuously deposited to a thickness of the order. At this time, the opening is
It is not completely buried by the aluminum-silicon alloy 4.

Next, as shown in FIG. 1 (b), for example, 1.0 mm until the opening is completely buried and the surface is flattened by a reduced pressure vapor deposition method using tungsten hexafluoride and hydrogen gas.
Tungsten 5 is formed to a thickness of about μm.

Next, as shown in FIG.
The tungsten 5 is etched back until the surface of the aluminum-silicon alloy 4 existing on the upper surface of the substrate 5 is exposed.

Thereafter, as shown in FIG. 1 (d), the aluminum-silicon alloy 4 and the molybdenum silicide 3
Is patterned into a desired shape to form an upper wiring layer,
The structure of the first embodiment is obtained.

Since the thickness of the molybdenum silicide 3 in this embodiment is small, the connection resistance does not become high as in the case where the opening is filled only with tungsten.

Further, since molybdenum silicide 3 does not exist only in the opening but exists on the entire lower surface of aluminum-silicon alloy 4, electromigration can be prevented from being concentrated in the opening.

Due to the presence of the molybdenum silicide 3, silicon precipitation does not occur due to the alloying reaction between the aluminum / silicon alloy 4 and the silicon in the silicon substrate 1.

Furthermore, in this related technique, since the molybdenum silicide 3 is present on the entire lower surface of the aluminum-silicon alloy 4, disconnection due to stress migration hardly occurs.

FIG. 2 is a cross-sectional view of main steps for realizing the structure of one embodiment of the present invention.

First, as shown in FIG. 2A, a lower wiring layer made of an aluminum / silicon alloy 6 is formed on a silicon oxide film 2 formed on a silicon substrate 1, and an interlayer insulating film 7 is deposited. Subsequently, an opening reaching the aluminum-silicon alloy 6 is formed in the interlayer insulating film 7, and the aluminum-silicon alloy 4 is deposited by a sputtering method.

Next, as shown in FIG. 2 (b), until the opening is completely filled and the surface is flattened by, for example, 1.
A tungsten silicide 8 is formed to a thickness of about 0 μm.

Next, as shown in FIG. 2C, the tungsten silicide 8 is etched until the thickness of the tungsten silicide 8 on the aluminum-silicon alloy 4 existing on the upper surface of the interlayer insulating film 7 becomes about 50 to 200 nm. Back.

Thereafter, as shown in FIG. 2 (d), the tungsten silicide 8 and the aluminum-silicon alloy 4 are formed by using a normal photolithography technique and a dry etching technique.
Are patterned into a desired shape to form an upper wiring layer, thereby obtaining the structure of the second embodiment.

In the present embodiment, since the tungsten silicide 8 is left on the aluminum / silicon alloy 4, disconnection due to stress migration is unlikely to occur.

In one embodiment, aluminum, aluminum, silicon, and copper alloys may be used instead of the aluminum / silicon alloy 4, and other high melting point metals, high melting point metal silicides, and high melting points may be used instead of tungsten 5 and tungsten silicide 8. Metal nitride may be used.

〔The invention's effect〕

As described above, the present invention relates to a semiconductor device in which an upper wiring layer made of an aluminum-based metal is connected to a lower wiring layer through an opening provided in an insulating film. By burying the opening with a high-melting-point metal-based conductive film covered with an upper wiring layer made of metal and upper and lower wiring layers made of aluminum-based metal, the connection resistance in the opening is lower than in the conventional structure. It is possible to do.

In addition, although there is an interface between the high melting point metal-based conductive film and the aluminum-based metal, when a current flows between the upper wiring layer and the lower wiring layer, the current does not necessarily cross the interface. The occurrence of disconnection of the upper wiring layer made of an aluminum-based metal in the opening due to electromigration as described above is reduced.

[Brief description of the drawings]

1 (a) to 1 (d) are cross-sectional views of main steps for realizing the structure of the related art of the present invention, and FIGS. 2 (a) to 2 (d) realize the structure of one embodiment of the present invention. FIG. 3 is a cross-sectional view of the related art. DESCRIPTION OF SYMBOLS 1 ... Silicon substrate, 2 ... Silicon oxide film, 3 ... Molybdenum silicide, 4,6 ... Aluminum silicon alloy, 5,9 ... Tungsten, 7 ... Interlayer insulating film, 8 tungsten silicide.

──────────────────────────────────────────────────の Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/3205-21/3213 H01L 21/768

Claims (1)

(57) [Claims] 1. A semiconductor device in which an upper wiring layer made of an aluminum-based metal is connected to a lower wiring layer through an opening provided in an insulating film, wherein the opening directly covers a side surface and a bottom surface of the opening. A wiring layer and a refractory metal-based conductor film directly covering the surface of the upper wiring layer, wherein the refractory metal-based conductor film has a thickness of 50 on the upper wiring layer on the insulating film. A semiconductor device having a structure in which etch-back is performed until a thickness of about 200 nm is reached, and the refractory metal-based conductor film is not laminated on side surfaces of the upper wiring layer.