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JP3036236B2 - Circuit board - Google Patents
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JP3036236B2 - Circuit board - Google Patents

Circuit board

Info

Publication number
JP3036236B2
JP3036236B2 JP4181713A JP18171392A JP3036236B2 JP 3036236 B2 JP3036236 B2 JP 3036236B2 JP 4181713 A JP4181713 A JP 4181713A JP 18171392 A JP18171392 A JP 18171392A JP 3036236 B2 JP3036236 B2 JP 3036236B2
Authority
JP
Japan
Prior art keywords
insulating layer
circuit
circuit board
power
conductor pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP4181713A
Other languages
Japanese (ja)
Other versions
JPH065730A (en
Inventor
宏和 田中
誠 鳥海
秀昭 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Materials Corp
Original Assignee
Mitsubishi Materials Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Materials Corp filed Critical Mitsubishi Materials Corp
Priority to JP4181713A priority Critical patent/JP3036236B2/en
Publication of JPH065730A publication Critical patent/JPH065730A/en
Application granted granted Critical
Publication of JP3036236B2 publication Critical patent/JP3036236B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/05Insulated conductive substrates, e.g. insulated metal substrate

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、例えば制御回路を取り
込んだパワーモジュールの配線板、小型の電源ユニット
の配線板等に使用される回路基板、詳しくはパワー回路
を搭載したハイブリッドIC用基板等に用いられ、高放
熱特性および高絶縁耐圧を有する回路基板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board used for, for example, a wiring board of a power module incorporating a control circuit, a wiring board of a small power supply unit, and more specifically, a hybrid IC board having a power circuit mounted thereon. The present invention relates to a circuit board having high heat dissipation characteristics and high withstand voltage.

【0002】[0002]

【従来の技術】コンピュータの性能向上は、半導体集積
回路の集積度の飛躍的な発展に負うところが大きい。一
方では、これらの半導体集積回路の性能向上に見合った
実装技術の進展も大きく寄与している。それに伴い、1
ゲートあたりの消費電力は低減の方向にある。しかし、
それ以上に素子の高速化と高集積化により発熱密度は増
加の傾向にある。特に、中出力以上のハイブリッドIC
においては内部損失による発熱とその熱の放出が必要で
ある。殊に、小型化を意図する場合には、熱の放出が悪
くなるので、構造設計上の考慮が十分に成されなければ
ならない。
2. Description of the Related Art Improving the performance of computers largely depends on the dramatic development of the degree of integration of semiconductor integrated circuits. On the other hand, the progress of packaging technology corresponding to the improvement of the performance of these semiconductor integrated circuits has also contributed greatly. Accordingly, 1
Power consumption per gate is in the direction of reduction. But,
Furthermore, the heat generation density tends to increase due to higher speed and higher integration of the device. In particular, hybrid ICs with medium output or higher
Requires heat generation due to internal loss and release of the heat. In particular, when miniaturization is intended, heat dissipation is worsened, and structural design considerations must be made.

【0003】一方、電算機や伝送装置も機能として高速
性を追求する観点から、熱放散を十分に考慮しなければ
ならない。この熱抵抗を低減しなければいけないという
要請は、高電流制御用のパワー回路と、このパワー回路
を制御する制御回路を搭載した回路基板でも同様であ
る。従来の多層回路基板としては、例えば図3に示すよ
うなものがある。このものはアルミベース部分2層配線
板であって、パワー素子搭載用の高放熱1層回路および
制御回路用のスルーホール付高密度2層回路を同一基板
上に形成している。すなわち、アルミニウム板31上に
高放熱性絶縁層としてポリイミド樹脂32を積層してい
る。このポリイミド系樹脂の絶縁層32上には、パワー
回路用の導体パターン33と、2層構造の制御回路用の
導体パターン34とが配設されている。35はNiメッ
キ層、36はソルダレジスト層である。
[0003] On the other hand, heat dissipation must be sufficiently considered from the viewpoint of pursuing high speed as a function of a computer or a transmission device. The requirement that the thermal resistance must be reduced is the same for a power circuit for high-current control and a circuit board on which a control circuit for controlling the power circuit is mounted. As a conventional multilayer circuit board, for example, there is one shown in FIG. This is an aluminum base portion two-layer wiring board, in which a high heat radiation one-layer circuit for mounting a power element and a high-density two-layer circuit with through holes for a control circuit are formed on the same substrate. That is, the polyimide resin 32 is laminated on the aluminum plate 31 as a high heat dissipation insulating layer. A conductor pattern 33 for a power circuit and a conductor pattern 34 for a control circuit having a two-layer structure are provided on the insulating layer 32 of the polyimide resin. 35 is a Ni plating layer, and 36 is a solder resist layer.

【0004】[0004]

【発明が解決しようとする問題点】しかしながら、この
ような従来の回路基板においては、絶縁層32としてポ
リイミド系樹脂を用いているため、その熱伝導率が0.
1〜0.5W/m・Kと小さく、未だその放熱特性が不
十分である。そのため、絶縁層32の層厚を100μm
程度と薄くせざるを得ない。層厚が薄くなると、これら
の樹脂が本来有している高い絶縁耐圧が低減し、絶縁破
壊が起きてしまう。したがって、放熱性と絶縁耐圧とを
両立することができず、両者の関係を示すパラメータで
ある(熱伝導率)×(絶縁耐圧)値が不十分となるとい
う課題があった。
However, in such a conventional circuit board, a polyimide resin is used for the insulating layer 32.
It is as small as 1 to 0.5 W / m · K, and its heat radiation characteristics are still insufficient. Therefore, the thickness of the insulating layer 32 is set to 100 μm
I have to make it thin. When the layer thickness is reduced, the high withstand voltage inherent in these resins is reduced, and dielectric breakdown occurs. Therefore, there is a problem that it is not possible to achieve both the heat radiation property and the withstand voltage, and the value of the parameter indicating the relationship between them ((thermal conductivity) × (withstand voltage)) becomes insufficient.

【0005】[0005]

【発明の目的】本発明の主たる目的は、このような問題
点を解決して、放熱特性に優れ、かつ、絶縁耐圧の高い
絶縁層を有する回路基板を提供することにある。
SUMMARY OF THE INVENTION It is a main object of the present invention to solve the above problems and to provide a circuit board having an insulating layer which is excellent in heat dissipation characteristics and has a high withstand voltage.

【0006】[0006]

【課題を解決するための手段】請求項1の発明は、大電
力制御用のパワー回路と、このパワー回路を制御する制
御回路とを搭載する回路基板において、ベース部材と、
このベース部材上に積層されるセラミックスの絶縁層
と、このセラミックスの絶縁層上に形成された上記パワ
ー回路用の導体パターンとを備えると共に、上記セラミ
ックスの絶縁層上に第2の絶縁層を積層し、この第2の
絶縁層上に上記パワー回路を制御する制御回路用の導体
パターンを形成した回路基板である。
According to a first aspect of the present invention, there is provided a circuit board on which a power circuit for controlling high power and a control circuit for controlling the power circuit are mounted, wherein a base member,
A ceramic insulating layer laminated on the base member, a power circuit conductor pattern formed on the ceramic insulating layer, and a second insulating layer laminated on the ceramic insulating layer; And a circuit board on which a conductor pattern for a control circuit for controlling the power circuit is formed on the second insulating layer.

【0007】請求項2の発明は、大電力制御用のパワー
回路と、このパワー回路を制御する制御回路とを搭載す
る回路基板において、ベース部材と、このベース部材上
に積層されるセラミックスの絶縁層と、このセラミック
スの絶縁層上に形成された上記パワー回路用の導体パタ
ーンとを備えると共に、上記ベース部材上に有機樹脂系
材料の絶縁層を積層し、この絶縁層上に上記パワー回路
を制御する制御回路用の導体パターンを形成した回路基
板である。
According to a second aspect of the present invention, there is provided a circuit board on which a power circuit for controlling a large power and a control circuit for controlling the power circuit are mounted, wherein a base member and insulating ceramics laminated on the base member are provided. Layer and a conductor pattern for the power circuit formed on the insulating layer of ceramics, and an insulating layer of an organic resin material is laminated on the base member, and the power circuit is formed on the insulating layer. It is a circuit board on which a conductor pattern for a control circuit to be controlled is formed.

【0008】[0008]

【作用】本発明においては、絶縁層の材質としてAl
N、Al23あるいはSiC等のセラミックスを用い
る。これらのセラミックスは、熱伝導率が10〜300
W/m・Kであり、絶縁耐圧が1〜20kV/mmであ
る。このため、(放熱量)×(絶縁耐圧)値が100〜
2500W・kV/m・K・mmと高く、従来に比較し
て大幅に放熱特性が改善される。
In the present invention, the material of the insulating layer is Al
Ceramics such as N, Al 2 O 3 or SiC are used. These ceramics have a thermal conductivity of 10 to 300.
W / m · K, and a withstand voltage of 1 to 20 kV / mm. Therefore, the value of (heat release amount) × (dielectric withstand voltage) is 100 to
It is as high as 2500 W · kV / m · K · mm, and the heat radiation characteristics are significantly improved as compared with the related art.

【0009】また、本発明においては、ベース部材上に
第2の絶縁層を積層し、この第2の絶縁層の上に制御回
路用の導体パターンを形成している。この第2の絶縁層
として有機樹脂系材料を用いている。この有機樹脂系材
料、例えばガラスエポキシ樹脂は、上記セラミックスに
比較して安価である。
In the present invention, a second insulating layer is laminated on the base member, and a conductor pattern for a control circuit is formed on the second insulating layer. An organic resin material is used for the second insulating layer. This organic resin-based material, for example, glass epoxy resin, is less expensive than the above ceramics.

【0010】[0010]

【実施例】以下、本発明の具体的構成を実施例に基づい
て詳述する。図1は、本発明をスイッチング素子あるい
は電源ユニットとして用いられる高電流制御用回路に適
用した一実施例を示している。図1において、11は放
熱用のアルミニウム板からなるベース部材であって、そ
の上面には所定厚さの窒化アルミニウム層(AlN層)
で構成される絶縁層12が例えばAl−Si系のろう材
を用いて積層、形成されている。この絶縁層12の上面
には、パワー回路を構成するアルミニウム製の導体パタ
ーン13が被着、形成されている。この導体パターン1
3の上面にはニッケルメッキ14が施されており、図示
していないが、はんだ付けによりこの上にパワーICチ
ップが搭載されるものである。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a specific configuration of the present invention will be described in detail based on embodiments. FIG. 1 shows an embodiment in which the present invention is applied to a high current control circuit used as a switching element or a power supply unit. In FIG. 1, reference numeral 11 denotes a base member made of an aluminum plate for heat dissipation, and an aluminum nitride layer (AlN layer) having a predetermined thickness
Is laminated and formed using, for example, an Al-Si-based brazing material. On the upper surface of the insulating layer 12, a conductor pattern 13 made of aluminum constituting a power circuit is attached and formed. This conductor pattern 1
A nickel plating 14 is formed on the upper surface of the power supply 3, and a power IC chip is mounted thereon by soldering, though not shown.

【0011】また、上記絶縁層12上の一端側には第2
の絶縁層である低温焼成基板15が積層されている。こ
の低温焼成基板15の上面には金属箔または厚膜回路等
からなる制御回路用の導体パターン16が被着、形成さ
れている。そして、この導体パターン16の上に図示し
ていないが制御回路用のICチップ、素子が搭載される
ものである。なお、上記第2の絶縁層15としてはアル
ミナ基板を採用することもでき、さらには、有機樹脂系
材料の基板、例えばエポキシ基板、ガラスエポキシ基
板、ポリイミド系基板等を使用することもできる。
A second end on the insulating layer 12 is
A low-temperature fired substrate 15 as an insulating layer is laminated. On the upper surface of the low-temperature fired substrate 15, a conductor pattern 16 for a control circuit made of a metal foil, a thick film circuit or the like is attached and formed. Although not shown, an IC chip and an element for a control circuit are mounted on the conductor pattern 16. Note that an alumina substrate can be used as the second insulating layer 15, and a substrate made of an organic resin material, for example, an epoxy substrate, a glass epoxy substrate, a polyimide substrate, or the like can also be used.

【0012】この実施例にあっては、放熱用のアルミニ
ウム板11と導体パターン13との間にセラミックス製
(AlN)の絶縁層12を介在させている。このため、
パワー回路からの発熱はこの絶縁層12を介して効率よ
くアルミニウム板11に伝達されることとなり、パワー
ICチップ等の機能を十分に発揮することができる。ま
た、パワー回路の耐久性が増している。
In this embodiment, an insulating layer 12 made of ceramics (AlN) is interposed between an aluminum plate 11 for heat dissipation and a conductor pattern 13. For this reason,
The heat generated from the power circuit is efficiently transmitted to the aluminum plate 11 via the insulating layer 12, and the functions of the power IC chip and the like can be sufficiently exhibited. Further, the durability of the power circuit has been increased.

【0013】この場合、絶縁層12に用いるセラミック
スとしては、上記のように熱伝導率が100W/m・
K、絶縁耐圧が14〜17kV/mmであるAlNが好
適であるが、その他にも、Al23、SiC、BeO、
および、BaSn(BO32等も用いることができる。
但し、Al23やBaSn(BO32は熱伝導率が低
く、SiCは誘電率が高く、BeOは毒性が強いので、
好ましくはAlNを用いるべきである。表1に本発明に
おいて使用し得る各種セラミックスの物性値を示す。
In this case, the ceramic used for the insulating layer 12 has a thermal conductivity of 100 W / m.multidot.
K, AlN having a withstand voltage of 14 to 17 kV / mm is preferable. In addition, Al 2 O 3 , SiC, BeO,
Also, BaSn (BO 3 ) 2 or the like can be used.
However, Al 2 O 3 and BaSn (BO 3 ) 2 have low thermal conductivity, SiC has high dielectric constant, and BeO has strong toxicity.
Preferably, AlN should be used. Table 1 shows physical properties of various ceramics that can be used in the present invention.

【0014】[0014]

【表1】[Table 1]

【0015】この絶縁層12の材質を選定する場合に
は、放熱特性と絶縁性を兼ね備えたものが好ましく、こ
の両者の相関を示す指標である(熱伝導率)×(絶縁耐
圧)の値が重要である。AlNは1400〜1700で
あり、両者のバランスがよいので好適である。この絶縁
層12の層厚は0.3〜1.0mm程度とするのが好ま
しい。層厚がこの範囲を越えると放熱特性が劣化し、こ
の範囲未満であると絶縁破壊を生じることがある。な
お、この絶縁層12は放熱用のアルミニウム板11上に
積層しているが、この放熱板としてはアルミニウム以外
にも、鉄、銅等も用い得る。
When the material of the insulating layer 12 is selected, it is preferable that the material has both heat radiation characteristics and insulating properties. is important. AlN is 1400 to 1700, which is preferable since both are well balanced. The thickness of the insulating layer 12 is preferably about 0.3 to 1.0 mm. If the thickness exceeds this range, the heat radiation characteristics deteriorate, and if it is less than this range, dielectric breakdown may occur. Although the insulating layer 12 is laminated on the aluminum plate 11 for heat radiation, iron, copper or the like may be used as the heat radiation plate in addition to aluminum.

【0016】図2は本発明の他の実施例に係る高電流用
制御回路を示す断面図である。この図に示すように、こ
の実施例では、アルミニウムのベース21上にAlNの
絶縁層22を積層し、この絶縁層22の上に、パワー回
路用の導体パターン23と、制御回路用の導体パターン
24と、をそれぞれ形成したものである。この導体パタ
ーン24は有機樹脂基板またはガラスエポキシ樹脂基板
25に2層に形成されており、この基板25が第2の絶
縁層となる。この第2の絶縁層25は上述したアルミナ
または低温焼成基板を用いてもよい。樹脂を用いれば誘
電率が低いので応答時間が速くなり好適である。用い得
る樹脂としては、表1に示すように、誘電率が5以下で
あり、熱伝導率が1W/m・Kであるエポキシ樹脂、ポ
リイミド系樹脂、ポリイミドフィルムおよびガラスエポ
キシ樹脂等が挙げられる。この第2の絶縁層25は、熱
的な遮蔽板としても機能し、これに搭載される導体パタ
ーン24および制御用のICチップが高温に曝されるの
を防ぐことができる。第2の絶縁層25は、例えばその
熱伝導率が0.3W/m・K、誘電率が4.8である。
FIG. 2 is a sectional view showing a high-current control circuit according to another embodiment of the present invention. As shown in this figure, in this embodiment, an AlN insulating layer 22 is laminated on an aluminum base 21, and a power circuit conductive pattern 23 and a control circuit conductive pattern are formed on the insulating layer 22. 24 and 24 respectively. The conductor pattern 24 is formed in two layers on an organic resin substrate or a glass epoxy resin substrate 25, and the substrate 25 serves as a second insulating layer. The second insulating layer 25 may use the above-described alumina or low-temperature fired substrate. The use of resin is preferable because the dielectric constant is low and the response time is short. Examples of resins that can be used include, as shown in Table 1, an epoxy resin having a dielectric constant of 5 or less and a thermal conductivity of 1 W / m · K, a polyimide resin, a polyimide film, a glass epoxy resin, and the like. The second insulating layer 25 also functions as a thermal shield plate, and can prevent the conductor pattern 24 and the control IC chip mounted thereon from being exposed to high temperatures. The second insulating layer 25 has, for example, a thermal conductivity of 0.3 W / m · K and a dielectric constant of 4.8.

【0017】なお、制御回路用の導体パターンは、上記
絶縁層を除いて直接ベース上に第2の絶縁層を積層、形
成し、この上に形成してもよい。このようにすると、安
価な有機樹脂系の絶縁層により回路基板そのものをより
安価に製作することができる。
The conductor pattern for the control circuit may be formed by laminating and forming a second insulating layer directly on the base except for the insulating layer described above. In this case, the circuit board itself can be manufactured at lower cost by using an inexpensive organic resin-based insulating layer.

【0018】[0018]

【発明の効果】本発明の回路基板は、良好な放熱特性、
高い絶縁破壊耐圧特性を有する。
The circuit board of the present invention has good heat dissipation characteristics,
Has high dielectric breakdown voltage characteristics.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例に係る多層回路基板を示す断
面図である。
FIG. 1 is a sectional view showing a multilayer circuit board according to one embodiment of the present invention.

【図2】本発明の他の実施例に係る多層回路基板を示す
断面図である。
FIG. 2 is a cross-sectional view showing a multilayer circuit board according to another embodiment of the present invention.

【図3】従来の多層回路基板を示す断面図である。FIG. 3 is a cross-sectional view showing a conventional multilayer circuit board.

【符号の説明】[Explanation of symbols]

11 ベース部材 12 絶縁層 13 パワー回路用の導体パターン 15 第2の絶縁層 16 制御回路用の導体パターン Reference Signs List 11 base member 12 insulating layer 13 conductor pattern for power circuit 15 second insulating layer 16 conductor pattern for control circuit

フロントページの続き (56)参考文献 特開 平4−192445(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01L 23/12 H01L 21/768 (56) References JP-A-4-192445 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 23/12 H01L 21/768

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 大電力制御用のパワー回路と、このパワ
ー回路を制御する制御回路とを搭載する回路基板におい
て、 ベース部材と、このベース部材上に積層されるセラミッ
クスの絶縁層と、このセラミックスの絶縁層上に形成さ
れた上記パワー回路用の導体パターンとを備えると共
に、 上記セラミックスの絶縁層上に低温焼成基板または有機
樹脂系材料よりなる第2の絶縁層を積層し、この第2の
絶縁層上に上記制御回路用の導体パターンを形成した回
路基板。
1. A circuit board on which a power circuit for controlling high power and a control circuit for controlling the power circuit are mounted, comprising: a base member; an insulating layer of ceramic laminated on the base member; A second insulating layer made of a low-temperature fired substrate or an organic resin-based material on the ceramic insulating layer; A circuit board having the conductor pattern for the control circuit formed on an insulating layer.
【請求項2】 大電力制御用のパワー回路と、このパワ
ー回路を制御する制御回路とを搭載する回路基板におい
て、 ベース部材と、このベース部材上に積層されるセラミッ
クスの絶縁層と、このセラミックスの絶縁層上に形成さ
れた上記パワー回路用の導体パターンとを備えると共
に、 上記ベース部材上に有機樹脂系材料の絶縁層を積層し、
この絶縁層上に上記制御回路用の導体パターンを形成し
た回路基板。
2. A circuit board on which a power circuit for controlling high power and a control circuit for controlling the power circuit are mounted, comprising: a base member; an insulating layer of ceramic laminated on the base member; And a conductor pattern for the power circuit formed on the insulating layer, and an insulating layer of an organic resin material is laminated on the base member,
A circuit board having the conductor pattern for the control circuit formed on the insulating layer.
JP4181713A 1992-06-16 1992-06-16 Circuit board Expired - Lifetime JP3036236B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4181713A JP3036236B2 (en) 1992-06-16 1992-06-16 Circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4181713A JP3036236B2 (en) 1992-06-16 1992-06-16 Circuit board

Publications (2)

Publication Number Publication Date
JPH065730A JPH065730A (en) 1994-01-14
JP3036236B2 true JP3036236B2 (en) 2000-04-24

Family

ID=16105561

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4181713A Expired - Lifetime JP3036236B2 (en) 1992-06-16 1992-06-16 Circuit board

Country Status (1)

Country Link
JP (1) JP3036236B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69535775D1 (en) * 1994-10-07 2008-08-07 Hitachi Ltd Semiconductor arrangement with a plurality of semiconductor elements
CN104994682B (en) * 2015-07-14 2018-07-13 广东欧珀移动通信有限公司 A kind of PCB with heat dissipation performance and apply its mobile terminal

Also Published As

Publication number Publication date
JPH065730A (en) 1994-01-14

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