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JP3047632B2 - Electronic circuit device - Google Patents
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JP3047632B2 - Electronic circuit device - Google Patents

Electronic circuit device

Info

Publication number
JP3047632B2
JP3047632B2 JP4198511A JP19851192A JP3047632B2 JP 3047632 B2 JP3047632 B2 JP 3047632B2 JP 4198511 A JP4198511 A JP 4198511A JP 19851192 A JP19851192 A JP 19851192A JP 3047632 B2 JP3047632 B2 JP 3047632B2
Authority
JP
Japan
Prior art keywords
circuit board
case
electronic circuit
circuit device
stress
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP4198511A
Other languages
Japanese (ja)
Other versions
JPH0645477A (en
Inventor
長坂  崇
祐司 大谷
斎藤  光弘
伴  博行
賢吾 岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Priority to JP4198511A priority Critical patent/JP3047632B2/en
Priority to US08/091,718 priority patent/US5483217A/en
Publication of JPH0645477A publication Critical patent/JPH0645477A/en
Application granted granted Critical
Publication of JP3047632B2 publication Critical patent/JP3047632B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、電子回路装置に関し、
詳しくは樹脂封止ハイブリッドICに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic circuit device,
Specifically, the present invention relates to a resin-sealed hybrid IC.

【0002】[0002]

【従来の技術】従来の樹脂パッケージ型ハイブリッドI
Cは、リード取り出し構造によりSIPタイプ及びDI
Pタイプに分類されるが、樹脂封止モールドの場合、金
型又はケースに回路基板を予め挿入しておき、注型法、
浸漬法、トランスファ法などにより液状又は粉体状の熱
硬化性樹脂(例えばエポキシ樹脂やシリコーン樹脂)を
用いて封止している。
2. Description of the Related Art Conventional resin package type hybrid I
C is SIP type and DI depending on the lead extraction structure
Although it is classified into P type, in the case of resin molding, the circuit board is inserted in the mold or case in advance, and the casting method,
The liquid or powdered thermosetting resin (for example, epoxy resin or silicone resin) is used for sealing by an immersion method, a transfer method, or the like.

【0003】SIPタイプのハイブリッドICの一例を
図5に示す。ケース1a内に回路基板2aが収容され、
回路基板2aには抵抗器R1、R2などの回路素子が形
成されている。3aはモールド樹脂部であり、ケース1
a内に充填されて回路素子の防湿並びに回路基板の固定
を行っている。9aは抵抗器R1、R2を保護する保護
ガラスである。
FIG. 5 shows an example of an SIP type hybrid IC. The circuit board 2a is accommodated in the case 1a,
Circuit elements such as resistors R1 and R2 are formed on the circuit board 2a. 3a is a mold resin part,
Filled in a, the circuit element is moisture-proof and the circuit board is fixed. 9a is a protective glass for protecting the resistors R1 and R2.

【0004】SIPタイプのハイブリッドICの他例で
は、上記回路基板2aの全面に薄くシリコンゲル膜を塗
布した後、回路基板2aをケース1a内に収容し、その
後、モールド樹脂部3aを充填している。
In another example of the SIP type hybrid IC, after a thin silicon gel film is applied to the entire surface of the circuit board 2a, the circuit board 2a is housed in a case 1a, and then filled with a mold resin portion 3a. I have.

【0005】[0005]

【発明が解決しようとする課題】しかしながら上記した
従来の樹脂パッケージ型ハイブリッドICでは、主とし
て封止樹脂硬化時の収縮やその後の加熱・冷却による樹
脂の樹脂・収縮する過程で、封止樹脂部3aと回路基板
2aとの間の収縮率や熱膨張率の差により両者間に応力
が発生し、この応力が回路基板2aに固定された抵抗器
R1、R2に作用し、その結果、この抵抗器R1、R2
の抵抗値が、受承する応力に応じて変化してしまう欠点
があった。
However, in the above-mentioned conventional resin-packaged hybrid IC, the sealing resin portion 3a is mainly used in the process of shrinking when the sealing resin is hardened and the subsequent resin shrinkage due to heating and cooling. Due to the difference between the contraction rate and the coefficient of thermal expansion between the circuit board 2a and the circuit board 2a, stress is generated between the two, and this stress acts on the resistors R1 and R2 fixed to the circuit board 2a. R1, R2
Has the drawback that the resistance value of the changes according to the stress received.

【0006】本発明者らの試験、解析によれば、封止樹
脂部3aの硬化時の収縮により回路基板2aには圧縮応
力及び面直方向の曲げ応力が作用し、この曲げ応力によ
り抵抗器R1、R2に圧縮応力又は引張り応力が生じる
ことがわかった。上記曲げ応力は回路基板2a各部にお
いてばらつくので、回路基板2a上の固定位置によって
抵抗器R1、R2の抵抗値がばらつき、その結果、回路
の出力がばらつく。
According to tests and analysis by the present inventors, compressive stress and bending stress in the direction perpendicular to the surface act on the circuit board 2a due to shrinkage of the sealing resin portion 3a during curing, and the bending stress causes the resistor It was found that a compressive stress or a tensile stress was generated in R1 and R2. Since the bending stress varies in each part of the circuit board 2a, the resistance values of the resistors R1 and R2 vary depending on the fixed position on the circuit board 2a, and as a result, the output of the circuit varies.

【0007】以下、試験結果を図6〜図9に基づいて説
明する。試験用の回路基板20は、図6に示すように、
縦、横、厚さが13mm×47.5mm×0.8mmの
寸法を有し、台座90で回路基板20の長手方向の両端
部を支持した。厚膜抵抗器Rは回路基板20の短辺21
から15.3mmの位置に固定され、回路基板20の長
手方向中央を回路基板20の長手方向と直角に向けて押
圧した。回路基板20に加えられる応力と回路基板20
に固定された厚膜抵抗器Rの抵抗値変化との関係を図7
に示す。図7から、押圧力(曲げ応力)と抵抗値の変化
とはほぼ直線関係にあり、この押圧力による回路基板2
0の湾曲により、厚膜抵抗器Rに圧縮応力が生じる場合
には抵抗減少、厚膜抵抗器Rに引張り応力が生じる場合
には抵抗増加が生じることがわかった。
Hereinafter, test results will be described with reference to FIGS. As shown in FIG. 6, the test circuit board 20
The vertical, horizontal, and thickness dimensions were 13 mm × 47.5 mm × 0.8 mm, and the pedestal 90 supported both ends of the circuit board 20 in the longitudinal direction. The thick film resistor R is connected to the short side 21 of the circuit board 20.
, And the center of the circuit board 20 in the longitudinal direction was pressed at right angles to the longitudinal direction of the circuit board 20. Stress applied to circuit board 20 and circuit board 20
7 shows the relationship with the change in the resistance value of the thick film resistor R fixed to FIG.
Shown in From FIG. 7, it can be seen that the pressing force (bending stress) and the change in the resistance value are substantially linear, and the circuit board 2
It has been found that a curvature of 0 causes a decrease in resistance when a compressive stress occurs in the thick-film resistor R, and an increase in resistance when a tensile stress occurs in the thick-film resistor R.

【0008】次に、図6の回路基板20における反り量
(変位量)と抵抗値変化量との関係を調べた。その結果
を図8に示す。ただし、反り量は回路基板中央部の最大
変位量とした。図8から、回路基板20の変位量(反り
量)と抵抗値変化量とがほぼ直線関係にあることがわか
る。なお、回路基板20の両短辺21、22を支持して
中央部を押圧した場合、回路基板20の変形により回路
基板20の長手方向各部に作用する圧縮あるいは引張り
応力は図9に示すように、中央部が最大で両短辺21、
22でほぼ0となるように変化することがわかった。
Next, the relationship between the amount of warpage (displacement) and the amount of change in resistance in the circuit board 20 of FIG. 6 was examined. FIG. 8 shows the result. However, the amount of warpage was the maximum displacement at the center of the circuit board. From FIG. 8, it can be seen that the displacement amount (warpage amount) of the circuit board 20 and the resistance value change amount have a substantially linear relationship. When the central portion is pressed while supporting both short sides 21 and 22 of the circuit board 20, the compressive or tensile stress acting on each portion in the longitudinal direction of the circuit board 20 due to the deformation of the circuit board 20 is as shown in FIG. , The central part is at most both short sides 21,
It turned out that it changes to almost 0 at 22.

【0009】次に、厚膜抵抗器Rが上記位置に固定され
た回路基板20を図5に示す位置にて実際にケ−ス1に
収容し、モールド樹脂部で全面モールドした場合の厚膜
抵抗器Rの抵抗値変化を調べた。その結果、この厚膜抵
抗器R1の抵抗値変化率の平均値は約−0.7%であっ
た。また、従来のハイブリッドICでは、回路基板2a
の回路素子搭載面Aが凹面となるように反ることもわか
った。この原因は、回路基板2aの回路素子搭載面Aに
は各種の高さをもつ回路素子が固定されるので、それに
合わせて回路素子搭載面Aとそれに対面するケース1a
の内面11aとの間の寸法を確保する必要があり、その
結果として、回路素子搭載面A側に充填されるモールド
樹脂部3aはB面側に充填されるモールド樹脂部3aよ
りも格段に多くなるためと考えられる。すなわち、厚く
充填されたA面側のモールド樹脂部3aの収縮量(収縮
力)がB面側のモールド樹脂部3aの収縮量(収縮力)
より大きいので、回路基板2aがA面を凹面とするよう
に反るものと考えられる。
Next, the circuit board 20 in which the thick film resistor R is fixed at the above position is actually accommodated in the case 1 at the position shown in FIG. A change in the resistance value of the resistor R was examined. As a result, the average value of the rate of change in resistance value of the thick film resistor R1 was about -0.7%. In the conventional hybrid IC, the circuit board 2a
It has also been found that the circuit element mounting surface A of (1) warps so as to be concave. This is because circuit elements having various heights are fixed to the circuit element mounting surface A of the circuit board 2a, and accordingly, the circuit element mounting surface A and the case 1a facing the circuit element mounting surface A are adjusted accordingly.
It is necessary to ensure a dimension between the inner surface 11a and the mold resin portion 3a filled on the circuit element mounting surface A side is much larger than the mold resin portion 3a filled on the B surface side. It is thought to be. That is, the shrinkage amount (shrinkage force) of the thickly filled mold resin portion 3a on the side A is the shrinkage amount (shrinkage force) of the mold resin portion 3a on the side B side.
Since it is larger, it is considered that the circuit board 2a is warped so that the surface A is concave.

【0010】上記の結果として、このような回路基板2
の反り(すなわち回路基板2の面直方向の曲げ応力)に
より、回路素子搭載面A上に固定された厚膜抵抗器Rに
圧縮応力が加えられ、厚膜抵抗器Rの抵抗値が減少す
る。また上記したように、回路基板2aの表面に予め柔
らかいシリコンゲル膜を塗布することにより、モールド
樹脂部3aと回路基板2aとの間に作用する応力を緩和
できるが、従来のシリコンゲル膜の塗布膜厚は薄いので
応力緩和は僅かであり、回路基板2aの反りを解消する
ことはできなかった。もちろん、シリコンゲルの塗布、
乾燥を多数回繰り返すことにより応力緩和効果を向上で
きるが、厄介であり、かつ、多数回の重ね塗りにより厚
いシリコンゲル膜を形成したとしてもモールド樹脂部3
aを充填する以上、その硬化収縮により応力がシリコン
ゲル膜を通じて回路基板2aに作用する。
As a result of the above, such a circuit board 2
(Ie, bending stress in the direction perpendicular to the surface of the circuit board 2), compressive stress is applied to the thick film resistor R fixed on the circuit element mounting surface A, and the resistance value of the thick film resistor R decreases. . Further, as described above, by applying a soft silicon gel film on the surface of the circuit board 2a in advance, stress acting between the mold resin portion 3a and the circuit board 2a can be reduced. Since the film thickness was small, stress relaxation was slight, and the warpage of the circuit board 2a could not be eliminated. Of course, silicone gel coating,
Although the stress relaxation effect can be improved by repeating the drying many times, it is troublesome, and even if a thick silicon gel film is formed by multiple coatings, the molding resin portion 3
As a is filled, a stress acts on the circuit board 2a through the silicon gel film due to the curing shrinkage.

【0011】本発明は、以上の問題点に鑑みなされたも
のであり、モールド樹脂部と回路基板との間に生じる応
力に起因する抵抗器の抵抗値変動を解消可能な電子回路
装置を提供することを、その目的としている。
SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and provides an electronic circuit device capable of eliminating a resistance value variation of a resistor caused by a stress generated between a mold resin portion and a circuit board. That is its purpose.

【0012】[0012]

【課題を解決するための手段】請求項1記載の発明は、
内面に回路基板保持用の基板嵌入溝を有し、一端が開口
するケースと、一体に形成された抵抗器を有して前記ケ
ース内に収容され、端部が前記基板嵌入溝に保持され
回路基板と、一端が前記回路基板に固定され、他端が前
記ケースの開口部から外部に突出するリードと、前記ケ
ースの開口部にて前記基板に接触することなく前記リー
ドを保持するとともに、前記ケースの開口部を遮蔽する
硬質樹脂からなる蓋部と、前記ケース内に充填され、前
記回路基板全面を被覆する組成均一でゲル状の軟性樹脂
とを備えることを特徴とする電子回路装置。請求項2
記載の発明は請求項1記載の電子回路装置において更
に、前記蓋部と前記ケースとの接触部が、折れ曲がり構
造を有していることを特徴としている。請求項3記載の
発明は請求項1又は2記載の電子回路装置において更
に、前記柔軟性樹脂部は、シリコンゲルからなることを
特徴としている。
According to the first aspect of the present invention,
Have a substrate insertion groove for a circuit board held in the inner surface of one end opening
A case for being accommodated in the a resistor formed integrally casing, a circuit board end Ru held by the substrate insertion groove, one end of which is fixed to the circuit board, the other end before
A lead protruding from the opening of the case to the outside;
The lead without contacting the substrate at the opening of the source.
Holds the door and shields the opening of the case
A lid made of hard resin and filled in the case,
A uniform, gel-like soft resin that covers the entire surface of the circuit board
Electronic circuit device, characterized in that it comprises a part. Claim 2
The described invention is further improved in the electronic circuit device according to claim 1.
The contact portion between the lid and the case is bent.
It is characterized by having a structure. Claim 3
The invention further provides an electronic circuit device according to claim 1 or 2.
Preferably, the flexible resin portion is made of silicon gel.
Features.

【0013】本発明でいう抵抗器として、印刷後、焼成
して形成した厚膜抵抗体の他、各種PVD法やCVD法
で形成された薄膜抵抗体を採用することができる。これ
ら抵抗器は、回路基板に直接形成される。
As the resistor in the present invention, in addition to a thick film resistor formed by printing and firing, a thin film resistor formed by various PVD methods or CVD methods can be employed. These resistors are formed directly on the circuit board.

【0014】[0014]

【作用及び発明の効果】本発明では、回路基板がケース
内に挿入された状態で、柔軟性樹脂部がケース内に充填
され回路基板全面を被覆する。そして、硬質樹脂からな
る蓋部がケースの開口部を封止する。また、ケース内面
に設けられた基板嵌入溝は回路基板の端部を保持する。
According to the present invention, with the circuit board inserted into the case, the flexible resin portion is filled in the case and covers the entire surface of the circuit board. Then, the lid made of hard resin seals the opening of the case. The board fitting groove provided on the inner surface of the case holds the end of the circuit board.

【0015】このようにすれば、従来のように熱硬化収
縮性の封止樹脂部がケース内に充填されず、ただ柔軟性
樹脂部だけが充填されて回路基板が保護されるので、回
路基板に応力が加えられることがない。更に蓋部がケー
スの底面開口を遮蔽するので、柔軟性樹脂部及び回路基
板の保護とともにリードの固定を行うことができる。こ
れらの結果、応力による抵抗器の抵抗値変動を解消した
電子回路装置を実現できる。
In this case, unlike the conventional case, the thermosetting shrinkable sealing resin portion is not filled in the case, but only the flexible resin portion is filled to protect the circuit board. No stress is applied to the Further, since the lid covers the bottom opening of the case, the lead can be fixed while protecting the flexible resin portion and the circuit board. As a result, it is possible to realize an electronic circuit device in which the resistance value fluctuation of the resistor due to the stress is eliminated.

【0016】[0016]

【実施例】(実施例1)本発明の電子回路装置の一実施
例を図1〜図3に示す。この電子回路装置はハイブリッ
ドICであって、開口部10を有するケ−ス1と、ケ−
ス1内に収容された回路基板2と、ケ−ス1内に充填さ
れたシリコンゲル部(本発明でいう柔軟性樹脂部)3
と、ケース1の開口部10を遮蔽する蓋部6と、ケース
1の一端が回路基板2に固定され他端がシリコンゲル部
3を貫通して外部に突出するリード4とを備えている。
なお、図1では回路基板2の主面上のシリコンゲル部3
は剥離して図示している。
(Embodiment 1) One embodiment of an electronic circuit device of the present invention is shown in FIGS. This electronic circuit device is a hybrid IC, and includes a case 1 having an opening 10 and a case 1.
A circuit board 2 accommodated in a case 1 and a silicon gel portion (flexible resin portion in the present invention) 3 filled in the case 1
A lid 6 for shielding the opening 10 of the case 1; and a lead 4 having one end fixed to the circuit board 2 and the other end penetrating through the silicon gel portion 3 and protruding to the outside.
In FIG. 1, the silicon gel portion 3 on the main surface of the circuit board 2 is shown.
Is peeled off and shown.

【0017】ケ−ス1は、縦、横、高さが18mm×5
0mm×6mmの直方中空体形状を有し、底面が開口さ
れている。ケ−ス1の壁厚は約1mmで、PBT樹脂の
射出成形により形成されている。ケ−ス1の長手方向両
端に位置する両内端面には、一対のガイド突起11(図
3参照)が互いに平行に突設されている。ガイド突起1
1は縦、横、高さが2.4mm×7.1mm×0.8m
mとされ、一対のガイド突起11の間には回路基板2の
端部が嵌入される基板嵌入溝12が形成されている。
Case 1 has a length, width and height of 18 mm × 5.
It has a rectangular hollow body shape of 0 mm x 6 mm, and the bottom surface is open. Case 1 has a wall thickness of about 1 mm and is formed by injection molding of PBT resin. A pair of guide projections 11 (see FIG. 3) are provided on both inner end faces located at both longitudinal ends of the case 1 so as to project in parallel with each other. Guide protrusion 1
1 is 2.4mm x 7.1mm x 0.8m in height, width and height
m, a board fitting groove 12 into which an end of the circuit board 2 is fitted is formed between the pair of guide protrusions 11.

【0018】回路基板2はアルミナを素材とする単層も
しくは多層基板であって、回路基板2の両短辺21、2
2はそれぞれガイド突起対11の間に嵌入されて保持さ
れている。回路基板2の寸法は、縦、横、厚さ13mm
×47.5mm×0.8mmであり、その線膨張率は約
75×10-6/℃である。回路基板2には単層もしくは
多層の配線パタン(図示せず)が形成されている。回路
基板2の回路素子搭載面Aに回路基板2の短辺21に近
接して抵抗器R1〜R2が固定され、抵抗器R1、R2
上に保護ガラス9が被着されている。
The circuit board 2 is a single-layer or multilayer board made of alumina.
2 are fitted and held between the pair of guide projections 11, respectively. The dimensions of the circuit board 2 are 13 mm in length, width and thickness
× 47.5 mm × 0.8 mm, and its linear expansion coefficient is about 75 × 10 −6 / ° C. A single-layer or multi-layer wiring pattern (not shown) is formed on the circuit board 2. Resistors R1 and R2 are fixed on the circuit element mounting surface A of the circuit board 2 in the vicinity of the short side 21 of the circuit board 2, and the resistors R1 and R2 are fixed.
A protective glass 9 is attached on top.

【0019】抵抗器R1、R2は、縦、横、厚さが1.
5mm×0.85mm×10μmの長方形の膜からな
る。抵抗器R1、R2は図4に示すように、厚膜導体ペ
ーストをスクリーン印刷技術により形成され、焼成され
た厚膜抵抗体であって、それらの両端はAg,Ag/P
d,Cu,等を素材とする厚さ約10μmの配線層5に
接続されている。保護ガラス9は厚膜ガラスペーストを
焼成後で約10μmの厚さになる様に塗布し、摂氏50
0度で0.5時間加熱・焼成し、形成した。
The resistors R1 and R2 have a length, width and thickness of 1.
It is composed of a rectangular film of 5 mm × 0.85 mm × 10 μm. As shown in FIG. 4, the resistors R1 and R2 are thick film resistors formed by sintering a thick film conductor paste by screen printing technology, and the both ends thereof are Ag and Ag / P.
It is connected to a wiring layer 5 made of d, Cu, or the like and having a thickness of about 10 μm. The protective glass 9 is formed by applying a thick-film glass paste to a thickness of about 10 μm after baking,
It was formed by heating and firing at 0 degrees for 0.5 hours.

【0020】シリコンゲル部3は、ケ−ス1内へ回路基
板2を挿入後、ノズルによりシリコンゲル(商品名DT
087、東レ株式会社製)をケ−ス1内に注入し、摂氏
145度で40分熱硬化させて形成される。シリコンゲ
ル部3は図2に示すように、回路基板2の全面を完全に
被覆するまで注入され、ケース1の内部空間の上部(本
発明でいう開口部10)にはシリコンゲル部3が注入さ
れず、後述するように蓋部6が形成される。
After the circuit board 2 is inserted into the case 1, the silicon gel portion 3 is formed by a nozzle with a silicon gel (trade name DT).
087, manufactured by Toray Industries, Inc.) into the case 1 and thermally cured at 145 ° C. for 40 minutes. As shown in FIG. 2, the silicon gel portion 3 is injected until the entire surface of the circuit board 2 is completely covered, and the silicon gel portion 3 is injected into the upper part of the internal space of the case 1 (the opening 10 in the present invention). Instead, the lid 6 is formed as described later.

【0021】蓋部6は、シリコンゲル部3の硬化後、液
状エポキシ樹脂(商品名エコゲル、日本ペルノックス株
式会社製)をノズルにより注入し、摂氏125度で2時
間熱硬化させ、冷却して形成される。このエポキシ樹脂
の成形収縮率は約96%、線膨張率は約51×10-6
℃である。したがって、内端部が回路基板2に固定され
たリード4の中央部はこの蓋部6に固定され、リード4
の外端部が外部に突出している。
The cover 6 is formed by injecting a liquid epoxy resin (trade name: Ecogel, manufactured by Nippon Pernox Co., Ltd.) through a nozzle after the silicone gel 3 has been cured, thermally curing at 125 ° C. for 2 hours, and cooling. Is done. The molding shrinkage of this epoxy resin is about 96%, and the linear expansion coefficient is about 51 × 10 −6 /
° C. Therefore, the center of the lead 4 whose inner end is fixed to the circuit board 2 is fixed to the lid 6 and the lead 4
Has an outer end protruding outside.

【0022】上記した回路基板2上の回路は、モノリシ
ックのオペアンプOPと、抵抗器R1〜R2をもつ初段
センスアンプを構成し、このオペアンプ増幅回路の電圧
増幅率kは、抵抗器R1〜R2により決定される。以
下、本実施例の特徴点を説明する。上記したようにこの
実施例では、ケース1の内部空間にはその開口部10を
除いてシリコンゲル部3が充填されている。したがっ
て、従来のようにエポキシ樹脂からなるモールド樹脂部
の収縮により回路基板1が反り、それにより抵抗器R
1、R2の抵抗値が変動することがない。
The circuit on the circuit board 2 constitutes a monolithic operational amplifier OP and a first-stage sense amplifier having resistors R1 and R2. The voltage amplification factor k of this operational amplifier amplifier circuit is determined by the resistors R1 and R2. It is determined. Hereinafter, features of the present embodiment will be described. As described above, in this embodiment, the interior space of the case 1 is filled with the silicon gel portion 3 except for the opening 10. Therefore, the circuit board 1 warps due to the shrinkage of the mold resin portion made of epoxy resin as in the prior art, and the resistor R
1, the resistance value of R2 does not change.

【0023】またこの実施例では、液状エポキシ樹脂の
ポッティングによりケース1の開口部10が封止され
て、更にリード4が固定されている。したがって、回路
基板1はこのリード4を通じて蓋部6に固定される。な
お、この実施例では、ガイド突起対11間の基板嵌入溝
12の幅は回路基板1の厚さよりも大きくされており、
これにより、外力による回路基板1の変位を防止してい
る。
In this embodiment, the opening 10 of the case 1 is sealed by potting of a liquid epoxy resin, and the lead 4 is further fixed. Therefore, the circuit board 1 is fixed to the lid 6 through the leads 4. In this embodiment, the width of the board fitting groove 12 between the pair of guide projections 11 is larger than the thickness of the circuit board 1.
This prevents displacement of the circuit board 1 due to external force.

【0024】以上の結果として、抵抗器R1、R2の上
記変動によるこのオペアンプ電圧増幅回路からなる初段
センスアンプの電圧増幅率のばらつきを解消することが
できた。通常、微小な入力信号電圧又は信号電流を増幅
する初段センスアンプの電圧増幅率はより大きな信号電
圧を扱うその後の回路段に比べて格段に高い安定度が要
求されるが、本実施例によれば電圧増幅率のばらつきを
大幅に低減でき、このような初段センスアンプに好適で
ある。
As a result, the variation in the voltage amplification factor of the first-stage sense amplifier comprising the operational amplifier voltage amplifier circuit due to the above-described fluctuation of the resistors R1 and R2 could be eliminated. Normally, the voltage amplification rate of the first-stage sense amplifier that amplifies a minute input signal voltage or signal current requires much higher stability than the subsequent circuit stages that handle a larger signal voltage. Thus, variations in the voltage amplification factor can be greatly reduced, and this is suitable for such a first-stage sense amplifier.

【0025】(実施例2)他の実施例を図4に示す。こ
の実施例では、ケース1の開口部10の周囲に二重壁部
19を設け、この二重壁部19の間の溝にも蓋部6を嵌
入させたものである。このようにすれば、蓋部6とケー
ス1との接触面積が増加し、かつ、両者が噛合するの
で、接合の強化及び内部の防湿性の向上を図ることがで
きる。
(Embodiment 2) FIG. 4 shows another embodiment. In this embodiment, a double wall 19 is provided around the opening 10 of the case 1, and the lid 6 is fitted into a groove between the double walls 19. By doing so, the contact area between the lid 6 and the case 1 increases, and the two mesh with each other, so that it is possible to enhance the bonding and improve the moisture resistance inside.

【図面の簡単な説明】[Brief description of the drawings]

【図1】実施例1を示す断面図、FIG. 1 is a sectional view showing a first embodiment;

【図2】実施例1を示す断面図、FIG. 2 is a sectional view showing Example 1.

【図3】実施例1を示す断面図、FIG. 3 is a sectional view showing the first embodiment;

【図4】他の実施例を示す断面図、FIG. 4 is a sectional view showing another embodiment;

【図5】従来のハイブリッドICの断面図、FIG. 5 is a sectional view of a conventional hybrid IC,

【図6】回路基板への曲げ力と抵抗器の抵抗値変化率と
の関係を試験するための試験装置を示す模式図、
FIG. 6 is a schematic view showing a test apparatus for testing a relationship between a bending force applied to a circuit board and a resistance value change rate of a resistor;

【図7】図6の試験装置による試験結果を示す特性図、FIG. 7 is a characteristic diagram showing test results obtained by the test apparatus of FIG. 6,

【図8】回路基板への変位量(厚さ方向)と抵抗器の抵
抗値変化量との関係を示す特性図、
FIG. 8 is a characteristic diagram showing a relationship between a displacement amount (thickness direction) to a circuit board and a resistance change amount of a resistor;

【図9】回路基板の湾曲に伴い抵抗器に加わる応力の回
路基板の長手方向への変化を示す特性図、
FIG. 9 is a characteristic diagram showing a change in a stress applied to the resistor in accordance with the bending of the circuit board in a longitudinal direction of the circuit board;

【符号の説明】[Explanation of symbols]

1はケース、2は回路基板、3はシリコンゲル部(柔軟
性樹脂部)、4はリード、R1、R2は抵抗器、6は蓋
部、
1 is a case, 2 is a circuit board, 3 is a silicon gel part (flexible
RESIN portion), 4 is read, R1, R2 are resistors, 6 lid,

───────────────────────────────────────────────────── フロントページの続き (72)発明者 伴 博行 愛知県刈谷市昭和町1丁目1番地 日本 電装株式会社内 (72)発明者 岡 賢吾 愛知県刈谷市昭和町1丁目1番地 日本 電装株式会社内 (56)参考文献 特開 平3−225943(JP,A) 特公 昭50−8495(JP,B1) (58)調査した分野(Int.Cl.7,DB名) H01L 23/28 H01L 23/29 H01L 23/31 H01L 21/56 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hiroyuki Ban 1-1-1 Showa-cho, Kariya-shi, Aichi Japan Inside Denso Corporation (72) Inventor Kengo Oka 1-1-1, Showa-cho, Kariya-shi, Aichi Japan Nihon Denso Co., Ltd. (56) References JP-A-3-225943 (JP, A) JP-B-50-8495 (JP, B1) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 23/28 H01L 23 / 29 H01L 23/31 H01L 21/56

Claims (3)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】内面に回路基板保持用の基板嵌入溝を有
し、一端が開口するケースと、一体に形成された 抵抗器を有して前記ケース内に収容さ
、端部が前記基板嵌入溝に保持される回路基板と、一端が前記回路基板に固定され、他端が前記ケースの開
口部から外部に突出するリードと、 前記ケースの開口部にて前記基板に接触することなく前
記リードを保持するとともに、前記ケースの開口部を遮
蔽する硬質樹脂からなる蓋部と、 前記ケース内に充填され、前記回路基板全面を被覆する
組成均一でゲル状の軟性樹脂部 とを備えることを特徴と
する電子回路装置。
An inner surface has a board insertion groove for holding a circuit board.
And, a case one open end, is accommodated in the a resistor formed integrally casing, a circuit board end Ru held by the substrate insertion groove, one end is fixed to the circuit board , The other end of the case
A lead protruding from the mouth to the outside, and without contacting the substrate at the opening of the case;
Hold the lead and block the opening of the case.
A lid made of a hard resin to be covered, and filled in the case to cover the entire surface of the circuit board
An electronic circuit device comprising: a gel-like soft resin portion having a uniform composition .
【請求項2】請求項1記載の電子回路装置において、2. The electronic circuit device according to claim 1, wherein 前記蓋部と前記ケースとの接触部は、折れ曲がり構造をThe contact portion between the lid and the case has a bent structure.
有していることを特徴とする電子回路装置。An electronic circuit device comprising:
【請求項3】請求項1又は2記載の電子回路装置におい3. The electronic circuit device according to claim 1, wherein:
て、hand, 前記柔軟性樹脂部は、シリコンゲルからなることを特徴The flexible resin portion is made of silicon gel.
とする電子回路装置。Electronic circuit device.
JP4198511A 1992-07-15 1992-07-24 Electronic circuit device Expired - Lifetime JP3047632B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP4198511A JP3047632B2 (en) 1992-07-24 1992-07-24 Electronic circuit device
US08/091,718 US5483217A (en) 1992-07-15 1993-07-15 Electronic circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4198511A JP3047632B2 (en) 1992-07-24 1992-07-24 Electronic circuit device

Publications (2)

Publication Number Publication Date
JPH0645477A JPH0645477A (en) 1994-02-18
JP3047632B2 true JP3047632B2 (en) 2000-05-29

Family

ID=16392359

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4198511A Expired - Lifetime JP3047632B2 (en) 1992-07-15 1992-07-24 Electronic circuit device

Country Status (1)

Country Link
JP (1) JP3047632B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004281563A (en) * 2003-03-13 2004-10-07 Alps Electric Co Ltd Electronic circuit unit and method of manufacturing the same
JP6162659B2 (en) * 2014-07-29 2017-07-12 日立オートモティブシステムズ株式会社 Power semiconductor module

Also Published As

Publication number Publication date
JPH0645477A (en) 1994-02-18

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