JP3051780B2 - Display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a display equipment which is utilized on a display or the like, in particular, by also in the case of performing display of multi-screen is controlled by a single CRT controller, the cost reduction and the device Miniaturized, placed adjacent
It relates to a display equipment which can prevent fluctuation of a screen due to the induction noise in the plurality of CRT that.

[0002]

2. Description of the Related Art A conventional display device will be described with reference to FIG. FIG. 2 is a configuration block diagram of a conventional display device. A conventional display device for controlling a plurality of CRTs (Cathode Ray Tubes) includes n CRTs 1 as a display unit.
And n display RAMs 2 connected to each CRT 1 and storing data to be displayed on each CRT 1, and a shift for converting parallel data from the display RAM 2 into serial data for display on the CRT 1 and sending the serial data to the corresponding CRT 1 Register (SR = Sift Register) 3 and n CRT controllers (CRTCs) for controlling each CRT 1
= Cathode Ray Tube Controller) 4 and a central CPU 5 for controlling each CRTC 4.

A CRTC 4 is provided so as to correspond to each CRT 1 one by one, and supplies a control signal to a corresponding display RAM 2. A timing signal (a horizontal synchronization signal, a vertical synchronization signal, a vertical synchronization signal) indicating a display timing is given to the corresponding CRT 1. Signal, etc.).

Next, a display control method in the display device having the configuration shown in FIG. 2 will be described. The display data to be displayed on the CRT 1 is written in the display RAM 2 in advance, and the CRTC 4 specifies the address of the display RAM 2, and the display data at the address is output to the shift register 3 as parallel data. After converting to data, it is sent to CRT1. The CRT 1 displays serial data according to the timing signal from the corresponding CRTC 4. In the conventional display device and its display control method, the n CRTs can perform independent display operations independently of each other.

[0005]

However, according to the above-mentioned conventional display device and its display control method, when a plurality of CRTs 1 are displayed at the same timing, for example, each CRTC 4 operates independently from the CRTC 4 by an independent operation. As a result, an asynchronous timing signal is transmitted to the CRT 1.
There is a problem that the mutual induction of the magnetic field occurs and the screen of the CRT 1 fluctuates.

In the conventional display device, since the CRTC 4 is individually provided for each CRT 1, the cost increases.
Another problem is that it is difficult to reduce the size of the device.

The present invention has been made in view of the above circumstances, and when displaying a plurality of CRTs arranged adjacently at the same timing, it is possible to eliminate screen fluctuations due to induction noise and reduce the number of CRTCs to reduce costs. and to provide a display equipment which can be reduced and miniaturization of devices.

[0008]

According to a first aspect of the present invention, there is provided a display apparatus, comprising: a plurality of CRTs which are installed adjacent to each other as display means; And a single CRT controller connected to the plurality of CRTs via a common wiring and connected to the plurality of memories via a common wiring. Ah is, the single CRT controller, to respond to each CRT
Should be displayed on each CRT according to the address of the memory
Display data is written and stored in each of the memories in advance, and a control signal for controlling the plurality of memories is transmitted in common, and a timing signal for controlling display timing is transmitted in common to the plurality of CRTs arranged adjacent to each other. CR
Ri Ah in T controller, to each of the memory the control signal
Display data stored at the address of each memory
Output memory, wherein each of the CRTs has the timing
The display data output from each memory is displayed by the signal.
It is characterized in Shimesuru CRT der Rukoto.

[0009]

[0010]

According to the first aspect of the present invention, a single CRT controller is connected to a plurality of CRTs arranged adjacently and a plurality of memories corresponding to the respective CRTs via common wiring, respectively. A single CRT controller is responsible for each CR
Display data is reserved according to the memory address corresponding to T.
The memory is written and stored in each memory, and a control signal for controlling the memory is transmitted to a plurality of memories in common.
A timing signal for controlling the display timing in the CRT is commonly transmitted to a plurality of CRTs arranged adjacent to each other, and each memory
The display data stored in each memory address by the control signal
And each CRT is output by a timing signal.
Since the display device displays the displayed display data ,
The number of RT controllers can be reduced to reduce the cost and the size of the apparatus. Further, the same control signal can be sent to a plurality of memories, and a plurality of CRs arranged adjacent to each other can be transmitted.
T can send all in-phase timing signals to T,
Mutual induction of magnetic fields in a plurality of CRTs arranged adjacent to each other can be prevented, and fluctuation of the screen can be eliminated.

[0011]

[0012]

An embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a configuration block diagram of a display device according to an embodiment of the present invention. The display device according to the present embodiment includes n CRTs (C1 to Cn) 1 as a display unit, and each CRT.
1, display RAMs (R1 to Rn) 2 for storing data to be displayed on each CRT 1, and n shift registers (S1) for converting parallel data from the display RAM 2 into serial data to be displayed by the CRT 1. ~ Sn) 3
And one CRT controller (CRTC) 4 for controlling each CRT 1 and a central CPU for controlling the CRTC 4
And 5.

Each CRT 1 is connected to a corresponding display RAM 2 via a shift register 3, and displays the data stored in the display RAM 2. Furthermore, each display RAM
2 is connected to CRTC4, and CRTC4 is connected to CPU5.

The CRTC 4 has all display RAMs (R1 to R1).
Rn) 2 and all the CRTs (C1 to Cn) 1 to send a control signal to each display RAM 2 via a common wire, and send an in-phase timing signal to each CRT 1 via a common wire. It is supposed to. That is, all display RAMs 2 and all CRTs 1 can be controlled by one CRTC.

Next, a display control method of the display device of this embodiment will be described. The display control method of the display device of the present embodiment is such that one CRTC 4 displays all n CRTs 1 at the same timing. The contents to be displayed on the n CRTs 1 are written and accumulated in advance in the display RAMs corresponding to the respective CRTs 1 according to their addresses. That is, the content to be displayed on the CRT 1 is
The data is written in the display RAM 2 connected to T1.

A control signal is sent from the CRTC 4 to each display RAM 2 in common, and an address of each display RAM 2 is designated, so that display data stored at the address is output to the shift register 3 as parallel data. Each shift register 3 converts the input parallel data into serial data to be actually displayed according to the clock from the CRTC 4 and sends the serial data to the CRT 1.

When a common timing signal is sent from the CRTC 4 to all of the n CRTs 1 via the common wiring, all the n CRTs 1 display serial data at the same timing. That is, all the CRTs 1 are controlled by the synchronous timing signal.

According to the display device and the display control method of the present embodiment, one CRTC 4 sends a control signal to all display RAMs 2 corresponding to a plurality of CRTs 1 and a common control signal is sent to all the plurality of CRTs 1. Since the CRT display control method for transmitting a timing signal is employed, a synchronous timing signal can be transmitted to all of a plurality of CRTs 1 disposed adjacent to each other, and a screen generated by mutual induction of magnetic fields by an asynchronous timing signal can be displayed. There is an effect that fluctuation can be eliminated.

Further, all of the plurality of CRTs 1 are replaced with one CR.
Since control is performed by the TC4, compared to the conventional display device, C
The cost can be reduced by reducing the number of RTCs,
Further, there is an effect that the device can be downsized.

[0020]

According to the first aspect of the present invention, a single CRT controller is connected to a plurality of adjacent CRTs and a plurality of memories corresponding to the respective CRTs via common wiring. , the single of the CRT controller,
Display data according to the memory address corresponding to each CRT
Data is stored in advance in each memory, and a control signal for controlling the memory is sent to a plurality of memories in common.
A timing signal for controlling the display timing on the CRT is commonly transmitted to a plurality of CRTs arranged adjacent to each other, and each
Memory is stored at the address of each memory by the control signal
Display data is output, and each CRT is
Since the display device is configured to display the output display data, the number of CRT controllers can be reduced to reduce the cost, the size of the device can be further reduced, and the same control signal can be sent to a plurality of memories. The in-phase timing signals can all be transmitted to a plurality of CRTs arranged adjacently, so that mutual induction of magnetic fields in a plurality of CRTs arranged adjacently can be prevented, and there is an effect that a fluctuation of a screen can be eliminated. .

[0021]

[Brief description of the drawings]

FIG. 1 is a configuration block diagram of a display device according to an embodiment of the present invention.

FIG. 2 is a configuration block diagram of a conventional display device.

[Explanation of symbols]

1. CRT, 2. Display RAM, 3. Shift register, 4. CRT controller, 5. CPU

Claims (1)

(57) [Claims] 1. A plurality of CRTs installed adjacent to each other as display means, a plurality of memories respectively storing display data corresponding to the respective CRTs, and a plurality of CRTs connected via a common wiring to the plurality of CRTs, A display device comprising: a single CRT controller connected to the plurality of memories via a common wiring, wherein the single CRT controller corresponds to each of the CRTs
Display on each CRT according to the memory address
Display data is written and stored in each of the memories in advance,
A control signal for transmitting a control signal for controlling the plurality of memories in common, and for commonly transmitting a timing signal for controlling display timing to the plurality of CRTs disposed adjacent to each other.
Ri Ah at RT controller, each memory by the control signal of the respective memory address
A memory for outputting display data stored in a memory, and wherein each of the CRTs is provided with a corresponding one of the memories in response to the timing signal.
Display device comprising CRT der Rukoto displaying output display data from.