JP3052834B2 - Shared input / output interface circuit for semiconductor inspection equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to a shared input / output interface circuit of a semiconductor inspection apparatus which is applied to a case where a load circuit 7 is connected to input / output terminals of the semiconductor device 3 and a case where input / output terminals of a semiconductor 3 to be inspected are resistance-terminated in two directions.

[0002]

2. Description of the Related Art FIG. 6 shows a configuration of an input / output interface terminating circuit of a conventional semiconductor inspection apparatus. 6 is a semiconductor to be inspected, 11 is an input / output interface circuit, and 20 is a test board.

In FIG. 6, an input / output interface circuit 11
Is a driver 1 that outputs to the terminal 10A, a comparator 2 that inputs a signal from the terminal 10A, a resistor R1 that connects one end to the output terminal of the driver 1 and an input terminal of the comparator 2, and one end to the other end of the resistor R1. , A voltage source 9 connected to the other end of the switch 4, and a transmission source 8 connected to the terminal 10B. The driver 1 is supplied with a signal to be input to the semiconductor 3 to be inspected from an external control circuit (not shown), and the comparator 2 outputs a determination result of the semiconductor 3 to be inspected to an external control device (not shown).

The test board 20 is connected to the terminals 1 of the I / O interface circuit 11 from the terminals of the semiconductor 3 to be inspected.
0A, a switch 5 connecting one end to the terminal 10A of the input / output interface circuit 11,
A load circuit 7 connected to the other end of the switch 5 and a terminal 10C connecting the semiconductor 3 under test are provided.

The switch 5 of the test board 20 has a connection control terminal 5A. The switch 5 is connected to a terminal 10B of the input / output interface circuit 10 to which the output of the transmission source 8 is connected. The switch 5 is opened and closed by a signal. By opening and closing switch 5,
The load circuit 7 is connected to and disconnected from the transmission line Z1.

Next, the operation of the semiconductor inspection apparatus will be described with reference to FIG. When the semiconductor 3 under test is in a signal writing state, the driver 1 of the input / output interface circuit 11 outputs a signal from an external control device (not shown) to the semiconductor 3 under test via the transmission line Z1. In addition, the semiconductor 3 to be inspected
In the signal readout state, a signal sent from the semiconductor 3 to be inspected via the transmission line Z1 is input to the comparator 2 of the input / output interface circuit 11 to determine the quality of the signal.

At this time, the output of the semiconductor 3 to be inspected is
When the resistance termination is performed, the switch 4 is turned on, the resistance R1 is connected to the voltage source 9, and the semiconductor 3 to be inspected is inspected. Further, by inputting a load circuit connection control signal from the control signal source 8 to the terminal 5A of the switch 5 and turning on the switch 5, the load circuit 7 is connected to the output of the semiconductor 3 to be inspected via the transmission line Z1 and the inspection is performed. I do. With these functions, one terminal of the semiconductor 3 to be inspected is inspected.

In FIG. 6, the configuration of the test board 20 is a general example of a transmission line Z1, a switch 5, and a load circuit 7.
However, since the content of the test differs depending on the type of the semiconductor 3 to be inspected, the configuration of the test board is changed correspondingly. Therefore, the test board 20
It is prepared for each type of the semiconductor 3 to be inspected.

[0009]

For example, the semiconductor to be inspected is SSTL (Stub Series Terminated Logic) or GTL.
In the case of a high-speed, small-amplitude bus interface such as the (Gunning Transceiver Logic), the semiconductor test equipment uses the bus shown in FIG.
As shown in (2), it is necessary to perform a test by resistance termination in two directions. However, in the configuration of the input / output interface circuit 11 of FIG. 6, only one transmission line can be resistance-terminated. Therefore, the input / output interface circuit 11
In order to realize a test such as SSTL or GTL by using, the configuration shown in FIG. 5 is required.

In FIG. 5, the test board 21 is SSTL or G
To test the TL, transmission lines Z1 and Z2 are provided. The terminal 10A is connected to the driver 1A of the input / output interface circuit 11A, and the terminal 10B is connected to the driver 1B of the input / output interface circuit 11B in order to terminate the transmission lines Z1 and Z2 by resistance.

As described above, the semiconductor to be inspected is SSTL or G
In the case of a high-speed, small-amplitude bus interface such as TL,
There is a problem that two input / output interface circuits connected to the semiconductor inspection device 3 are required for each terminal.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a shared input / output interface circuit for performing resistance termination connection in two directions without increasing the number of input / output interface circuits when inspecting a semiconductor that requires termination in two directions. And

[0013]

In order to achieve this object, the present invention provides a driver 1 for outputting a signal to a terminal 10A, a comparator 2 for judging the quality of a signal input to a terminal 10A, A resistor R1 having one end connected to the input terminal, a switch 4 connected to the other end of the resistor R1, a voltage source 9 for applying a voltage to the resistor R1 when the switch 4 is on, and a resistor having one end connected to the voltage source 9. R2,
Control signal source 8 and common terminal 6A connected to terminal 10B
And a switch 6 having a contact 6C for connecting the other end of the resistor R2 and a contact 6B for connecting the output of the control signal source 8.

[0014]

Next, a shared input / output interface circuit of a semiconductor inspection apparatus according to an embodiment of the present invention will be described with reference to FIG. 1 is a driver, 2 is a comparator, 4 and 6 are switches, 8 is a control signal source, 9 is a voltage source, and R1 and R2 are termination resistors. In FIG. 1, the driver 1, comparator 2, switch 4, resistor R1, control signal source 8, and voltage source 9 are the input / output interface circuit 11 of FIG.
The same as the above, the driver 1, the comparator 2, the resistor R1
The connection relation between the switch 4 and the voltage source 9 is the same.

One end of the resistor R2 is connected to a voltage source 9.
The switch 6 switches between a contact 6C connected to the other end of the resistor R2 and a contact 6B connected to the control signal source 8, and by connecting the common terminal 6A of the switch 6 to the contact 6B, the control signal source 8 is connected to the terminal 10B. By connecting the common terminal 6A of the switch 6 to the contact 6C, the resistor R2 connected to the voltage source 9 is connected to the terminal 10B.

Next, the use state of the shared input / output interface circuit 10 of FIG. 1 will be described with reference to FIGS. FIG. 2 is a configuration diagram of a semiconductor test apparatus in which the test board 20 is connected to the shared input / output interface circuit 10 when testing the semiconductor 3 under test described with reference to FIG. 7 is a configuration diagram in the case of inspecting a semiconductor that requires connection 7; FIG.

In FIG. 2, the shared input / output interface circuit 1
0 is connected to the test board 20 including the transmission line Z1, the switch 5, and the load circuit 7. Here, the common terminal 6A of the switch 6 is connected to the contact 6B, and the load circuit connection control signal from the control signal source 8 is input to the terminal 5A of the switch 5 through the terminal 10B of the shared input / output interface circuit 10. By turning on the switch 5 under the control of the signal input to the connection control terminal 5A, the load circuit 7 is connected to the input / output terminal of the semiconductor 3 under test via the transmission line Z1 to perform the test.

The configuration of FIG. 2 is the same as that of FIG. 6 by connecting the test board 20 to the shared input / output interface circuit 10 and connecting the common terminal 6A of the switch 6 to the contact 6B.

FIG. 3 is a configuration diagram of a semiconductor test apparatus in which the test board 21 is connected to the shared input / output interface circuit 10 when testing the semiconductor 3 to be inspected described with reference to FIG. FIG. 2 is a configuration diagram in the case of inspecting a semiconductor 3 to be inspected which requires a resistance termination in the voltage source 9.

In FIG. 3, the shared input / output interface circuit 1
0 is connected to a test board 21 having a transmission line Z1 and a transmission line Z2. Here, by connecting the common terminal 6A of the switch 6 to the contact 6C, one end of the transmission line Z1 of the test board 21 is connected to the input / output terminal of the semiconductor 3 to be inspected, and another switch is turned on while the switch 4 is on. One end of the transmission line Z2 of the test board 21 is connected to the input / output terminal of the semiconductor device 3 under test, and the other end is connected to the voltage source 9 via the resistor R1.
And is connected to the voltage source 9 via the second terminal. With the above connection, the inspection is performed in a state where the input / output terminals of the semiconductor 3 to be inspected are terminated in two directions.

The configuration of FIG. 3 is the same as the configuration of FIG. 4 by connecting the test board 21 to the shared input / output interface circuit 10 and connecting the common terminal 6A of the switch 6 to the contact 6C.

[0022]

According to the present invention, a switch is provided in the input / output interface circuit, so that a semiconductor requiring termination in two directions, such as a high-speed and small-amplitude bus interface, is inspected, and a load is applied to the semiconductor to be inspected. In a case where a test is performed by connecting circuits, for example, by switching a switch of the input / output interface circuit, both types of semiconductors can be inspected without increasing the number of input / output interface circuits.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a shared input / output interface circuit of a semiconductor inspection device according to the present invention.

FIG. 2 is a configuration diagram of a shared input / output interface circuit for performing a load circuit connection test by connecting a test board 20;

FIG. 3 is a configuration diagram of a shared input / output interface circuit for performing a two-way termination connection test by connecting a test board 21;

FIG. 4 is a configuration diagram of a circuit that implements two-way termination.

FIG. 5 is a configuration diagram of a two-way termination by an input / output interface circuit of a semiconductor inspection apparatus according to the related art.

FIG. 6 is a configuration diagram of a load circuit connection test of an input / output interface of a semiconductor test apparatus according to a conventional technique.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Driver 2 Comparator 3 Semiconductor under test 4-6 Switch 5A Connection control terminal 6A Common terminal 6B / 6C Contact 7 Load circuit 8 Control signal source 9 Voltage source 10.11 Input / output interface circuit 10A / 10B / 10C terminal 20/21 Test Board R1, R2 Resistance Z1, Z2 Transmission line

Claims (2)

(57) [Claims] A driver for outputting a signal to a terminal (10A)
(1), a comparator (2) for judging the quality of a signal input to the terminal (10A), a first resistor (R1) having one end connected to the input terminal of the comparator (2), and a first resistor. A switch (4) connected to the other end of (R1), a voltage source (9) that applies a voltage to the first resistor (R1) when the switch (4) is on, and one end connected to the voltage source (9) A second resistor (R2), a control signal source (8), a common terminal (6A) connected to the terminal (10B), and a second resistor (R2).
And a switch (6) having a second contact (6B) connecting the output of the control signal source (8) and a first contact (6C) connecting the other end of the semiconductor inspection device. Shared input / output interface circuit. 2. An input / output interface circuit terminal (10A · 1
0B), connect a test board with a different circuit configuration according to the type of semiconductor to be tested, and connect the semiconductor to be tested (3) to the terminal (10C). In the semiconductor inspection apparatus, the output of the driver (1) is applied to the semiconductor device (1), and the output from the input / output terminal of the semiconductor (3) to be inspected is judged by the comparator (2) in a signal reading state. When connecting the load circuit (7) to the output terminal, the transmission line (Z) connects the input / output terminal of the semiconductor under test (3) and the terminal (10A) of the input / output interface circuit (10).
1), connect one end between terminal (10A) and transmission line (Z1),
A switch (5) driven by a signal input to the connection control terminal (5A), and a load circuit (7) connected to the other end of the switch (5)
Test board (20) with
(10), connect the common terminal (6A) of the switch (6) to the second contact (6B), and switch the load circuit connection control signal from the control signal source (8) via the terminal (10B). (5) Connection control terminal
(5A) to turn on switch (5) and load circuit (7)
Is connected to the input / output terminal of the semiconductor under test (3) via the transmission line (Z1), and the input / output terminal of the semiconductor under test (3) is terminated in two directions by resistance. Transmission line (Z1) connecting output terminal and terminal (10A) of input / output interface circuit (10)
And a second transmission line connected to the input / output terminal of the semiconductor under test (3) and the terminal (10B) of the input / output interface circuit (10).
Connect the test board (21) equipped with (Z2) to the input / output interface circuit (10), turn on the switch (4), and connect the common terminal (6A) of the switch (6) to the first contact (6C). And connect a second resistor (R2) connected to the voltage source (9) to the transmission line.
The shared input / output interface circuit of the semiconductor inspection apparatus according to claim 1, wherein the circuit is connected to (Z2).