JP3053283B2 - Coded multi-level modulator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a coded multi-level modulation device used in a digital data communication system or the like.

[0002]

2. Description of the Related Art A multi-level modulation scheme represented by a multi-level QAM scheme is widely used in the field of digital microwave communication and the like. In order to overcome the problem of residual errors due to the nature and the like, the error correction method has been a powerful technique. In a system such as a digital microwave communication system having a strict band limit, an error correction method which has a band expansion ratio by encoding as small as possible and has a high correction capability is desired. There is a coded modulation method as a method satisfying this requirement. Typical examples of coded modulation schemes include the multi-level coded modulation scheme proposed by Imai and Hirakawa and G.I. Ungerboeck (G.
Ungerboeck) proposed a trellis coded modulation scheme.

In the multi-level coded modulation scheme proposed by Imai and Hirakawa, as shown in FIG. 5, a plurality of m block encoders having different error correction capabilities are arranged in accordance with the error probability of each signal sequence. This is a coded modulation method for independently coding each signal sequence. The rate converter outputs signals to the respective encoders at different rates so that the rates of the m signal sequences input to the mapping apparatus become equal. In this method, a high error correction capability can be realized with a relatively small redundancy by distributing the redundancy by encoding non-uniformly. (For example, see the paper "I.N.E.E.E. Transactions on Information Theory," Vol. A New Multilevel
Coding Method Using Error Correcting Codes) ”), while G. Ungerboeck
Gerboeck) proposes a trellis coded modulation scheme as shown in FIG.
As shown in FIG. 1, an m-bit signal sequence obtained by combining a binary convolutional encoder output and uncoded bits is assigned to 2 ^m multilevel modulation signal points using a mapping method called set partitioning. Thus, a high coding gain can be obtained without expanding the band. here,
Set partitioning refers to 2 ^k (k) points where 2 ^m signal points are selected to be as far apart from each other as possible.
≤ m), a group is selected from 2 ^k groups by k bits convolutionally coded in the m-bit signal sequence, and then mk uncoded bits in the group are used in the group. 1 out of 2 ^mk signal points
This is a mapping method in which points are assigned to be selected. Regarding the trellis coded modulation method, for example, IEE Communication Magazine (IEEE COMMU
NICATION MAGAZINE) Vol. 25 No. 2 G. An article written by G. Ungerboeck, “Trellis Coding Modulation with Redundant Signal Sets, Part I and II (Trellis Coding Mod
ulation With redundant signal sets part I II) ”.

However, when the above-mentioned trellis coded modulation method is applied to digital microwave communication, as a problem to be solved, the noise margin in the modem design is reduced due to the multi-valued modulation signal point, and the requirements for each part of the circuit are severe. Problem arises. Further, in digital microwave communication, a slight band expansion by encoding is allowed, and it is expected that a higher encoding gain will be obtained by effectively using this. Focusing on these points, Nakamura, Aikawa, Takanashi et al. Used the SPORT-QAM method as an encoding and modulation method for digital microwave communication (for example, Nakamura, Aikawa, Takanashi of IEICE Technical Report IT88-94). The report is described in “Study of Trellis Coded 256 QAM Demodulation System”.) In this system, a m-bit digital signal sequence is input in a multi-level modulation system having 2 ^m signal points, and a speed converter that outputs m-1 bits, and a m-1 bit digital signal sequence The coding rate k / (k +
The convolutional coding is performed in 1), the upper mk-1 bits are not coded, and when the entire coded / uncoded bits are viewed, the coding rate (m- 1) / m
And a convolutional encoder that outputs m bits.
This is a coded modulation method that maps the output of the m-bit convolutional encoder onto 2 ^m signal point planes based on set partitioning in the same manner as the trellis coded modulation method. It is characterized in that the entire information rate after encoding is compensated by a rate converter to be the same as that of an uncoded multilevel modulation scheme having 2 ^m signal points. However, in this method, it is necessary to increase the speed of the entire encoder output signal including the redundant component by convolutional coding in order to equalize the information speeds of the input of the speed converter and the output of the convolutional encoder. As a result, there arises a problem that a band is expanded beyond an allowable range in a band-limited communication channel. FIG. 3 shows an embodiment of the SPORT-256QAM system. This will be specifically described with reference to the example of FIG. In this case, m = 8 and k = 2. In FIG. 3, a digital signal sequence 301 is input to a serial / parallel converter 302 at a speed of 8 Ro bit / sec, and is converted into an 8-bit digital signal sequence having a speed of each bit Ro bit / sec. The signal is input to a signal generator 303, the speed of the signal is converted, and a 5-bit signal sequence 304 (each bit 8
o / 7 bit / sec) and 2-bit signal sequence 305 (each bit)
8Ro / 7 bit / sec) is a 7-bit output signal sequence. The signal sequence 304 is directly used by the direct mapping device 30.
8 and the signal sequence 305 has a coding rate r ′ = ２.
Is input to the narrow sense convolutional encoder 306. The narrow sense convolutional encoder 306 outputs a 3-bit signal sequence 307 at the same speed after performing convolutional coding on the signal sequence 305. As a result, the coding rate r of the broad sense convolutional encoder 310 is r = m / m-1, that is, 7/8. The mapping device 308 receives the signal sequences 304 and 307 as inputs,
28-level modulated signal 30 with mapping based on set partitioning and having a speed of 64 Ro / 7 bit / sec ( ⁸ Ro / 7 baud)
9 is output.

[0005]

SUMMARY OF THE INVENTION However, SPO
In the RT-256QAM system, the signal sequence 30 in FIG.
9, the information rate is the same as that of the signal sequence 302, but since a redundant component is added by convolutional coding, the overall rate is increased by a factor of 8/7. This increase in the speed causes an increase in the band, which is a problem in a digital microwave communication system in which the band is severely limited. In a digital microwave communication system, the band expansion rate is normally suppressed to about 110%, but in the SPORT-256QAM system, the band expansion rate is 114%.
%, The authors in the above (IEICE Technical Report IT88-94) argue that the problem is dealt with by changing the roll-off rate (for example, from 0.5 to 0.3). I have. However, in this method, when a phase error from the optimum sampling timing at the time of identification occurs, it becomes a factor of causing an error, and a new problem arises that the error becomes more likely as the number of multi-values increases.

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem. In a system for transmitting a signal by combining a band expansion by a speed converter and a trellis coded multilevel modulation method, a band associated with the speed conversion is transmitted. It is an object of the present invention to provide a coded multi-level modulation device capable of reducing expansion.

[0007]

[MEANS FOR SOLVING THE PROBLEMS] To achieve the above object
In addition, the present invention provides a coding multi-level modulation device that allocates 2 ⁿ signal points to an m-bit digital signal sequence and outputs one of the signal points as a modulation signal. enter, to satisfy the m1 <m m1
Consisting m2 bits satisfying the signals 1 and m2 <m-m1 consists bit signal 2 (where the signal first rate ≠ signal
A speed converter for outputting a second speed), enter the signal 1 and the signal 2, 1 for m1-bit of the signal 1> r '> (m- m2-1) / (m-m2 ) and convolutional encoding with a coding rate r 'satisfying the left the m-m @ 2 bits
And means for outputting the m-m2 bits output from the means.
And m2 bits of the signal 2 as a whole, 1>r>
(M-1) / m encoded by the encoding rate r that satisfies m
A convolutional encoder outputs a bit, the signal sequence of m bits output from the convolutional coder enter, 2 ⁿ mapped based on the set partitioning
A mapping device that outputs a value-modulated signal.

Also, the present invention provides a coding rate r (1>r>
Means for encoding m1 bits of the signal 1 in the convolutional encoder of (m-1) / m) is punctured.
It is characterized by having a container .

[0009]

According to the present invention, the coding rate of the convolutional encoder is set to 1>
By setting r> (m-1) / m and adopting a code configuration that suppresses the ratio of redundant components by convolutional coding, the conversion rate of the speed transformer for maintaining the information rate is reduced, and the band expansion rate is thereby reduced. Can be reduced. By doing so, the above-mentioned problem can be solved.

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram showing a basic concept for explaining an embodiment of the present invention. In FIG. 1, a digital signal sequence 101 is input to a serial-parallel converter 102 at a speed of mRo bit / sec, and is converted into an m-bit digital signal sequence having a speed of each bit Ro bit / sec. Input to the device 103. Speed converter 103
In the m ₁ <m _1-bit signal sequence 105 that satisfies m with each bit R ₁ bit / sec becomes rate, each bit R ₂ bi
t / sec becomes m ₂ with velocity <and m ₂ bits of the signal sequence 104 that satisfies m-m ₁ is outputted, of the signal sequence 104 is input to the mapping unit 108 directly as the signal sequence 105 encoded Rate r ′ (1> r ′> (m−
m ₂ -1) / (m−m ₂ )) narrow sense convolutional encoder 1
06. The narrow sense convolutional encoder 106 outputs a signal sequence 107 of m−m ₂ bits after performing convolutional coding on the signal sequence 105. Mapping device 108
Takes the signal sequences 104 and 107 as input, maps based on set partitioning, and sets the rate mR ₂ bit / sec
(R ₂ baud) 2 ^m- value modulated signal 109 is output. By the way, the speed of each bit of the signal sequence 107 is equal to the signal sequence 1
04 must be equal to the rate of each bit R ₂ bit / sec. Therefore, the speed of the signal sequence 105 and the signal sequence 1
There is a relationship as shown in equation (1) between the speeds 07.

M ₁ R ₁ = r ′ (m−m ₂ ) R ₂ (1) Further, since the sum of the speeds of the signal sequence 104 and the signal sequence 105 is equal to the speed of the signal sequence 101, m ₁ R ₁ + m ₂ R ₂ = mRo (2)

From equations (1) and (2), R ₁ and R ₂ are respectively R ₁ = r ′ (m−m ₂ ) mRo / m ₁ {(m−m ₂ ) r ′ + m ₂ } (3) R ₂ = mRo / {(m−m ₂ ) r ′ + m ₂ } (4)

Therefore, signal sequence 104 and signal sequence 105
Is input, and the coding rate r of the broad sense convolutional encoder 110 that outputs the signal sequence 104 and the signal sequence 107 is r = Ro / R ₂ = {(m−m ₂ ) r ′ + m ₂ } / m ( 5) As a result, the band expansion rate is mR ₂ / Ro = m / {(mm− ₂ ) r ′ + m ₂ } (6).

In order to clarify the above concept, an explanation will be given using an embodiment shown in FIG. In this embodiment, m = 8,
This is the case where m ₁ = 1, m ₂ = 6, and r ′ = 述 べ.

In FIG. 2, an input signal 201 having a speed of 8 Ro bit / sec is converted by a serial-parallel converter 202 into each bit.
After being converted into an 8-bit digital signal sequence having a speed of Ro bit / sec, it is input to the speed converter 203. The rate converter 203 outputs a 1-bit signal sequence 205 and a 6-bit signal sequence 204. Of these, the signal sequence 204 is directly input to the mapping device 208, and the signal sequence 205 is output to the narrow sense convolutional encoder 206. Is entered. Here, the narrow sense convolutional encoder 206 is a punctured encoder that performs encoding at an encoding rate of 3/4 by puncturing a code at an encoding rate of 1/2, and performs convolutional encoding on the signal sequence 205. The signal sequence 207 of the latter 2 bits is output. Accordingly, the speed converter 203 performs speed conversion on the signal sequences 204 and 205 at the same conversion rate because the speed differs between the input sequence 204 of the mapping device 208 and the signal sequence 207. And the signal sequence 205 need to be converted to different rates. Now, the signal sequence 205
Is converted to a rate of each bit R ₁ bit / sec and the signal series 204 and 207 to a rate of each bit R ₂ bit / sec. From equations (3) and (4), R ₁ = 8Ro / 5 bit / sec. ₂ = 16Ro /
It becomes 15bit / sec. The mapping device 208 outputs the signal sequence 2
As input 04,207, mapping based on set partitioning, and outputs the speed _{mR 2 bit / sec (R 2} baud) That 128Ro / 15 bit / sec (16 / 15baud) becomes 2 ^8-level modulation signal 209 .

From the above, according to the present invention, the bandwidth expansion rate associated with the speed conversion is 16/15 (106.7%) according to equation (6), and the bandwidth expansion rate associated with the speed conversion in the conventional method shown in FIG. / 7 (114.3%), it is possible to suppress the expansion of the band accompanying the speed conversion to be low.

[0018]

As described above, according to the present invention, the expansion of the band by the speed converter can be greatly reduced as compared with the conventional system shown in FIG. 3, and the band limit is severe in digital microwave communication. Implement a method suitable for the system.

[Brief description of the drawings]

FIG. 1 is a diagram showing a basic concept of the present invention.

FIG. 2 is a diagram showing one embodiment of the present invention.

FIG. 3 is a diagram showing an embodiment of a SPORT-256QAM system.

FIG. The figure which shows the basic concept of the trellis coding modulation system which Ungerboeck (G.Ungerboeck) proposed.

FIG. 5 is a diagram showing a basic concept of a multilevel coded modulation scheme proposed by Imai and Hirakawa.

[Explanation of symbols]

102: a serial-parallel converter, 103: a speed converter, 106: a narrow sense convolutional encoder, 108: a mapping device.

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-52-155907 (JP, A) JP-A-3-46416 (JP, A) US Pat. No. 4,483,012 (US, A) “Trellis coded 256 QAM demodulation method” Study ”, 1988, Nakamura, Aikawa, Takanashi, IEICE Technical Report, IT88-94, pp51-56 (58) Fields investigated (Int. Cl. ⁷ , DB name) H03M 7/30

Claims (2)

(57) [Claims] 1. An encoding multi-level modulation apparatus which allocates 2 ⁿ signal points to an m-bit digital signal sequence and outputs one of the signal points as a modulation signal. and force, m1 <consists m1 bits satisfying m signals 1 and m @ 2 <m-m1
Consisting m2 bits satisfying the signal 2 (however, the signal 1
A speed converter which outputs a speed) of the speed ≠ signal 2, enter the signal 1 and the signal 2, the signal 1 m
1> r '> (mm-2-1) / (m-
and convolutional coding with coding ratio r 'that satisfies m @ 2) m
Including means for outputting m2 bits, and
A coding rate r that satisfies 1>r> (m-1) / m as a whole from the obtained m-m2 bits and the m2 bits of the signal 2.
In the convolutional encoder outputs the m-bit encoded, enter the signal sequence of m bits output from the convolutional encoder, the 2 ⁿ value modulation signals mapped based on the set partitioning An encoding multi-level modulation device, comprising: a mapping device for outputting. 2. A sign-rate r (1>r> (m -1) / m)
Means for encoding the m1 bits of the signal 1 in the convolutional encoder, the coding the multi-level modulation apparatus according to claim 1, characterized in that the punctured encoder.