JP3060693B2 - Stencil mask forming method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electron beam lithography technique for microfabrication of a semiconductor device, and more particularly to a method of forming a stencil mask in reduction transfer type electron beam lithography using a stencil mask. is there.

[0002]

2. Description of the Related Art Electron beam lithography has been used as a tool for advanced development of LSIs because it does not require the use of a reticle and can form a fine pattern. Conventionally, a widely used electron beam writing method uses a Gaussian beam or a variable shaped beam using a field emission or thermionic electron gun to form a pattern.
This is a method of sequentially drawing one by one, and is called a so-called single-stroke writing method. That is, an electron beam generated from an electron gun can be focused on a resist surface by a focusing lens into a narrow beam spot, and the position of the beam spot can be controlled by a deflection system to draw an arbitrary figure on the resist. It is. This method has the merit that distortion and aberration inside the deflection field can be electrically corrected and the accuracy can be increased depending on the control technique, and many methods have been developed and put to practical use. On the other hand, however, in this method, since the spot diameter of the electron beam is about 0.1 to 2 μm, the size of the drawing pattern is reduced, and the number of spots to be drawn becomes enormous. There is a drawback in that the spot movement speed is limited due to the limitation of the operating frequency, and the time required for drawing becomes extremely long, and the throughput is reduced.

In order to solve these drawbacks, a reduction transfer method has recently been proposed in which the entire pattern of an LSI chip is not drawn as a single stroke, but a partial pattern is transferred using a mask. Figured out. In other words, there is a method in which a repetitive area of the LSI pattern is decomposed into small area partial patterns, this pattern is formed on a stencil mask, and the pattern is sequentially transferred using this mask. However, this method is expected to have a very high throughput, but it is very difficult to form a stencil mask to be used. For example, an example of a stencil mask forming method currently considered is shown in FIG.

An acceleration voltage of 50 to 50 is applied to the semiconductor silicon substrate 11.
Boron ions 42 are implanted at 100 KV and at a dose of 1 × 10 ²⁰ cm ⁻² to form an ion implanted layer 41 (FIG. 5).
(A)). An epitaxial layer 43 of silicon is formed thereon, and a nitride film is deposited as a protective film 44 on the epitaxial layer and on the back surface of the silicon substrate (FIG. 5B). Then, the silicon oxide film on the backside of the semiconductor silicon substrate is selectively removed using lithography and dry etching techniques, and the backside of the semiconductor silicon substrate is etched to a boron injection layer with an ethylenediamine / pyrocatechol solution using the silicon oxide film as a mask. Etching is performed to remove all the protective film (FIG. 5C). Next, a resist pattern 45 is formed on the epi layer by using an electron beam lithography technique (FIG. 5D). Using the resist pattern 45 as a mask, the epi layer and the ion-implanted layer are etched to form a mask pattern (FIG. 5E).

[0005] By the above method, a stencil mask used in electron beam reduction transfer lithography can be formed. Here, the reason why the high ion implantation layer is formed is that when the semiconductor silicon substrate is etched from the back surface, it is used as an etching stopper. However, this method requires an epitaxial technique and also a high energy ion implantation technique,
It is technically very complicated and the process is long.
Further, since it is necessary to use only the silicon ion-implanted layer and the epi layer as a mask for blocking the electron beam, the mask film thickness becomes several tens μm or more, and it is not easy to perform epitaxial deposition and etching.

[0006]

As described above, in a stencil mask used for electron beam reduction transfer lithography, if only a silicon material is used, a film thickness of several tens μm or more is required. FIG. 4 shows the range of electrons in silicon with respect to the acceleration voltage of the electron beam. Usually, the acceleration voltage used in electron beam lithography is 20 to 50 KeV, so that a silicon material as a mask requires a film thickness of about 20 μm. In addition, many steps such as ion implantation, epitaxial technology, lithography, and etching are required, and there is a disadvantage in that the steps of forming a stencil mask are complicated. Further, as for the mask film thickness, high-precision controllability and uniformity are required in order to block an electron beam. In the above case, in order to improve the accuracy of the mask film thickness, high ion implantation is performed on the semiconductor silicon substrate, which is used as a stopper in the etching of the silicon substrate. Epitaxial technology for forming a film is indispensable.

In order to reduce the thickness of the mask, there are those using a multilayer film of a silicon substrate and a metal such as gold, and those using a single metal. However, when a multilayer film is used, there is a problem that the mask is distorted by the influence of heat due to electron beam irradiation. That is, heat is generated by irradiating the mask with the electron beam. At this time, the coefficient of thermal expansion is 2.5 × 10 ⁻⁶ / deg for silicon, 14.2 × 10 ⁻⁶ / deg for gold, and the thermal conductivity of silicon is 1.7 cm.deg. Gold is 3.1 cm.deg., And the mask is distorted by depositing gold on the surface of the silicon mask to form a heterogeneous multilayer film. In addition, when a metal alone is used as a mask, there is a disadvantage that it is difficult to process the metal. In other words, a stencil mask that has good film thickness controllability, uniformity, high mechanical strength, good dimensional stability due to temperature change, good thermal stability, and can be formed by a simple process is desired. It is.

The present inventors have completed a method for forming a stencil mask for electron beam reduction transfer lithography in order to solve these problems.

[0009]

According to a method of forming a stencil mask of the present invention, a step of forming an inorganic film on a surface of a first semiconductor silicon substrate, and a step of bonding a second semiconductor silicon substrate on the inorganic film, Heat-treating, etching the bonded silicon substrate to thin the silicon substrate, forming a protective film on both surfaces of the semiconductor silicon substrate, and forming a protective film on the back surface of the first semiconductor silicon substrate. A pattern is formed, the protective film is etched using the pattern as a mask to expose the back surface of the first semiconductor silicon substrate, and the exposed semiconductor silicon substrate is etched using the protective film pattern as a mask. Etching from the back surface to expose the inorganic film; and lithography on the protective film on the front surface of the second semiconductor silicon substrate by using a lithography technique. Forming a stop pattern, etching the protective film, the second semiconductor silicon substrate, and the inorganic film using the resist pattern as a mask, and forming a pattern by penetrating the inorganic film. It is provided.

[0010]

[0011]

[0012]

According to the present invention, an accurate stencil mask for electron beam reduction transfer lithography can be formed very easily by the above-described stencil mask forming process without causing any thermal distortion. In particular, by oxidizing a semiconductor silicon substrate and bonding two silicon substrates together, a stopper for etching from the back surface of the silicon substrate can be easily formed.
That is, by bonding the silicon oxide film, etching from the back surface of the semiconductor silicon substrate can be easily performed, and a stencil mask with good film thickness controllability and uniformity can be formed. In addition, by bonding a silicon substrate and using a polishing technique, a stencil mask having an accurate, uniform, and thin film thickness can be easily formed. Further, by forming silicon oxide films on both surfaces of the semiconductor silicon substrate, it is possible to easily form a stencil mask having excellent mechanical strength and excellent dimensional stability and thermal stability due to temperature change. Therefore, the use of the present invention effectively works for forming a thin stencil mask which is accurate, has excellent thermal stability, and has good film thickness uniformity.

That is, according to the present invention, a semiconductor silicon substrate is oxidized, two silicon substrates are bonded together by heat treatment, and a desired silicon film thickness of about 30 μm can be obtained by a polishing technique. Since an oxide film can be used as a stopper in etching from the back surface, a stencil mask with good film thickness controllability and uniformity can be easily formed. Further, by using a semiconductor silicon substrate alone or a mask having an oxide film formed on both surfaces of a silicon substrate as a mask, distortion due to heat during electron beam irradiation can be prevented, and an accurate stencil mask can be easily formed. be able to.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS First, the outline of the present invention will be described. The present invention oxidizes a semiconductor silicon substrate and bonds two silicon substrates together to easily form a stopper for etching the back surface of the silicon substrate, thereby forming a thin practical stencil mask without thermal distortion. Is what you can do. In addition, a thin silicon substrate of about 30 μm can be easily obtained by using the polishing technique. Further, since a silicon oxide film can be formed on both surfaces of the silicon substrate, a stencil mask for electron beam reduction transfer lithography can be easily and accurately formed without distortion due to heat.

Hereinafter, a method of forming a stencil mask according to one embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a process sectional view showing a method of forming a stencil mask according to an embodiment of the present invention. A silicon oxide film having a thickness of 1 μm is deposited as an inorganic film 12 on the first semiconductor silicon substrate 11 (FIG. 1A).
Heat treatment was performed at 100 ° C. for 2 hours to bond two silicon substrates together (FIG. 1B). Next, the bonded silicon substrate 13 was etched by a polishing technique to reduce the thickness of the silicon substrate to about 30 μm. A silicon oxide film having a thickness of 500 nm is formed as a protective inorganic film 14 on both surfaces of the semiconductor silicon substrate, a resist pattern is formed on the inorganic film on the back surface of the silicon substrate by using lithography technology, and the resist pattern is used as a mask to form an inorganic film. Etching was performed to selectively expose the back surface of the first semiconductor silicon substrate. Further, using this pattern as a mask, the first semiconductor silicon substrate was etched from the back surface using an ethylenediamine-pyrocatechol solution to expose the back surface of the silicon oxide film 12 (FIG. 1).
(C)). Thereafter, the protective inorganic film 14 was entirely removed, and a resist pattern 15 was formed on the surface of the second semiconductor silicon substrate by using lithography (FIG. 1).
(D)). Further, using the resist pattern as a mask, the second semiconductor silicon substrate 13 and the silicon oxide film 12 are etched to penetrate the pattern, and the penetrating portion 2 is formed.
By forming No. 00, a stencil mask having excellent mechanical strength and high thermal stability could be easily formed (FIG. 1E).

As described above, according to this embodiment, the stencil mask forming process can be greatly simplified by oxidizing the semiconductor silicon substrate and laminating the two silicon substrates, and the semiconductor device can be easily manufactured. A practical stencil for electron beam reduction transfer lithography with good uniformity of film thickness, which can form a stopper in etching the back surface of a silicon substrate and can block electrons even when the electron beam acceleration voltage is 50 keV. A mask can be formed. Here, the inorganic film formed on the first semiconductor silicon substrate is a silicon oxide film, but may be a silicon nitride film.

Hereinafter, a second embodiment of the present invention will be described with reference to the drawings. (FIG. 2) is a process sectional view of a stencil mask forming method according to a second embodiment of the present invention. On the first semiconductor silicon substrate 11,
A silicon oxide film having a thickness of 1 μm is deposited as the inorganic film 21 (FIG. 2A), a second semiconductor silicon substrate 22 is brought into contact with the inorganic film, and heat treatment is performed at 1100 ° C. for 2 hours. A silicon substrate was bonded (Fig. 2
(B)). Next, the bonded silicon substrate 22 was etched by a polishing technique to reduce the thickness of the silicon substrate to about 30 μm. A silicon oxide film having a thickness of 1 μm was formed as a protective inorganic film 23 on both surfaces of the semiconductor silicon substrate. A resist pattern was formed on the inorganic film on the back surface of the silicon substrate using lithography technology, and the inorganic film was etched using the resist pattern as a mask to selectively expose the back surface of the first semiconductor silicon substrate. Further, using this pattern as a mask, the first semiconductor silicon substrate was etched from the back surface using an ethylenediamine-pyrocatechol solution to expose the back surface of the silicon oxide film 21 (FIG. 2C). Thereafter, a resist pattern 24 was formed on the protective inorganic film 23 on the surface of the second semiconductor silicon substrate by using a lithography technique (FIG. 2D). Further, using the resist pattern as a mask, the protective inorganic film 23, the second semiconductor silicon substrate 2
2, and by etching the silicon oxide film 21 to penetrate the pattern and form the penetrating portion 200,
It was possible to easily form a stencil mask having excellent mechanical strength, high thermal stability, and no distortion due to heat (FIG. 2E).

As described above, according to the present embodiment, the stencil mask forming process can be greatly simplified by oxidizing the semiconductor silicon substrate and bonding the two silicon substrates, and the semiconductor device can be easily manufactured. Practical stencil for electron beam reduction transfer lithography with good uniformity of film thickness, capable of forming a stopper in etching the back surface of a silicon substrate and blocking electrons even when the electron beam acceleration voltage is 50 keV. A mask can be formed. Furthermore, an inorganic film having the same film quality and thickness is formed on both surfaces of the semiconductor silicon substrate,
Since a stencil mask can be used, an accurate mask that does not generate distortion due to heat during electron beam irradiation can be formed. Here, the inorganic film formed on the first semiconductor silicon substrate is a silicon oxide film, but may be a silicon nitride film.

Hereinafter, a third embodiment of the present invention will be described with reference to the drawings. (FIG. 3) is a process sectional view of a stencil mask forming method according to a third embodiment of the present invention. On the first semiconductor silicon substrate 11,
A silicon oxide film having a thickness of 1 μm is deposited as the inorganic film 31 (FIG. 3A), a second semiconductor silicon substrate 32 is brought into contact with the inorganic film, and heat treatment is performed at 1100 ° C. for 2 hours. A silicon substrate was bonded (Fig. 3
(B)). Next, the bonded silicon substrate 32 was etched by a polishing technique to reduce the thickness of the silicon substrate to about 30 μm. A silicon oxide film is formed on both sides of this semiconductor silicon substrate as a protective inorganic film 33 by 500 n.
m, a resist pattern is formed on the inorganic film on the back surface of the silicon substrate by using a lithography technique, and the inorganic film is etched using the resist pattern as a mask to selectively expose the back surface of the first semiconductor silicon substrate. Exposed. Further, using this pattern as a mask, the first semiconductor silicon substrate was etched from the back surface using an ethylenediamine-pyrocatechol solution to expose the back surface of the silicon oxide film 31 (FIG. 3C). Further, using this pattern as a mask, the silicon oxide film 31 is etched to expose the back surface of the second semiconductor silicon substrate 32, remove all the protective inorganic film 33, and remove the surface of the second semiconductor silicon substrate. Next, a resist pattern 34 was formed by using a lithography technique (FIG. 3D). Further, by using the resist pattern as a mask, the second semiconductor silicon substrate 32 is etched to penetrate the pattern to form the penetrating portion 200, thereby easily providing a stencil having excellent mechanical strength, high thermal stability and high heat stability. A mask could be formed (FIG. 3E).

As described above, according to the present embodiment, the stencil mask forming process can be greatly simplified by oxidizing the semiconductor silicon substrate and bonding the two silicon substrates, and the semiconductor device can be easily manufactured. Practical stencil for electron beam reduction transfer lithography with good uniformity of film thickness, capable of forming a stopper in etching the back surface of a silicon substrate and blocking electrons even when the electron beam acceleration voltage is 50 keV. A mask can be formed. Furthermore, since the semiconductor silicon substrate itself can be used as a stencil mask, an accurate mask without distortion due to heat during electron beam irradiation can be formed. Here, the inorganic film formed on the first semiconductor silicon substrate is a silicon oxide film, but may be a silicon nitride film.

[0022]

As described above, according to the present invention,
By oxidizing a semiconductor silicon substrate and bonding two silicon substrates together, it is possible to easily form a stopper for etching the back surface of the silicon substrate, and has excellent film thickness controllability, uniformity, and mechanical strength. In addition, an accurate, thin, and highly practical stencil mask having high thermal stability and no distortion due to heat can be easily formed. In particular, a normal semiconductor silicon substrate is stuck,
Since the desired thickness of the silicon substrate with good uniformity and controllability can be obtained by the polishing technique, a stencil mask can be easily formed. Furthermore, by forming the same inorganic film on the silicon substrate alone or on both surfaces of the silicon substrate, it is possible to accurately form a mask pattern having high thermal stability and no distortion due to heat, and to reduce an electron beam. It effectively acts as a stencil mask for transfer lithography and can greatly contribute to the manufacture of ultra-high density integrated circuits.

[Brief description of the drawings]

FIG. 1 is a process sectional view of a stencil mask forming method according to a first embodiment of the present invention;

FIG. 2 is a process sectional view of a stencil mask forming method according to a second embodiment of the present invention.

FIG. 3 is a process sectional view of a stencil mask forming method according to a third embodiment of the present invention.

FIG. 4 is a diagram showing an electron range with respect to an acceleration voltage of an electron beam.

FIG. 5 is a process sectional view of a conventional stencil mask forming method.

[Explanation of symbols]

 Reference Signs List 11 semiconductor silicon substrate 12 inorganic film 13 semiconductor silicon substrate 14 inorganic film 15 resist pattern

Continuation of front page (56) References JP-A-2-126630 (JP, A) JP-A-3-257814 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G03F 1 / 16 H01L 21/027

Claims (1)

(57) [Claims] 1. A step of forming an inorganic film on a surface of a first semiconductor silicon substrate, a step of bonding a second semiconductor silicon substrate on the inorganic film, and a heat treatment step; and etching the bonded silicon substrate. Thinning the silicon substrate; forming a protective film on both surfaces of the semiconductor silicon substrate; forming a pattern on the protective film on the back surface of the first semiconductor silicon substrate; using the pattern as a mask Etching the protection film to expose the back surface of the first semiconductor silicon substrate, etching the exposed semiconductor silicon substrate from the back surface using the protection film pattern as a mask, and exposing the inorganic film; A resist pattern is formed on the protective film on the surface of the second semiconductor silicon substrate by using a lithography technique, and the resist pattern is masked. Forming a pattern by etching the protective film, the second semiconductor silicon substrate, and the inorganic film and penetrating the inorganic film.