JP3074724B2 - Adhesive prepreg and multilayer board for mounting on semiconductor using the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial application field> The present invention relates to a prepreg for bonding used for bonding between wiring boards or a wiring board and a base material in a multilayer wiring board, and in particular, And a bonding prepreg suitable for a semiconductor-mounted multilayer board.

<Prior Art> A wiring board using a multilayer board has been used as a wiring board on which a semiconductor such as a pin grid array is mounted.

A semiconductor-mounted multilayer board is shown, for example, in FIG. 1 in the case of a pin grid array. In FIG. 1, a counterbore opening 5 is provided in a wiring board 1, and a semiconductor 3 is mounted in the opening. The wiring board 1 has an inner layer circuit 7, and the circuit 7 has a bonding pad 8 near the periphery of the counterbore opening 5. On the other hand, the wiring board 2 has an opening 4 larger than the counterbore opening 5 and further has a surface circuit 9.
Having.

The surface layer circuit 9 has a bonding pad 10 near the periphery of the opening 4. The wiring boards 1 and 2 are bonded by a bonding prepreg 6. The semiconductor 3 and the circuit are connected to the respective bonding pad portions by gold wires 11 to form a semiconductor mounting multilayer board. The surface layer circuit 9 and the inner layer circuit 7 can be further connected to other circuits by a large number of pins 12 attached to the wiring board.

<Problems to be Solved by the Invention> In such a prepreg for bonding a semiconductor-mounted multilayer board, the bonding between the wiring board 1 having an inner layer circuit and the wiring board 2 having a surface layer circuit is sufficiently maintained, and the circuit Must be filled with resin. If the irregularities are not completely filled, bubbles will be present in those portions, which may cause peeling or blistering due to heating or the like in a later step.

If the resin content of the prepreg is increased to prevent the generation of these bubbles, the unevenness of the circuit is almost completely filled with the resin.However, the resin content of the prepreg increases, so that the surface of the prepreg becomes rich in resin and the lamination press Occasionally, slipping easily occurs, increasing the danger in work. In addition, by increasing the resin content, the resin of the prepreg flows on the bonding pad portion as shown in FIG. If the resin outflow 6a is large, the bonding pad portion 8 is covered or the exposed area of the bonding pad portion becomes small, so that the connection between the semiconductor and the circuit by the bonding wire 11 is not hindered. Come.

<Means for Solving the Problems> The inventors of the present invention set the resin content of the prepreg in the range of 55 ± 5% in the adhesive prepreg comprising the glass cloth and the epoxy resin varnish, and configure the prepreg. It has been found that the above problem can be solved by proposing an adhesive prepreg having a gel time of a resin varnish of 20 ± 10 seconds.

In addition, it has been found that, by using a prepreg using a glass cloth which has been subjected to fiber opening treatment in the above-mentioned bonding prepreg, it is possible to further solve a suitable problem.

Further, in a semiconductor-mounted multilayer board having an inner layer circuit, by using one or two of the adhesive prepregs for each adhesive layer of the multilayer board, the semiconductor-mounted multilayer board which solves the above-mentioned problem is provided. Was obtained.

<Effect> In order to improve the resin embedding property to the unevenness of the inner layer circuit, it is preferable that the resin content of the prepreg is higher.
When the resin content is increased, slip of the substrate at the time of pressing is likely to occur, and the molten resin flows out to the bonding pad portion.

This application promotes the curing of the prepreg, in order to suppress the occurrence of slip and the outflow of the resin while setting the resin content higher,
It has been found that it is possible by selecting the gel time of the epoxy resin varnish constituting the prepreg within a range of 20 ± 10 seconds.

By shortening the gel time, the curing of the resin is progressing, so that the viscosity of the remelted resin at the time of pressing increases, so that the occurrence of slip hardly occurs and the outflow of the resin can be suppressed to a small value. The range of the resin component is selected from 55 ± 5%, and the gel time is selected from the range of 20 ± 10 seconds according to the situation.

If the resin content is lower than this range, the embedding of the resin becomes worse, and air bubbles are buried in a part of the inner layer circuit. On the other hand, if it is higher than this range, the probability of occurrence of slip at the time of pressing increases, and the outflow of resin also increases.

If the gel time is shorter than this range, the resin will harden before the resin sufficiently embeds the irregularities of the circuit, so that a part of the circuit will also have bubbles. If it is large, the outflow of resin becomes large, which is inconvenient.

Further, in a preferred embodiment of the present application, a glass cloth obtained by subjecting a prepreg to an opening process is used. Here, the opening process means that the warp and the weft constituting the glass cloth are opened by some method.

For example, a method in which a high-pressure fluid is sprayed onto a glass cloth using a high-pressure fluid processing apparatus disclosed in JP-A-61-230900 and the glass cloth is opened with the impact energy is preferably used. Since the constituent yarns of the opened glass cloth are spread, it is easy to include a resin varnish during prepreg production, and even if the resin content is increased, the resin cloth does not adhere to the surface without excessively attaching the resin. Will be included inside. Therefore, even if the resin content is increased, slippage is less likely to occur at the time of pressing, and the outflow of the resin can be suppressed while sufficiently embedding the unevenness of the circuit.

In the case of using the above-mentioned high-pressure fluid, a sufficient opening effect can be obtained by injecting a high-pressure water stream at a pressure of about 30 to 150 kg / cm ² .

Further, as another preferred embodiment of the present invention, by using two bonding prepregs according to claim 1 together, it is possible to obtain a semiconductor-mounted multilayer board with less entrapment of air bubbles in the inner layer circuit and less outflow of resin. be able to.

In the case of one adhesive prepreg, if the resin content is increased to improve the embedding property in the circuit, the amount of resin adhering to the surface of the glass cloth will inevitably increase, and therefore, slip will easily occur, Also, the outflow of resin tends to increase. By using two prepregs, even if the amount of resin of one sheet is small, by combining two sheets, the amount of resin for filling the inner layer circuit becomes large, and the embedding property of circuit unevenness is improved. However, the amount of resin adhering to the surface of the glass cloth can be made smaller than in the case of only one glass cloth, so that the occurrence of slip hardly occurs and the outflow of the resin can be suppressed to be small. Therefore. When two prepregs are used together, it is possible to increase the allowable range of working conditions as compared with the case of using one prepreg.

As the glass cloth used for the adhesive prepreg of the present application, a glass cloth having a thickness of 50 μm to 200 μm is suitable. In selecting the glass cloth, it is desirable to select a glass cloth in which the thickness of the prepreg falls within the range of 1.5 to 3.0 times the thickness of the circuit copper foil.

<Examples> Examples 1 to 5 Glass cloth WEA116E [Nitto Boseki Co., Ltd .: thickness 100μ]
m] with a silane coupling agent [Toray Silicone Co., Ltd .: S
Z-6032], and impregnated in FR-4 type epoxy resin varnish having the following composition to prepare a prepreg.

Epicoat 5046-B-80 [Yuika Ciel Epoxy Co., Ltd.] 100 parts Epicoat 154 [Yuika Ciel Epoxy Co., Ltd.] 20〃 Dicyandiamide 4〃 Benzyldimethylamine 0.2 エ チ ル Methylethylketone 15〃 Dimethylformamide 30〃 5 types of prepreg Table 1 shows the respective resin components and gel times. The resin content was measured according to JIS C 6521 5.4, and the gel time was measured according to JIS C 6521 5.7.

Example 6 The glass cloth used in Example 1 was replaced with JP-A-61-230900.
The high-pressure fluid processing device disclosed in No. 1 was used to spray a high-pressure water stream to perform fiber opening processing. (Pressure: 100 kg / cm ² ) A prepreg is prepared in the same manner as in Example 1 using this glass cloth. Table 1 shows the resin content and the gel time.

Example 7 Glass cloth WEA05E [Nitto Boseki Co., Ltd .: 50 μm thickness]
To a silane coupling agent [Toray Silicone Co., Ltd .: SZ-6
032], and impregnated in the same FR-4 epoxy resin varnish as in Example 1 to prepare a prepreg. Table 1 shows the resin content and the gel time.

<Comparative Examples> Comparative Examples 1 to 3 Using the same glass cloth and resin varnish as in Example 1,
Create a prepreg. Table 1 shows the resin content and gel time of the three types of prepregs.

Ten types of prepregs of Examples 1 to 7 and Comparative Examples 1 to 3 were cut as shown in FIG. (49 mm × 49 mm) A laminate 1 having a copper foil circuit (glass epoxy) and a laminate 2 having no copper foil circuit (glass epoxy) were prepared and cut as shown in FIG. The thickness of the copper foil is 35
μm.

About nine types of prepregs, between Examples 1-6 and Comparative Examples 1-3 between the laminated board 1 and the laminated board 2, respectively,
The prepregs were inserted one by one, and in Example 7, two sheets were inserted together, heated and pressed at 170 ° C. and 30 kg / cm ² , and the laminates 1 and 2 were bonded via the prepreg. The laminate 1 had the side having the copper foil circuit inside.

About nine kinds of laminated boards obtained as described above,
The void defect rate and the outflow of resin were measured. Table 1 shows the results.

Measurement method of void defect rate Cut the center part of the laminate, check the adhesive layer part in the cross section with an optical microscope for the presence of voids, Calculated by

Measurement of resin outflow At the periphery of the central opening of the laminate, measure the amount of resin flowing out of the adhesive layer by length Outflow is 0.3 mm or less ○ 0.3 to 1.0 mm △ 1.0 mm or more × <Effects of the Invention> By using the adhesive prepreg of the present invention for a semiconductor-mounted multilayer board, the embedding property of the inner layer circuit is good, so that bubbles are less entrapped in the adhesive layer, and the amount of resin flowing out of the adhesive layer. Therefore, it is possible to suppress the resin from covering the bonding pad portion of the inner layer circuit, and it is possible to maintain good wire bonding property with the semiconductor.

Particularly, by using the glass cloth subjected to the fiber opening treatment as the base material of the prepreg, it is possible to obtain a semiconductor-mounted multilayer board with less air bubbles and less resin outflow.

Furthermore, a semiconductor-mounted multilayer board using two bonding prepregs of the present application together exhibits the effects of the present application more than a single board.

[Brief description of the drawings]

FIG. 1 is a sectional view of a semiconductor-mounted multilayer board, and FIG. 2 is a partially enlarged view thereof. FIG. 3 shows an example of cutting an adhesive prepreg in Examples and Comparative Examples. Explanation of symbols 1: inner circuit board, 7, 9: circuit 2: surface circuit board, 8, 10: bonding pad 3: semiconductor, 11: bonding wire 6: prepreg for bonding, 12: pin

────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hideyuki Hatanaka 2-16-19, Mayor of Koriyama, Fukushima Prefecture (56) References JP-A-2-227422 (JP, A) JP-A-2-200861 (JP, A ) August 1, 1981, published by Modern Science Co., Ltd., CLYDEF. 21. COOMBS, Jr., "Printed Circuit Handbook (Complete Edition 2nd Edition)", Part 6, "Multilayer Printed Circuits". Selection and Standards of Multilayer Board Materials (21-1 to 21-7) Published by CMC Co., Ltd., November 10, 1976, "Printed Wiring Boards" by Eiichi Eita "Printed circuit boards" 3.4 Epoxy resin, glass cloth thread copper Production of laminates (pages 56-57) (58) Fields investigated (Int. Cl. ⁷ , DB name) C08J 5/24 H01L 23/14 B32B 17/04

Claims (3)

(57) [Claims] In an adhesive prepreg comprising a glass cloth and an epoxy resin varnish, the resin content of the prepreg is in the range of 55 ± 5%, and the resin varnish constituting the prepreg has a gel time of 20 ± 10%. A prepreg for a multi-layer board mounted with a semiconductor, wherein the second is a second. 2. The prepreg for a semiconductor-mounted multilayer board according to claim 1, wherein the glass cloth used for the prepreg has been subjected to fiber opening treatment. 3. A semiconductor mounting multilayer board having an inner layer circuit, wherein one or two of the prepregs according to claim 1 are used for each adhesive layer of said multilayer board. Multilayer board.