JP3075778B2 - Surface treatment method for semiconductor substrate - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for treating a surface of a semiconductor substrate having an exposed silicon surface.

[0002]

2. Description of the Related Art In a semiconductor device having an exposed silicon surface on the surface of a semiconductor substrate, particularly in an insulated gate semiconductor device requiring a high withstand voltage, it is important to modify the exposed silicon surface. Specific problems include adhesion failure and deterioration of characteristics due to contamination when bonding between silicon wafers, an increase in reverse leakage current at a pn junction surface exposed on the surface, and formation of a dry etching opening in an interlayer insulating film. There will be an increase in the contact resistance later, a threshold failure in the case where a sidewall channel is formed in a trench structure in the future, and instability of the interface state of the silicon exposed surface in selective CVD of a metal such as single crystal Al. These are presumed to be due to insufficient control of reforming and cleaning of the exposed silicon surface. The main causes are considered to be contamination remaining in the previous process of the exposed silicon surface and the occurrence of a porous natural oxide film that is not so clean formed thereon. If removal and suppression are not adequately controlled, the level is at a level where device problems arise.

Conventionally, the exposed silicon surface is modified by a treatment with a mixed solution of hydrochloric acid and hydrogen peroxide (nominal SC-2 treatment) or a treatment with a mixed solution of quaternary ammonium base and hydrogen peroxide (nominal alkali treatment). ) Or sulfuric acid
Treatment with a mixed solution of hydrogen peroxide and the like is performed. In these treatments, the silicon surface becomes hydrophilic after the treatment because of the treatment with the oxidizing agent, but a natural oxide film easily grows.

The exposed silicon surface is basically hydrophilic
Is desirable when a post-process is considered. Only
When using the above-described oxidant-based treatment, a natural oxide film
Grows to about 1.0 to 1.5 nm. And that
The natural oxide film contains 10% Na in the film.¹²atm / cm^Two , Fe
5 × 10¹¹atm / cm^Two Degree included. Also, contact type
Dry etching such as RIE for forming and RIE for forming trenches
2x Fe, Cr, Ni, etc.
10¹²atm / cm^Two , Al is 10¹³-10¹⁴atm / cm^Two , Na
Is 5 × 10¹¹atm / cm^Two I know that there is a degree. I
If post-treatment after RIE is insufficient, these metals
Trapped in porous native oxide grown on silicon surface
There is also a strong possibility that it will be obtained.

[0005] A method of modifying the silicon surface by HF-based treatment after the above-described oxidant-based treatment is also used.
By performing this treatment, the natural oxide film on the surface can be completely removed, but the surface becomes considerably hydrophobic. In extreme cases, it has been found that water glass or the like is generated on the wafer surface, which causes contamination.

It has been experimentally confirmed that there is a certain correlation between the degree of growth of the natural oxide film on the exposed silicon surface and the reverse leakage current at the pn junction surface. The relationship is
The result is almost as shown in FIG. 8, which results indirectly supporting the above description.

The CV of single-crystal Al, which has recently attracted attention,
In the selective growth by D, the degree of hydrophilicity of the silicon surface (the degree of the Si surface terminated with H atoms) is an important factor, and even if the natural oxide film grows too much on the silicon surface, the selective growth does not occur. Some point out that it does not work.

[0008]

As described above, in the conventional surface treatment method, the surface becomes sufficiently hydrophilic, but a porous and not so natural oxide film is formed on the exposed surface of the silicon, and the device characteristics are deteriorated. It causes deterioration.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a method for treating the surface of a semiconductor substrate, which suppresses the growth of a natural oxide film on the exposed surface of silicon and enables to obtain a hydrophilic surface with less contamination. And

[0010]

According to the present invention, a surface of a semiconductor substrate having a silicon exposed surface is treated with a quaternary ammonium base aqueous solution to make the surface to be treated hydrophilic at a temperature of 40 ° C. or less. It is characterized in that the treatment is performed under temperature conditions.

[0011]

When a surface of an exposed silicon surface is treated with an aqueous quaternary ammonium base solution, the treatment temperature is kept lower than before so that the growth of a natural oxide film can be suppressed and a hydrophilic surface can be obtained. The fact that the present invention can be achieved has been clarified for the first time by the present inventors. The preferred solution temperature varies depending on the treatment solution used, but is preferably about 60 ° C. or lower.

As the quaternary ammonium base, it is desirable to use tetramethylammonium hydroxide, trimethylhydroxyethylammonium hydroxide, triethylhydroxyethylammonium hydroxide, tripropylammonium hydroxide and the like. In these ammonium bases, the greater the number of carbon atoms of the alkyl group bonded to nitrogen, the lower the ability to clean and etch silicon, but the same cleaning effect can be sufficiently achieved by appropriately adjusting the concentration. it can.

It is preferable that the quaternary ammonium base aqueous solution contains a nonionic surfactant. Examples of the nonionic surfactant include polyoxyethylene alkyl phenyl ether, polyoxyethylene alkyl ether, polyoxyethylene fatty acid ester, polyoxyethylene sordan fatty acid ester, polyoxyethylene.
A block polymer of polyoxypropylene, a cresol / styrene-based copolymer to which ethylene oxide is added, and the like are preferable. By adding a small amount of these nonionic surfactants, the silicon surface is cleaned while suppressing the silicon etching rate of the exposed silicon surface,
It becomes possible to make it hydrophilic. Of course, even without using these nonionic activators, it is possible to suppress the etching rate of the silicon surface only by adjusting the concentration of the quaternary ammonium base.

[0014]

Embodiments of the present invention will be described below. Example 1

FIG. 1 is a view showing a process of manufacturing an insulated gate thyristor utilizing silicon wafer bonding according to an embodiment of the present invention. As shown in FIG. 1 (a), n ^- A first silicon wafer of the mold and p ⁺ Is prepared. The first silicon wafer 1 has a plane orientation (100) and a specific resistance of 170 Ωcm, and has P ⁺³¹ After ion implantation at 1200 ° C., N ₂ / O ₂
Slump in the atmosphere and n ⁺ The mold buffer layer 11 is formed. After that, the oxide film is entirely ^removed , and B ⁺¹¹ By the O ₂ atmosphere annealing of ion implantation and 1100 ° C., p ⁺ The mold layer 12 is formed, and the oxide film on the surface is entirely peeled off with dilute HF. The second silicon wafer 2 has a plane orientation (100) and a specific resistance of about 4 mΩcm.

After the surfaces of the wafers 1 and 2 to be bonded were removed with a scrubber and the like, the treatment of the present invention was performed as a pretreatment immediately before the bonding of the wafers 1 and 2. The specific processing contents and data will be described later.

After performing the surface treatment of the present invention,
The two wafers are bonded and integrated as shown in FIG. Then, after adjusting the wafer to a desired thickness, an insulated gate thyristor as shown in FIG. 1C is formed by a normal element process. In other words, n ^- A p-type base layer 13 and an n-type emitter layer 15 are formed on the mold wafer side, and a gate electrode 14 is formed on the p-type base layer via a gate insulating film 14. The n-type emitter layer 15 has a cathode electrode 16
However, an anode electrode 17 is formed on the p-type emitter layer on the back surface.

For the surface treatment before bonding the wafer, 1% by volume of triethylhydroxyethylammonium hydroxide was used as a quaternary ammonium base. At this time, in order to see the effect of suppressing the natural oxide film on the silicon exposed surface, the room temperature was set to 25 ° C.
The experiment was carried out by changing the processing time, and the processing temperature was changed from room temperature to 9 to see the effect on the processing temperature of the exposed silicon surface.
The temperature was changed to 0 ° C., and the change in the degree of hydrophilicity was examined. The results are shown in FIGS.

As is apparent from FIG. 2, the treatment of the exposed silicon surface with a quaternary ammonium base containing no hydrogen peroxide has a certain effect on the removal of an extremely thin oxide film as small as a natural oxide film, and has grown on the silicon surface. It was found that it had the ability to clean the surface while removing the native oxide film.

Incidentally, in the case of an oxidizing solution containing hydrogen peroxide which is generally used at present, contaminants such as metals taken in the natural oxide film are easily removed due to the inability to remove such a natural oxide film. Cannot be removed.

FIG. 3 shows data obtained by measuring the contact angle of water on the silicon surface and the etching rate with respect to the processing temperature.
From the contact angle characteristics of the silicon surface in this data, it is observed that the silicon surface is sufficiently hydrophilic up to a temperature of 40 ° C. or lower, but suddenly changes to hydrophobic at a temperature of 60 ° C. or higher. This is because a quaternary ammonium base (in this case, trimethylhydroxyethylammonium hydroxide) is 6
It is presumed that it was decomposed at a temperature of 0 ° C. or more and an adsorption reaction of trimethylamine or the like to the silicon surface occurred. The data on the temperature dependence of the silicon etching rate is 60 ° C.
It was confirmed that there was a peak as described above, and above that, the etching rate tended to decrease.

In the case of an oxidizing solution such as a quaternary ammonium base containing hydrogen peroxide, even if the temperature of the solution is raised to about 90 ° C., this rapid silicon surface hydrophobicity does not occur.
In this case, the problem is that there is no cleaning effect in the natural oxide film grown on the silicon surface.

From the results of the examination of this embodiment, it can be seen that the cleaning effect can only be obtained by removing the natural oxide film on the silicon surface and at the same time making the surface of the semiconductor substrate hydrophilic by the treatment method of the present invention. I understand. 40 ° C. of the present embodiment,
Those subjected to the pretreatment immediately before bonding with a 1/20% by volume trimethylhydroxyethylammonium hydroxide solution showed good bonding characteristics, and no particular deterioration in device characteristics due to contamination on the bonding surface was observed.

Although no particular data is shown, the same effect of the surface treatment was performed on other quaternary ammonium bases, and it was confirmed that the same tendency as that of the above-mentioned trimethylhydroxyethylammonium hydroxide was exhibited. Further, even if a nonionic surfactant is added to the treatment liquid, the above-mentioned effects are not changed. It has also been found that when a surfactant is added, the etching rate of silicon can be suppressed, so that even if the treatment is performed for a relatively long time, surface irregularity due to etching of the silicon surface does not easily occur, and the margin for the surface treatment increases. Example 2:

FIG. 4 shows a process of manufacturing a vertical insulated gate MOSFET. As shown in FIG. 4 (a), n ^- The p-type base layer 2 is selectively formed on one surface of the silicon substrate 21 and the n ⁺ The mold drain layer 23 is formed. After removing the oxide film on the surface on which the p-type base layer 22 has been formed and subjecting this surface to a surface treatment, a gate electrode 25 is formed via a gate oxide film 24 as shown in FIG. , N ⁺ The mold source layer 26 is formed by diffusion. Then, the source electrode 27,
The drain electrode 28 is formed and completed.

In the above steps, the pn shown in FIG.
As a surface treatment in a state where the bonding surface is exposed, a mixed solution of hydrochloric acid and hydrogen peroxide (SC-2 treatment) is used. As an example of the treatment method of the present invention, a 1% solution of tetramethylammonium hydroxide is used. The surface treatment effect when the surface treatment was performed at a treatment temperature of 40 ° C. was compared by observing the level of the reverse leakage current at the pn junction surface.

FIG. 5 shows the result. In the SC-2 processing, the reverse leakage current tends to increase significantly, whereas in the processing method of the present invention, the reverse leakage current is clearly suppressed.

According to the method of the present invention, as described in the first embodiment, the surface is made hydrophilic while etching a natural oxide film containing a porous contaminant metal grown on the silicon surface to some extent, and the pn junction surface is formed. It can be effectively cleaned. It is considered that this effect suppresses reverse leakage current caused by surface recombination.

This tendency is particularly noticeable when the pn junction surface is exposed by the RIE method. When the processing method of the present invention is used after the HF processing, the F
Metals attached to the silicon surface, such as e, Al and Na, are effectively removed. The data is as shown in FIG. Example 3

Assuming that single-crystal Al is selectively deposited in the contact hole, while removing the contamination of the exposed silicon surface and simultaneously suppressing the growth of the natural oxide film in that portion, the silicon surface of the contact hole portion is removed. In order to control the degree of hydrophilicity (in other words, the degree of the silicon surface terminated with H atoms) to an arbitrary level with good reproducibility, the effect of the method of the present invention was examined.

FIG. 7 shows the result of treating a silicon surface at a liquid temperature of 25 ° C. using a 1% solution of trimethylhydroxyethylammonium hydroxide as a quaternary ammonium base. From these results, it is found that the use of the method of the present invention suppresses the natural oxide film and the F adsorbed on the silicon exposed surface.
It is possible to remove the e-type contaminant metal, and by arbitrarily selecting the treatment time, the degree (hydrophilicity) of the silicon surface terminated with H atoms, which is an important factor for selective CVD of single crystal Al, can be reduced. It became clear that control could be performed with good reproduction.

[0032]

As described above, according to the present invention, while suppressing the natural oxide film on the silicon exposed surface and modifying the surface to a hydrophilic surface, the silicon is adsorbed on the silicon surface by a process such as a pre-process. Metal contamination and the like can be effectively removed.

[Brief description of the drawings]

FIG. 1 is a diagram showing a manufacturing process of an insulated gate thyristor according to an embodiment.

FIG. 2 is a view showing a relationship between a processing time and a natural oxide film thickness according to the embodiment.

FIG. 3 is a view showing a relationship between a processing time, a contact angle of an exposed silicon surface, and an etching rate according to the embodiment.

FIG. 4 is a view showing a manufacturing process of a vertical MOSFET according to another embodiment.

FIG. 5 is a diagram showing a reverse leakage current of a pn junction according to the same example as compared with SC-2 processing.

FIG. 6 is a view showing data of a metal contamination removing effect according to the embodiment.

FIG. 7 is a diagram showing a relationship between processing time and hydrophilicity of an exposed silicon surface according to another embodiment.

FIG. 8 is a diagram showing a relationship between a natural oxide film thickness and a pn junction reverse leakage current.

[Explanation of symbols]

1 ... the first silicon wafer (n ^- 2) Second silicon wafer (p ⁺ Mold layer), 11 ... n ⁺ Mold buffer layer, 12 ... p ⁺ Mold layer, 13 p-type base layer, 14 gate electrode, 15 n ⁺ Type emitter layer, 16 ... cathode electrode, 17 ... anode electrode, 21 ... n ^- Type silicon wafer, 22 ... p type base layer, 23 ... n ⁺ Type drain layer, 24 gate oxide film, 25 gate electrode, 26 n ⁺ Type source layer, 27: source electrode, 28: drain electrode.

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-1-14924 (JP, A) JP-A-50-158281 (JP, A) JP-A-50-158282 (JP, A) JP-A 50-158 147281 (JP, A) JP-A-60-21526 (JP, A) JP-A-63-274149 (JP, A) JP-A-50-147287 (JP, A) JP-A-2-232925 (JP, A) Japanese Patent Publication No. 55-2474 (JP, B2) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/304, 21/306, 21/308

Claims (2)

(57) [Claims] A semiconductor substrate having an exposed silicon surface is bonded to a fourth substrate.
A method for treating a surface of a semiconductor substrate, wherein the treatment is performed using an ammonium base solution under a liquid temperature condition of 40 ° C. or less at which the silicon surface becomes hydrophilic. 2. The method according to claim 1, wherein the quaternary ammonium base solution contains a nonionic surfactant.