JP3075856B2 - Computer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a computer having a security function, and more particularly, to a power-on password check function for judging whether a system can be used or not by collating a password when the system is turned on when the system is turned on. The present invention relates to a computer having an operation lock function for temporarily disabling the system and an operation lock release function for releasing the lock function.

[0002]

2. Description of the Related Art In recent years, personal computers have become smaller, lighter, more easily carried, and have higher performance and higher functionality. Especially in recent years, HD
Personal computers such as laptop-type and book-type personal computers which are equipped with a large-capacity storage such as a D (hard disk device) and a RAM pack, and further have a card interface such as PCMCIA, which can be driven by a battery, have been in widespread use.

[0003] This type of personal computer is characterized by great portability and can be easily used by simple operation regardless of location. Therefore, sufficient consideration is required for security functions. As a means for realizing this kind of security function, a security mechanism based on password verification is widely used.

[0004] Security by password verification includes:
A password check (power-on password check) function executed when the system power is turned on, a password check (operation password check) function executed when the operation lock is released, and the like are provided.

[0005] Among the above password checks, the power-on password check is for judging the right to use the system at the time of system startup, and the operation password check is for temporarily displaying and operating input during execution of an application. This is for releasing the operation lock in the instant security function for suspending the function, and the use forms are completely different.

In a conventional portable computer having a security mechanism based on this type of password collation, a single, that is, a common password check function is used for a password check function that is completely different in usage form. Therefore, if a password is set in anticipation of a security effect, operations such as operation lock release become troublesome, and a security effect cannot be expected if the operability of operation lock release is improved.

Particularly, in recent personal computers, the performance and functions have been remarkably improved, and the information to be handled is often highly confidential. Is required.

[0008]

As described above, in the conventional personal computer, the security mechanism based on the password collation uses a common password check function for a completely different password check function. Therefore, there were problems in terms of operability, security effects, and the like.

The present invention has been made in view of the above circumstances,
The power-on password when the system power is turned on and the operation password for unlocking the operation lock in the instant security function can be set independently, improving operability (ease of use) and improving security functions by password checking. It is an object of the present invention to provide a computer having a highly reliable security function.

[0010]

As shown in FIG. 1, the present invention comprises a password check function when the system power is turned on, an operation lock for temporarily disabling the system, and a function for releasing the operation lock. Issue a power-on password check command (power-on password mode command) during the on-password check,
The CPU 1 that issues an operation lock release command (operation lock password mode command) when releasing the operation lock, a plurality of power-on passwords, and a plurality of operation passwords used for releasing the operation lock can be individually registered. A password registration memory 2, an input unit 3 for inputting a password, a password check unit 4 for checking a password input from the input unit 3 with reference to a power-on password registered in the password registration memory 2 and an operation password. And is provided.

[0011]

The CPU 1 issues a power-on password check command (power-on password mode command) in an initialization process (or a resume process) when the system power is turned on.

In accordance with the issuance of this command, the password check unit 4 compares and compares the password input from the input unit 3 with the power-on password registered in the password registration memory 2 and, when a match is found, a password match. Is returned to the CPU 1. The CPU 1 continues the process of starting the system according to the password matching response.

When an operation lock release command is input, the CPU 1 issues an operation lock release command (operation lock password mode command).

In accordance with the issuance of this command, the password check unit 4 compares and compares the password input from the input unit 3 with the operation password registered in the password registration memory 2, and when the password matches, the password check unit 4 determines whether the password matches. A response is returned to CPU1. The CPU 1 releases the operation lock in accordance with the password matching response, and enables the continuous use of the system.

As described above, since the power-on password when the system power is turned on and the operation password for releasing the operation lock in the instant security function can be independently set, the operability (ease of use) is improved. In addition, the security function can be improved by the password check, and the security function by the password check can be enhanced.

[0016]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a functional block diagram for explaining the outline of the present invention.

In FIG. 1, reference numeral 1 denotes a power-on password check command at the time of power-on password check, which is provided with a password check function accompanying system power-on, an operation lock for temporarily disabling the system, and a function for releasing the system lock. CPU that issues a (power-on password mode command) and issues an operation lock release command (operation lock password mode command) when the operation lock is released
It is.

Reference numeral 2 denotes a password registration memory in which a plurality of power-on passwords and a plurality of operation passwords used for releasing the operation lock can be individually registered.

Reference numeral 3 denotes an input unit (KB) for inputting a password (password character string). A power-on password is input when the system power is turned on, and an operation password is input when the operation lock is released.

Reference numeral 4 denotes a password check unit for checking the password input from the input unit 3 with reference to the password (power-on password / operation password) registered in the password registration memory 2, and a power-on password check command ( When a password is checked according to the power-on password mode command), the input password is checked by referring to the power-on password registered in the password registration memory 2,
When performing a password check in accordance with the operation lock release command (operation lock password mode command), the input password is checked with reference to the operation password registered in the password registration memory 2. In the actual machine, when the operation password is not registered, the paired power-on password is referred to as the operation password (that is, the power-on password is the default operation password). Here, the basic operation of the present invention will be described with reference to FIG.

The CPU 1 issues a power-on password check command (power-on password mode command) in an initialization process (or a resume process) when the system power is turned on.

At this time, in the actual machine, a password input screen is displayed on the display unit under the control of the BIOS in accordance with the password check command. Even if a password character string is input on this password input screen, the input character (password content) is not displayed. This prevents the password from being leaked to a third party.

When the power-on password check command is issued, the password check unit 4
Password entered by the user and password registration memory 2
Compares with the power-on password registered in
If a match is found, a password match response (in the actual device, the position of the matched password in the password registration memory 2 as data, and the status “00” indicating normal termination as data)
h ") is returned to the CPU 1. When receiving the password matching response, the CPU 1 continues the subsequent processing and starts up the system.

In the operation lock state, a key input only for inputting a password is permitted (a character string until immediately before the [Enter] key is pressed is stored in an input buffer), and other key inputs are ignored. You. At the same time, all display is turned off.

When a password is input in the operation lock state, the password input state is changed by the CPU.
1 and the CPU 1 issues an operation lock release command (operation lock password mode command).

In accordance with the issuance of this command, the password check unit 4 compares and compares the password input from the input unit 3 with the operation password registered in the password registration memory 2, and when a match is found, a password match is determined. A response is returned to CPU1. The CPU 1 releases the operation lock in accordance with the password matching response and enables the system to be continuously used (accepts a key input and restores the screen display).

As described above, since the power-on password when the system power is turned on and the operation password for releasing the operation lock in the instant security function can be set independently, the operability (ease of use) is improved. In addition, the security function can be improved by the password check, and the security function by the password check can be enhanced. A specific example of a system having the above-described security function will be described with reference to FIGS.

FIG. 2 is a block diagram showing a system configuration, FIG. 3 is a block diagram showing a configuration of a main part of the present invention in FIG. 2, and FIG. 4 is a PCMCIA-GA (P) shown in FIGS.
FIG. 3 is a block diagram showing an internal configuration of a CMCIA gate array) 26.

In FIG. 2, the CPU 1 shown in FIG.
U21, the password registration memory 2
Is implemented by an EEPROM 29, and the input unit 3 includes a keyboard controller (KBC) 30 and a keyboard (K
B) 51, and the password check unit 4 is realized by microprogram processing means by a built-in processor of the keyboard controller (KBC) 30.
At this time, the transfer of the command / parameter from the CPU 21 to the keyboard controller (KBC) 30 and the transfer of the command / parameter from the keyboard controller (KBC) 30 to the CPU 21
The response (data / status) is transmitted to the status LCD control gate array (SLCDC.
GA) 26 through a data communication register,
PCMCIA gate array (PCMCIA GA) 28
The transfer of data and address between the EEPROM and the EEPROM 29 is performed through a dedicated line. FIG.
1 shows a system configuration of a portable computer according to an embodiment of the present invention.

This portable computer is a laptop or notebook type personal portable computer, and is an ISA (Industry Standar).
d Architecture) system bus (ISA-BU)
S) 11, Peripheral interface bus (PI-BUS) for high-speed graphic transfer
12. Keyboard interface bus (KBC-BU)
S) 13 and a power supply interface bus (PSC-
BUS) 14.

The system bus (ISA-BUS) 11 has a CPU 21 and an I / O controller (I / O-C).
ONT) 22 is connected. CPU 21 and I /
As the O-controller 22, a microprocessor 80386SL manufactured and sold by Intel Corporation in the United States and a family chip 82360SL are used.

The CPU 21 controls the entire system, and executes a processing target program stored in the system memory 23. Here, a password control command (power-on password status command / power-on password mode command / operation lock password) is used for initialization processing (IRT processing), resume processing, operation lock release processing, and the like when the system power is turned on. Status command / operation lock password mode command, etc.)
The status LCD control gate array (SLC) shown in FIG.
It has processing means for sending the data to the keyboard controller (KBC) 30 via the data communication register (CR) of the DC / GA 26. The details of the password control command will be described later.

At this time, the CPU 21 transmits a password registration confirmation command (power-on password status command) to the status LCD control gate array (SLCDC / GA) shown in FIG. ) Keyboard controller (KBC) 3 via 26 data communication registers (CR)
Send to 0. When it is confirmed from the response content (number of registered passwords) from the keyboard controller (KBC) 30 accompanying the issuance of this command that the password has been registered (number of registered passwords ≠ 0), the password input message data is converted to VGA by a BIOS call. Send the password input message to the controller 32
D panel 49, and a power-on password mode command.
LCDC / GA) 26 data communication register (CR)
Via the keyboard controller (KBC) 30. Then, it waits for the completion of the password input.

For each control of the CPU 21, the keyboard controller (KBC) 30 receives the password registration confirmation command, returns the number of registered passwords as a response to the CPU 21, and receives the power-on password mode command, and receives a key input. EE password
The password is compared with the password registered in the PROM 29, and when the password matches, an ACK code (actually, a matching password position in the EEPROM 29 as data, and "00h" as a status) is returned. When the password does not match, a RESEND code (actual "FFh" as data and "01h" indicating that there is no matching password as status, and the password control command processing ends.

In the normal operation, the CPU 21 causes the data communication register (CR) of the status LCD control gate array (SLCDC / GA) 26 to be reset by an SMI interrupt, which will be described later, accompanying the operation of the hot key (Fn + F1). When the operation lock password mode command is received through the status LCD control gate array (SL)
It is issued to the power supply controller (PSC) 46 and the keyboard controller (KBC) 30 via the data communication register (CR) of the CDC / GA) 26. Upon receiving the command, the keyboard controller (KBC) 30 prohibits transmission of the scan code (key input data) to the CPU 21. The power supply controller (PS
C) 46 stops power supply for screen display.

In this manner, the operation lock control is executed, ignoring the input from the keyboard, the mouse and the like, erasing all the screen display, and making the system unusable.

This operation lock can be released by inputting a password from the keyboard (KB) 51. The operation lock release notification process at this time is executed by the keyboard controller (KBC) 30. That is, when releasing the operation lock,
After a password character string is input from the keyboard (KB) 51, a specific function key (here, “Enter
the "r" key). Keyboard controller (KB
C) 30 detects the input of the “Enter” key, compares the keyed-in password with the password registered in the EEPROM 29, and releases the operation lock when the password is matched or the password is not registered. A notification is sent to the CPU 21 (specifically, when the password matches, the EE that matches
The registration password position in the PROM 29 and “00h” as the status are transmitted, and the process returns to the normal key input process. When there is no registration password, “0” is used as data.
0h "and" 00h "as the status, and return to the normal key input process.) Thereby, the CPU 21 releases the operation lock. That is, the operation lock release command is transmitted to the power supply controller (PSC) 46 via the data communication register (CR) of the status LCD control gate array (SLCDC / GA) 26.
Then, the data is sent to the keyboard controller (KBC) 30 to resume receiving the input of the keyboard, the mouse, etc., and to restore the screen display.

The CPU 21 has a power management function for low power consumption, such as powering down various I / Os at idle. This power management function is provided by a system management interrupt (SMI).
ent Interrupt).

The interrupts of the CPU 21 include non-maskable interrupts (NMIs) in addition to SMIs.
rupt) and maskable interrupt (INTR; Maskable)
Interrupt).

The SMI is a kind of non-maskable interrupt, but is the highest priority hardware interrupt having a higher priority than the above-mentioned NMI and INTR, and is activated by activating the interrupt request input SMI of the CPU 21. Is done. Similarly, the non-maskable interrupt and the maskable interrupt are activated by activating interrupt request inputs NMI and INTR (not shown) of the CPU 21.

The interrupt by the SMI is used not only for the operation lock function by the hot key operation described above, but also for executing a process related to another hot key operation and a process for power management.

The I / O controller 22 is a dedicated logic for realizing a CPU and memory support function, and controls an I / O device connected to the serial port 41 and a printer port (EPP: Enhanced Printer P).
ort) 43 to control an external printer connected to the printer.
The I / O controller 22 has two DMA controllers for direct memory access control,
Interrupt controller (PIC; Programmable Interru)
pt Controller), Timer (PIT; Programmab)
le Interval Timer), two serial I / O controllers (SIO), two real-time clocks (RTC)
k) are each incorporated. The real-time clock is a clock module having a unique operation battery, and a CMOS static RAM (hereinafter referred to as a CMOS memory) to which power is constantly supplied from the battery.
have. This CMOS memory is used for storing setup information indicating the system configuration.

Communication between the CPU 21 and the I / O controller 22 is executed via a system bus (ISA-BUS) 11 or a dedicated interface line provided between the CPU 21 and the I / O controller 22. You. C
The interface signal between the PU 21 and the I / O controller 22 includes, for example, a signal for controlling the SMI function of the CPU 21 and the like.

That is, the interrupt request input SM of the CPU 21
I is connected to the I / O controller 22 or the status LCD control gate array (SL) via an AND gate G1.
Active-low S output from the CDC / GA) 26
An MI signal is provided. The SMI signal from the status LCD control gate array (SLCDC / GA) 26 is generated when a hot key process, which will be described later, is requested to the CPU 21, and the SMI signal from the I / O controller 22 is based on a timer. I / O by monitoring
This occurs when the necessity of power down is detected.

Here, the hot key is a key for directly requesting the CPU 21 to execute a special function such as setting / changing of a system operating environment.
The specific keys above are assigned as the hotkeys. When this hot key is operated, the CPU
Some functions related to setting / changing the system operating environment provided by 21 are directly called and executed.
In this hot key processing, the system bus (ISA)
SMI is issued to the CPU 21 without performing normal key data transmission via the (BUS) 11 and the key of the hot key is transmitted through the keyboard interface bus (KBC-BUS) 13 and the status LCD control gate array (SLCDGA). The data is transmitted to the CPU 21 at high speed.

C which can be called by hot key
The functions of the PU 21 include a power save mode switching function, a resume / boot mode switching function,
There are a CD / CRT display switching function, an LCD panel black-and-white inversion display function, and the like. These functions are available in the BIOS-RO
M25 is provided by a program stored in M25.
Sorted by a hot key processing program started by the MI. Since the hot key processing program is a memory resident termination type program, the function corresponding to the pressed hot key can be immediately called even during the execution of the application program. At this time, there is no effect on the running application or the like.

The functions that can be called by the hot keys include functions that are directly executed and controlled by hardware instead of the CPU 21. This feature includes
Some are executed by a keyboard controller (KBC) 30, which will be described later, some are executed by a power supply controller (PSC) 46, and some are executed by a PCMCIA gate array (PCMCIA GA) 28. The keyboard controller (KBC) 30 provides an "Arrow" mode setting function in which some keys on the keyboard 51 are overlaid on arrow keys, and some keys on the keyboard 51 are used as numeric keys. "Numeric" mode setting function used by overlaying, "ScrollLoc" of the keyboard 51
k ”mode setting function. Power supply controller (PS
C) 46 provides a function of adjusting the contrast / brightness of the LCD panel 49 and a function of adjusting the volume of a speaker (not shown). Provided by the PCMCIA gate array (PCMCIA GA) 28 is:
This is an operation lock / release function called instance security.

The local bus of the CPU 21 is connected to a system memory 23 and an optional DRAM card 24. The system memory 23 is used as a main memory of the system, and stores programs and data to be processed. The system memory 23 has a storage capacity of 4 Mbytes as standard. The DRAM card 24 is used as an extension memory of the computer system, and is optionally connected to a dedicated card slot of 88 pins provided in the computer body. This DRAM card 24 has 2
There are types such as M bytes, 4 M bytes, 8 M bytes, and 16 M bytes.

The system bus (ISA-BUS) 1
1 is connected to a BIOS-ROM 25. The BIOS-ROM 25 stores a basic input / output program (BI
An OS (Basic I / O System) is stored in the flash memory (FLASH MEM) so that the program can be rewritten. The basic input / output program includes a program for initialization processing at power-on, a driver program for controlling various input / output devices, and a program for performing processing related to hot key operations. ing.

The flash memory (FLASH MEM) constituting the BIOS-ROM 25 is a PCMCIA
Initial setting is possible only when the maintenance privilege is set as the access right in the security register of the gate array (PCMCIA GA) 28, and the control will be described later.

The system bus (ISA-BUS) 11 further includes a status LCD control gate array (SL).
CDC / GA) 26, floppy disk controller (FDC) 27, PCMCIA gate array (PCMC
IA / GA) 28, keyboard controller (KBC)
30, an expansion connector 31 to which an expansion unit (Desk Station) can be attached, and a hard disk drive (HDD)
42 and the like are connected.

Status LCD control gate array (SL
The CDC / GA) 26 controls the display of the status LCD 44, communicates with the keyboard controller (KBC) 30,
And a communication with a power supply controller (PSC) 46. In the display control of the status LCD 44, the status LCD control gate array (SLCDC / GA) 2
Reference numeral 6 denotes a status L indicating the remaining battery operation time and various operating environment states which can be set / changed by operating a hot key.
Display on CD44. The status LCD 44 is a liquid crystal display provided exclusively for displaying remaining battery operation time and various operating environment conditions.

PCMCIA gate array (PCMCIA
GA) 28 has a 68-pin PCMCIA (Personal Computer Memory Card Interface) which is optionally installed in slots A and B of PCMCIA port 48 as a main function.
rnational Association) card read / write control and communication with a keyboard controller (KBC) 30. In addition, this PCMCIA gate array (P
The CCMIA GA 28 includes an interface logic with the EEPROM 29 in which a password is registered, and a logic for implementing a security function. This PCMCIA gate array (PCMCIA
The specific configuration of the GA) 28 will be described later with reference to FIGS.

This PCMCIA gate array (PCMC
Among the slots A and B of the two PCMCIA ports 48 connected to the IA / GA 28, the slot A is a PCMCIA card of all types (Thick type of 18 mm thickness, type 3 of 10.5 mm thickness, and type 3 of 5.0 mm thickness). Type 2,
And 3.3 mm thick type 1), slot B
Supports two types of PCMCIA cards, Type 2 and Type 1. Here, a small PCMCIA card having a thickness of 5.0 mm or 3.3 mm is used as a security card.

PCMCIA gate array (PCMCIA
・ GA) 28 security functions include a password read from a PCMCIA security card and EE
It includes a processing function of verifying the password of the PROM 29 and permitting activation of the system only when the passwords match.

Also, a PCMCIA gate array (PCMCIA
The security functions of the IA / GA 28 include an operation lock called instance security and a release function thereof. The instance security function by the operation lock is performed by a predetermined hot key (Fn + F) from the keyboard controller (KBC) 30.
1) It is realized by turning off the display screen of the LCD panel 49 or executing key lock of the keyboard 51 in response to an instruction accompanying the operation.

PCMCIA gate array (PCMCIA
The (GA) 28 communicates with a keyboard controller (KBC) 30 via a keyboard interface bus (KBC-BUS) 13 to receive an instruction for the hot key (Fn + F1) operation.

Status LCD control gate array (SL
CDC / GA) 26 and keyboard controller (KB)
C) 30 and communication between the PCMCIA gate array (PCMCIA GA) 28 and the keyboard controller (KBC) 30 are used to transmit various control information between the CPU 21 and the keyboard controller (KBC) 30, respectively. A path for performing high-speed transfer is realized, and a dedicated keyboard interface bus (KBC-BUS) 13 is used for the communication.

That is, the status LCD control gate array (SLCDC / GA) 26 has an I / O register group for holding control information exchanged between the CPU 21 and the keyboard controller (KBC) 30. The controller (KBC) 30 reads / writes the registers via the keyboard interface bus (KBC-BUS) 13. The CPU 21 reads / writes these register groups via the system bus 11. This register group includes data communication registers (C
R), a register having bits for supplying the SMI signal to the AND gate G1, a keyboard controller (KB)
C) A hot key register for holding key data of the hot key transmitted from 30 is included.

Keyboard controller (KBC) 30
Is for controlling a standard built-in keyboard (KB) 51 built in the computer main body, scans a key matrix of the built-in keyboard 51, receives a signal corresponding to a pressed key, and receives a predetermined key code. Convert to At this time, the key code corresponding to the hot key provided on the built-in keyboard 51 is transmitted to the status LCD control gate array (SLDC / GA) 2 via the keyboard interface bus (KBC-BUS) 13.
6 is sent. On the other hand, other key codes other than the hot keys are transmitted to the system bus (ISA-BUS) 11 as usual.
Is transmitted to the CPU 21 by serial communication of a handshake method via the. The keyboard controller (KBC) 30 is a mouse 5 that is optionally connected.
2. It also has a function of controlling the external keyboard 53.

A keyboard controller (KBC) 3
0 is a processor that realizes a security function,
It has various password control functions including password check.

The password control function includes the CPU 21
Execution of various password control commands and transmission of their responses. The execution of the password control commands includes setting / updating / cancelling of power-on password, access right and operation lock password, inputting and checking each password. , Access right control (Settings /
Update / release, etc.), transmission control of a response, etc., and access control of the EEPROM 29 for setting / updating / releasing the above-mentioned passwords and access rights. These controls will be described later.

Status LCD control gate array (SL
CDC / GA) 26 and power supply controller (PSC) 46
Communication with the CPU 21 and the power supply controller (PSC)
A path for performing high-speed transfer of various types of control information between the ports 46 is realized, and a dedicated power supply interface bus (PSC-BUS) 14 is used for the communication. That is, the status LCD control gate array (SLCDC
The GA) 26 includes an I / O including a data communication register (CR) that holds control information transmitted and received between the CPU 21 and the power supply controller (PSC) 46 as described above.
Power supply controller (PSC) with registers
46 is a power supply interface bus (PSC-BUS)
The corresponding register group is read / written via. The CPU 21 reads / writes these register groups via the system bus 11. Power supply controller (P
The function of the hot key processing by the SC 46 is executed by reading the key data of the hot key register of the status LCD control gate array (SLDC GA) 26 via the power supply interface bus (PSC-BUS) 14.

The floppy disk controller (FD)
C) 27 is a 3.5-inch, 750K / 1.44 Mbyte 2-mode floppy disk drive (FDD)
45, and has a built-in variable frequency oscillator (VFO).

The extension connector 31 has an extension unit (D
(esk Station) can be connected, and the functions can be expanded by mounting various expansion boards such as a communication board to the expansion unit. Hard disk drive (H
The DD 42 is an IDE (Integrated Drive Electro).
nics) interface, and the access is directly controlled by the CPU 21. This hard disk drive (HDD) 42 is 2.5 inches, 120M / 200
It has a storage capacity of M bytes.

The peripheral interface bus (PI-BU)
The S) 12 is connected to a display controller (hereinafter, referred to as a VGA controller) 32 conforming to the VGA (Video Graphics Array) specification. The VGA controller 32 is provided with an LCD panel 4 having a backlight of monochrome gradation display or color display, which is provided as standard.
9 for controlling display of a color CRT 50 which is optionally connected, and receives image data from the CPU 21 via the peripheral interface bus (PI-BUS) 12 and renders it in an image memory (VRAM) 33.

Further, this system is provided with a power supply controller (PSC) 46 and a power supply circuit (PS) 47. The power supply controller (PSC) 46
It is for controlling the supply of power supply voltage from the power supply circuit 47 to each unit in accordance with an instruction from U21.
Communication with the power supply interface bus (PS)
C-BUS) 14 and a data communication register (CR) of the status LCD control gate array (SLCDC / GA) 26. The power supply controller (PSC) 46 performs hot key processing such as brightness / contrast adjustment of the LCD panel 49 and speaker volume adjustment in accordance with key data input to the hot key register of the status LCD control gate array (SLCDC / GA) 26. Also perform The power supply circuit 47 generates an internal power supply having a predetermined voltage value to be supplied to each unit from a battery built in the computer main body or an external power supply supplied via an AC adapter. Further, the power supply circuit 47 generates a backup power supply (BK) even when the power switch of the computer is turned off, and supplies the power supply to each unit requiring a power supply backup.

The EEPROM 29 includes a PCMCIA gate array (PCMCIA GA) 28 and a dedicated EEPROM access line 15 including address and data lines.
Keyboard controller (KBC)
The power-on password, access right, and operation password for two items for maintenance, four items for user, and up to six items can be registered. The characteristics of the access right and the like will be described later.

Initialization and writing to the EEPROM 29 are performed by a PCMCIA gate array (PCMCIA gate array).
When a supervisor privilege is set as an access right in the security register of the A / GA) 28, all passwords and access right areas can be accessed for setting / updating / deleting. When set, access to update your password is available. These controls will be described later.

Of the above input / output devices, the serial port 41, hard disk drive (HDD) 42, printer port (EPP) 43, floppy disk drive (FDD) 45, and PCMCIA port 48 are each associated with a power-on password. Access rights (device access rights). Next, a specific configuration example of the PCMCIA gate array (PCMCIA GA) 28 is shown in FIGS.

PCMCIA gate array (PCMCIA
GA) 28, as shown in FIGS. 3 and 4, a 1-byte access right is set in a security register (S
R), a plurality of Es for controlling access to the EEPROM 29
A dedicated register group 201 including n 8-bit registers including an EPROM access control register (MR) and the like, and an ISA coupled to the system bus (ISA-BUS) 11
-BUS interface logic 202, KBC-BUS interface logic 203 coupled to the keyboard interface bus (KBC-BUS) 13, E
EEPROM coupled to dedicated line 15 of EPROM 29
The OM interface logic 204, the dedicated register group 201 under the control of the keyboard controller (KBC) 30, and the interface logic 20
A password control logic 205 for controlling 2, 203, 204 and the like is provided.

The ISA-BUS interface logic 202 is for controlling the interface with the system bus (ISA-BUS) 11, and performs read / write control of the dedicated register group 201 in response to a request from the CPU 21. CPU 2 via system bus 11
1, an address enable signal (AEN) supplied from
Dedicated register designation signal (SPREG), system address signal (SA0), I / O read signal (IORD), I
An / O write signal (IOWR) and 8-bit system data bus (SD) data in the system bus 11 are used.

The KBC-BUS interface logic 203 reads / writes the dedicated register group 201 in response to a request from the keyboard controller (KBC) 30, and controls the keyboard interface bus (K
The read / write signal (R) supplied from the keyboard controller (KBC) 30 via the BC-BUS 13
/ W), strobe signal (STROB), and 8 in the keyboard interface bus (KBC-BUS) 13
The address / data on the KBC data line (KBS-DATA) is used. Further, the KBC-BUS interface logic 203 notifies the keyboard controller (KBC) 30 of the data content of the register set by the CPU 21 via the keyboard interface bus (KBC-BUS) 13. To the request signal (RE
QUEST).

EEPROM interface logic 2
Reference numeral 04 denotes an address (Address) and a read / write command according to the setting of the EEPROM access control register (MR) under the control of the keyboard controller (KBC) 30.
Write signal (R / W) to EEPRO via dedicated line
The data (password character string) is read out and written to the EEPROM 29.

The contents and structure of the password and access right stored in the EEPROM 29 are shown in FIGS. 5 and 6, and the PCMCIA gate array (PCMCIA.G
A) FIG. 7 shows an example of controlling the access right set in the security register (SR) 100 of A) 28. FIG. 8 shows processing procedures of a power-on password check according to a power-on password check command (power-on password mode command) and an operation lock password check according to an operation lock release command (operation lock password mode command). Here, the features of the security function based on the password check in the embodiment of the present invention will be described with reference to specific examples.

In the embodiment of the present invention, the power-on password for turning on the system power and the operation password for releasing the operation lock in the instant security function can be set independently of each other, so that operability (usability) is improved. Good) and a highly reliable password checking security function is realized. Here, the password support and the password control command in the above embodiment will be described.

In this embodiment, a security function using a power-on password and a security function
It has a security function using an operation lock password.

These passwords are stored in the EEPROM 2 directly connected to the keyboard controller (KBC) 30 under the access control of the keyboard controller (KBC) 30.
9 is stored. Checking of passwords (character comparison and judgment) and setting of access rights are also performed by keyboard controller (K
BC) 30. The password registered in the EEPROM 29 cannot be read from the system by the above-mentioned back bus function. Here, a “password control command” is provided for password processing.

The “password control command” is sent from the CPU 21 to the keyboard controller (KBC) 30 via the data communication register (CR) of the status LCD control gate array (SLDC / GA) 26.

The CPU 21 controls the keyboard controller (K
The commands / parameters to be output to the BC) 30 are stored in a dedicated register group (PCMCIA gate array 28) provided in the status LCD control gate array (SLDC / GA) 26.
In the first data communication register (CR-a) in the dedicated register group 201). To notify this to the keyboard controller (KBC) 30, the CP
The U21 sets the predetermined bit of the second data communication register (CR-b) to “1”, thereby transmitting a request signal (REQUES) to the keyboard controller (KBC) 30.
T). At this time, the command / parameter is distinguished by the value of a predetermined bit of the third data communication register (CR-c).

Keyboard controller (KBC) 30
When receiving the request signal (REQUEST), the status LCD control gate array (SLDC / GA) 2
6 to determine whether the command is a command or a parameter from the value of a predetermined bit of the third data communication register (CR-c).
The data (command / parameter) stored in a) is read. And the second data communication register (CR-b)
Is cleared to "0" to end the reception. When there are a plurality of bytes, the above data reading procedure is repeated.

Transmission of a response (parameter) from the keyboard controller (KBC) 30 to the CPU 21 is as follows.
One byte of “data” and one byte of “status” are set.

For transmission, "data" is written into the fourth data communication register (CR-d) in the dedicated register group (corresponding to 201) provided in the status LCD control gate array (SLDC / GA) 26, and " Status "is 5th
A predetermined bit of the sixth data communication register (CR-f) is set to "1" in order to write to the data communication register (CR-e) and notify the CPU 21 of this.

When the predetermined bit of the sixth data communication register (CR-f) is "1", the CPU 21 outputs the fourth data communication register (CR-d) and the fifth data communication register (CR-f). The value (data status) of the register (CR-e) is read, and a predetermined bit of the sixth data communication register (CR-f) is cleared to “0”. Thus, data communication is performed between the CPU 21 and the keyboard controller (KBC) 30.

As shown in FIG. 6, a maximum of six power-on passwords, two for maintenance and four for user registration, can be registered in the EEPROM 29 accessed by the keyboard controller (KBC) 30.

On the setup screen, it is possible to select whether or not to check the power-on password, and to register / update / delete the password. At this time, when "no password check" is set, the system starts up in the same manner as a normal system without a password check function. In the case of "with password check", an input of a password is requested at the time of initialization processing at the time of power-on and at the time of resume processing. If the entered password is correct, the system is started.

When "Password check" is set in the setup, the power-on password registered in the EEPROM 29 is referred to in the password check processing in the power-on initialization processing. If the entered password does not match this registered password, the system will not start. However, when the user password is not registered, the power-on password check is not performed (at this time, “supervisor privilege” is given as the access right).

Among the power-on passwords, up to four passwords used by the user can be registered (the same password cannot be defined more than once). At this time, the first is for a supervisor, and the second and later are for general users. Register / update / update power-on password by using this user
Deletion is performed by a special utility.

As shown in FIGS. 5 to 7, each power-on password can have an access right. The access right defines a range that can be operated by a user when started up by the password data.

The access rights include supervisor privilege, password update right, HDD access right, FDD access right,
There are a serial port access right, a printer port access right, and a PCMCIA access right. In addition, there are maintenance privileges that generally do not release. The power-on password has the following restrictions depending on the access right. (1) Maintenance privilege (bit 7) All privileges including rewriting of the EEPROM 29 and initial setting of the EEPROM 29 are given, and are given only to the maintenance password.

The maintenance privilege is the BIOS-ROM2
5 Rewrite and all other rights. This right is not released to general users (for maintenance only). Up to two power-on passwords having this maintenance privilege can be defined. This setting is performed by a dedicated program (such as T & D). If the user does not have the maintenance privilege, the write signal of the BIOS-ROM 25 is gated. (2) Supervisor privilege (bit 6) This is the authority to set, update, and delete all user passwords and access rights, including themselves. This includes all rights except maintenance privileges.

[0092] The user password initially set is given supervisor privilege by the utility. 2
Supervisor privileges can be set for the third and subsequent passwords. Those with supervisor privileges can register, update, and delete all user passwords. That is, the supervisor privilege is the BIOS-R configured by the flash memory (FLASH MEM).
Has all rights except for rewriting OM25. You can also set another person's password and access rights. (3) Password update right (bit 5)

The right to update own password is given. You cannot update other passwords. The password update right is a right to determine whether or not to allow the update of the power-on password. If not, the user cannot update his / her own password by setup or power-on password update (keyboard controller (KB)
C) 30 rejects the corresponding command). Those who have neither supervisor privilege nor password update right cannot set, update, or delete the password.

When a password update right is given by the access right, the password can be updated only by inputting a registered password to be updated and writing a new password following "/". . At this time, the password is compared by a power-on password check command included in the password control command. (4) HDD access right (bit 4) (5) FDD access right (bit 3) (6) Serial port access right (bit 2) (7) Printer port access right (bit 1) (8) PCMCIA access right (bit 0)

HDD access right, FDD access right, serial port access right, printer port access right,
The PCMCIA access right is a right as to whether or not to permit access to each unit. Unauthorized units cannot be accessed (also excluded from the system configuration list). In the hardware control by the security register (SR) 100, when the HDD access right is not permitted (when the bit 4 (b4) of the security register (SR) 100 is not set to “1”), the hard disk drive (HDD) All 42 chip selects are gated. When the FDD access right is not granted (bit 3 (b) of the security register (SR) 100
When "1" is not set in 3)), the motor-on signal of the floppy disk drive (FDD) 45 is gated. When the serial port access right is not permitted (bit 2 (b) of the security register (SR) 100
2) When "1" is not set), serial port 4
The transmission data SD and the reception data RD of one SIO are gated. When the printer port access right is not permitted (bit 1 of security register (SR) 100)
When (1) is not set to (b1), the chip select of the control chip of the printer port 43 is gated. When the PCMCIA access right is not granted (bit 0 of security register (SR) 100)
(When “1” is not set in (b0)), PCMCIA
The chip select of the control chip of the port 48 is gated.

In the above device access right, the HDD access right and the FDD access right
HDD access right, FDD, etc.
To ensure that one of your access rights is granted usage rights,
Check with the utility.

In the power-on password input mode, the power-on password is input and checked. This power-on password input mode is executed by a password control command “power-on password mode command”. When the password position is specified by a parameter at the time of resume from resume,
The password check is performed only for the specified password.

During execution of the power-on password input mode, the keyboard (K) is used to enable password input.
B) The key scan of 51 is performed, but the communication of the mouse 52 is prohibited. In this case, the key scan data is not transmitted to the CPU 21.

When a password match is found in the password check of the power-on password, the access right corresponding to the password is determined by the PCMCIA gate array (PCM
CIA / GA) 28 Security Register (SR) 1
Set to 00. At this time, the keyboard controller (KBC) 30 sends “matched password position” as data and “00h (normal termination)” as status to the CPU 21, and after transmitting this data and status, goes to the normal key input process. Return.

If no matching password exists, the entered password character string is cleared, and "FFh (abnormal end)" is sent as data and "01h (no matching password)" is sent as status. Then, after the transmission, the system waits for the password input again. That is, it does not return to normal key input until the password input ends normally. Further, the embodiment of the present invention has an instant security function.

This instant security function is a security function that can lock the keyboard and the display (operation lock) by operating a hot key (Fn + F1) during the execution of the application.

In this operation locked state, the key inputs of the keyboard (KB) 51 and the external keyboard are ignored, and the PS / 2 mouse 52 is also disabled. At this time, the keyboard controller (KBC) 30 accepts key input to enable input of a password, but prohibits output to the system bus (ISA-BUS) 11. At the same time, the displays on the LCD panel 49 and the external CRT are all turned off. At this time, the VGA controller 32 and the image memory (VRAM) 33 can be accessed.

To release the operation lock state, it is necessary to input a password (operation password) from the keyboard (KB) 51. At this time, the input character string and the number of characters are not displayed on the screen. The password ends with the [Enter] key. The character string up to just before the [Enter] key is pressed is the target of comparison, and if they do not match, the character string is discarded. In that case, [Enter]
A new comparison starts with the character entered after the key operation. Even if the character strings match, the lock is not released until the [Enter] key is pressed. If you enclose the password before and after the correct password with the code of the [Enter] key, it can be unlocked reliably. If there is no password, "character string = Null (empty)"
Process assuming. That is, the operation lock is released only by operating the [Enter] key.

An operation password serving as an instant security password can be set separately from a power-on password. This operation password is set for each power-on password (that is, for each user).
It is stored in the EPROM 29. The default password is the same as the power-on password. Registration / update / deletion of an instant security password (operation password) can be performed in setup.

The operation lock password (operation password) is stored in the EEPROM 29 together with the power-on password and the access right as shown in FIGS. A total of four operation passwords can be set corresponding to the user power-on password. The operation password can be set even when the power-on password has not been set.

When the power-on password is set, the data (character string) of the power-on password is used as the operation password by default. In the password check at the time of releasing the operation lock, if the operation password and the power-on password are different, only the operation password is to be checked, and the power-on password is invalid.

When the power-on password and the operation password are made different, they are set by a dedicated password setting utility. However, there are the following restrictions due to differences in access rights. (1) Those who have the maintenance privilege or the supervisor privilege can register, update, and delete all operation passwords. (2) A person having a password update right can register, change, and delete his / her own operation password. (3) If the user does not have any of the above three privileges, no password operation can be performed.

The release of the operation lock by inputting the operation password is executed in the operation lock password input mode of the password control command.

In the operation lock password input mode, the keyboard controller (KBC) 30
Transmission of the scan code to the PU 21 is prohibited, and PS /
The second mouse 52 is also in the communication prohibited state. However, the keyboard controller (KBC) 30 performs a key scan of the keyboard (KB) 51 in order to wait for input of a password. The password check at this time is started after the "Enter" key is input.

The password check is performed in such a manner that first, all input characters in the buffer are checked, and if no match is found, the next character except the first character is checked.
The check is continued until the number of characters becomes “0”. "En
While the password check is being performed after the "ter" key input, the keyboard controller (KBC) 30 disables interrupts and does not accept any key input.

At the time of password check, the operation password is first compared with the input password, and if the operation password is not defined, the power-on password is next compared with the input password.

The response to the CPU 21 is to notify the release of the operation lock only by inputting the "Enter" key when no password (including the power-on password) is defined. If there is no matching password, the input buffer is cleared and the system enters the password input wait state again. If a matching password exists, the CPU 21 informs the CPU 21 of the “password position” that matches as data and “00” as the status.
h (normal end) ”, and returns to the normal key input process. Next, the password control command used in the above embodiment will be described. The following commands are valid in the password control mode. Power-on password status command Power-on password check command Power-on password + access right setting command Power-on password + access right deletion command Power-on password update command Access right update command Access right output command Power-on password mode command Operation lock status command Operation lock Password check command Operation lock password setting command Operation lock password deletion command Operation lock password mode command Hot key pattern registration command EEPROM access command

Among the above commands, the execution of the power-on password + access right setting command, the power-on password + access right deletion command, and the access right update command are performed with “maintenance privilege” or “supervisor privilege” as the access right. is necessary. Power-on
The execution of the password update command requires “maintenance privilege”, “supervisor privilege”, or “password update right” as the access right. The function of the access right output command is limited without the “maintenance privilege” or the “supervisor privilege”. When the keyboard controller (KBC) 30 ends the process for the above-mentioned command, it returns to the normal key input process.

Keyboard controller (KBC) 30
Receives the power-on password mode command,
Shift to the power-on password input mode. A password check is performed for a designated password or an unspecified password given as a parameter. During execution of the power-on password input mode, key scanning of the keyboard (KB) 51 is performed, but communication of the mouse 52 is prohibited in order to enable password input. or,
At this time, the key scan data is not transmitted to the CPU 21.

When a password match is found in the password check of the power-on password, the access right corresponding to the password is assigned to the PCMCIA gate array (PCM
CIA / GA) 28 Security Register (SR) 1
Set to 00. At this time, the CPU 21 informs the CPU 21 that the data is “matched password position” and the status is “0”.
0h (normal end) ", and after transmitting this data and status, the process returns to the normal key input process. If there is no matching password, the entered password character string is cleared, and “FFh (abnormal termination)” as data and “01h (no matching password)” as status are transmitted. After that, it waits for the password input again. That is, it does not return to normal key input until the password input ends normally. When the password position is specified by the parameter at the time of the resume from the resume, the password check is performed only for the specified password. When the operation lock password mode command is received, the mode shifts to the operation password input mode.

In the operation password input mode, the key input of the keyboard (KB) 51 and the external keyboard is ignored, and the PS / 2 mouse 52 is also disabled. At this time, the keyboard controller (KBC) 30 accepts key input to enable input of a password, but prohibits output to the system bus (ISA-BUS) 11. At the same time, the LCD panel 49 and the external CR
All indications of T disappear. At this time, the VGA controller 32 and the image memory (VRAM) 33 can be accessed. At this time, the character string and the number of characters of the input password are not displayed on the screen. The password ends with the [Enter] key. The character string up to just before the [Enter] key is pressed is the target of comparison, and if they do not match, the character string is discarded. In that case, a new comparison is started from the character input after the [Enter] key operation. Even if the character strings match, the lock is not released until the [Enter] key is pressed. If there is no password, the operation lock is released only by pressing the [Enter] key.

When the operation lock status command is received, the EEPROM 29 is read-accessed and the setting state of the operation password is transmitted to the CPU 21.

When the operation lock password check command is received, the operation password specified by the parameter is checked. When the operation ends normally, the CPU 21 informs the CPU 21 of "operation password setting state information" as data and "status" as the status. 0
0h ”and returns to the normal key input process. When abnormal termination has occurred, "FFh" is transmitted as data and "contents of abnormal termination" are transmitted as status, and the process returns to normal key input processing.

When the operation lock password setting command is received, an EEPROM is stored in accordance with the password storage position and the password character string designated by the parameters.
29, the designated operation password is set. This command is "maintenance privilege"
Or, it is accepted when “supervisor privilege” or “password update right” is given. When the process ends normally, the “set password storage position” is sent as data to the CPU 21 and “00h” is sent as the status, and the process returns to the normal key input process. When abnormal termination has occurred, "FFh" is transmitted as data and "contents of abnormal termination" are transmitted as status, and the process returns to normal key input processing.

When receiving the operation lock password deletion command, the operation password specified by the parameter is deleted. Upon successful completion, C
The “position of the deleted password” is transmitted to the PU 21 as data, and “00h” is transmitted as the status, and the process returns to the normal key input process. When abnormal termination has occurred, "FFh" is transmitted as data and "contents of abnormal termination" are transmitted as status, and the process returns to normal key input processing.

Here, the “power-on password status command”, “power-on password + access right setting command”, “power-on password + access right delete command”, “power-on password update command”, “access right update” Details of the command, the access right output command, and the like are omitted. Here, FIG.
With reference to FIG. 8 to FIG. 8, the password check processing operation in the embodiment of the present invention will be described.

The CPU 21 performs a password registration confirmation command (power-on password status command) in the initialization processing (IRT processing) when the system power is turned on.
In the status LCD control gate array (SL) shown in FIG.
The data is sent to the keyboard controller (KBC) 30 via the data communication register (CR) of the CDC / GA) 26. When it is confirmed from the response content (number of registered passwords) from the keyboard controller (KBC) 30 accompanying the issuance of this command that the password has been registered (number of registered passwords ≠ 0), the password input message data is converted to VGA by a BIOS call. The password input message is sent to the controller 32 and the LCD panel 4
9 and a power-on password mode command (password input command) via the data communication register (CR) of the status LCD control gate array (SLCDC / GA) 26.
C) Send to 30. Then, it waits for a response accompanying the password input.

On the other hand, a keyboard controller (KBC)
Upon receiving the power-on password mode command (password input command) from the CPU 21, the CPU 30 waits for the input of a password character string (steps S1, S2, S2 in FIG. 8).
S9 to S11).

Here, a password character string is input from the keyboard (KB) 51, and after the character input, [Enter]
When a key is pressed, the keyboard controller (KB
C) 30, recognizing that the password has been entered,
The input password is compared with the registered password stored in the EEPROM 29, that is, the power-on password here (steps S2 to S5 in FIG. 8).

At this time, the keyboard controller (KB
C) The EEPROM 29 accessed by 30 includes:
As shown in FIG. 6, a maximum of six power-on passwords, two for maintenance and four for user registration, can be registered, and this registered password is to be compared with the input password.

Keyboard controller (KBC) 30
During the password check, a key scan of the keyboard (KB) 51 is performed to enable a password to be input, but the mouse 52 is prohibited from communicating. or,
At this time, the key scan data is not transmitted to the CPU 21.

In the password check at this time, the input password is compared in order from the first (# 1) registered power-on password stored in the EEPROM 29.

In the above-mentioned password check, when the passwords match, the access right setting process described later is performed, and an input matching response (actually, the matching password position in the EEPROM 29 as data and “00h” as the status) is sent. When the passwords do not match, an input mismatch response (actually, "FFh" as data and "01h" indicating no matching password as status) is returned, and the password control command processing ends (step S6 in FIG. 8). ~ S8).

When receiving the above-mentioned input matching response, the CPU 21 thereafter continues the processing operation and starts up the system normally. When receiving the input mismatching response, the CPU 21 again waits for a password input.

Note that the power-on password includes the password shown in FIG.
As shown in FIG. 7 to FIG. 7, each power-on password can have an access right. An access right means that when you start up with the password data,
Define the range that the user can operate. In the access right setting process, the access right corresponding to the matched password is assigned to the PCMCIA gate array (PCMCIA GA) 2.
8 is set in the security register (SR). The access right set in the security register (SR) defines a system function and a device use range specific to the set password. FIGS. 5 to 7 show examples of system control and hardware control based on the access right at this time. Here, as the access right, a supervisor privilege, a password update right, an HDD access right, an FDD access right, a serial port access right, a printer port access right, a PCMCIA access right, and the like are defined, and a maintenance privilege that is not generally released is defined. You.
Next, the operation lock release processing will be described.

The operation lock is operated by operating a hot key (Fn + F1) for instant security during execution of the application, so that the instant security (here, operation lock) instruction is issued by the keyboard controller (KB) in the SMI processing described above.
C) Notification is sent from 30 to the CPU 21, and according to this notification, C
The lock processing is executed under the control of the PU 21.

In this operation locked state, the key input of the keyboard (KB) 51 and the external keyboard is ignored, and the PS / 2 mouse 52 is also disabled. At this time, the keyboard controller (KBC) 30 accepts key input to enable input of a password, but prohibits output to the system bus (ISA-BUS) 11. At the same time, the displays on the LCD panel 49 and the external CRT are all turned off. At this time, the VGA controller 32 and the image memory (VRAM) 33 can be accessed.

Under this operation lock state, a hot key (Fn + F) for instant security
When 1) is operated, the keyboard controller (KBC) 30 notifies the CPU 21 of the instant security (here, operation lock release) instruction, and the CPU 21 issues an operation lock password mode command in accordance with the notification (step in FIG. 8). S10-S12). Keyboard controller (KBC) 3
0 waits for a password input upon receiving the operation lock password mode command.

Here, a password character string is input from the keyboard (KB) 51, and after the character input, [Enter]
When a key is pressed, the keyboard controller (KB
C) 30, recognizing that the password has been entered,
The input password is compared with the registered password stored in the EEPROM 29, that is, the operation password here (steps S13 to S15 in FIG. 8).

At this time, the keyboard controller (KB
C) The EEPROM 29 accessed by 30 includes:
As shown in FIG. 6, a maximum of four operation passwords can be set and registered as user operation passwords, and these set passwords are to be compared with the input password. If the operation password is not registered, the power-on password is to be compared with the input password.

At this time, in the password check, the inputted password is compared in order from the first (# 1) registered operation password stored in the EEPROM 29.

In the above password check, when the passwords match, a response of operation lock release (actually, the matching password position in the EEPROM 29 as data, and “00h” as the status) is returned, and the password control command processing is performed. The process ends (step S16 in FIG. 8). If the passwords do not match, the system waits for a password input again.

In this manner, the power-on password for turning on the system power and the operation password for releasing the operation lock in the instant security function can be set independently of each other, whereby the operability (usability) can be improved. The security function with good and reliable password check can be realized.

In the above-described embodiment, the power-on password and the operation password can each be registered in a maximum of six cases. However, the present invention is not limited to this, and an arbitrary registration number can be set. Further, the memory for storing these passwords is not limited to the EEPROM, but may be stored in another memory that is backed up by a battery, for example.

In the above-described embodiment, the password is checked by the keyboard controller (KBC) 30. However, the present invention is not limited to this, and the password may be checked by another sub CPU.

In the above embodiment, PCMCIA
Although the security register (SR) and the EEPROM access register are provided in the gate array (PCMCIA GA) 28, this is simply a PCMCIA.
The gate array (PCMCIA GA) 28 has only the above configuration because there is room in circuit, for example, the status LCD control gate array (SLDC GA) 2
6, or other chips, such as in a sub CPU chip.

[0142]

As described above, according to the present invention, the power-on password for turning on the system power and the operation password for releasing the operation lock in the instant security function can be set independently of each other. It is possible to provide a computer having a highly reliable security function that improves operability (ease of use) and security function by password check.

[Brief description of the drawings]

FIG. 1 is a block diagram for explaining a basic configuration of the present invention.

FIG. 2 is a block diagram showing a system configuration according to an embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of a main part of the embodiment in FIG. 2;

FIG. 4 is a block diagram showing an internal configuration of the PCMCIA gate array shown in FIG. 3;

FIG. 5 is a view for explaining the contents and structure of a password and an access right stored in the EEPROM shown in FIGS. 2 and 3;

FIG. 6 is a view for explaining the contents and structure of a password and an access right stored in the EEPROM shown in FIGS. 2 and 3;

FIG. 7 is a diagram showing a control unit of an access right set in a security register (SR) of the PCMCIA gate array shown in FIGS. 2 to 4;

FIG. 8 is a flowchart showing a password check processing procedure in the embodiment.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... CPU, 2 ... Password registration memory, 3 ... Input part,
4: Password check unit, 11: System bus (IS
A-BUS), 12 ... Peripheral interface bus (PI
-BUS; Peripheral Interface BUS), 13 ... Keyboard interface bus (KBC-BUS), 14 ...
Power supply interface bus (PSC-BUS), 15 ...
Line dedicated to EEPROM access, 21 CPU, 22
... I / O controller (I / O-CONT), 23 ... System memory, 24 ... DRAM card, 25 ... BIOS
ROM, 26 PCMCIA-GA (PCMCIA gate array), 27 floppy disk controller (FDC), 28 PCMCIA gate array (PCM
CIA / GA), 29: EEPROM, 30: Keyboard controller (KBC), 31: Expansion connector, 32
... Display controller (VGA controller), 33 ... Image memory (VRAM), 41 ... Serial port, 42 ...
Hard disk drive (HDD), 43 Printer port (EPP), 44 Status LCD, 45 Floppy disk drive (FDD), 46 Power supply controller (PSC), 51 Keyboard (KB), 52
Mouse 53 53 external keyboard 100 security register (SR) 201 dedicated register group 202
ISA-BUS interface logic, 203 ... KB
C-BUS interface logic, 204 ... EEP
ROM interface logic, 205 ... password control logic.

──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Tatsuya Kawawa 2-9-9 Suehirocho, Ome-shi, Tokyo Toshiba Personal System Engineering Co., Ltd. (56) References JP-A-60-225964 (JP, A) JP-A-62-229431 (JP, A) JP-A-63-3326 (JP, A) JP-A-60-225963 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G06F 1 / 00 370 G06F 12/14 320 G06F 15/00 330

Claims (2)

(57) [Claims] And 1. A one used password checking at system power-up or a plurality of the power-on password, and one or more operations password used to clear the operation lock is respectively individually registered A computer having password registration means and capable of executing a password check at system power-on and an operation lock release password check by using a unique registered password ;
Storage of the processing unit that executes some specific function processing in the system
The device has the power-on password and the operation
Means for storing passwords in pairs
A computer characterized by the above-mentioned . 2. The computer according to claim 1, wherein when the operation password is not registered, a paired power-on password is referred to as the operation password.