JP3096563B2 - 3D image playback device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a three-dimensional image reproducing apparatus for displaying a three-dimensional image on a liquid crystal display using an analog data driver.

[0002]

2. Description of the Related Art As a liquid crystal display for displaying a stereoscopic image, there is a liquid crystal display in which separate analog drivers are provided for two sets of signal lines wired in a comb-like manner. In order to display a stereoscopic image using the main liquid crystal display, two signal processing circuits of a left image and a right image are provided for each analog driver, and signals processed by each signal processing circuit are supported. Input to the analog driver.

[0003]

The two types of signal processing circuits for the left image and the right image are provided before the liquid crystal display, and each include a video signal processing circuit for performing amplification, polarity inversion, gamma correction, and the like. In. That is, since the conventional three-dimensional image reproduction circuit includes two video signal processing circuits, there is a problem that the capacity is increased, the power consumption is increased, and it is necessary to perform adjustment between the two video signal processing circuits. .

The present invention provides an image reproducing apparatus in which the number of video signal processing circuits provided at the preceding stage of a liquid crystal display device can be reduced to one, and therefore, the capacity, the power consumption, and the adjustment can be easily reduced. The purpose is to:

[0005]

A first image reproducing apparatus according to the present invention is a liquid crystal display device having a main image analog data driver and a sub-image analog data driver, and a first apparatus for converting a main image signal at double speed. A double-speed conversion unit, a second double-speed conversion unit that double-converts a sub-image signal, a signal combining unit that switches and outputs a double-speed-converted main image signal and a double-speed-converted sub-image signal for each one double-speed horizontal period,
And a single video signal processing circuit which performs predetermined processing on an output signal of the signal synthesizing means and sends the processed signal to a main image analog data driver and a sub image analog data driver of the liquid crystal display device.

A second image reproducing apparatus according to the present invention writes images corresponding to red, green, and blue into three liquid crystal display devices each having an analog data driver for a main image and an analog data driver for a sub-image, respectively. In a three-panel three-dimensional image reproducing apparatus that projects an image on one screen through three primary color filters and superimposes the images, R, R
A first double-speed conversion unit that double-converts the G and B signals, a second double-speed conversion unit that double-converts the R, G, and B signals of the sub-image;
Signal synthesizing means for switching and outputting the R, G, B signals of the double-speed converted main image and the R, G, B signals of the double-speed converted sub-image every one horizontal period, and an output of the signal synthesizing means The liquid crystal display device includes a single video signal processing circuit that performs predetermined processing and sends the signal to a main image analog data driver and a sub image analog data driver of each liquid crystal display device.

A third image reproducing apparatus according to the present invention is a color liquid crystal display device having an analog data driver for main image and an analog data driver for sub-image, and a first liquid crystal display device for performing double-speed conversion of R, G, and B signals of a main image. Double speed conversion means, a second double speed conversion means for double speed conversion of the sub-image R, G, B signals, R, G, B signals of the double speed converted main image and R, G, A signal synthesizing means for switching and outputting a B signal every one horizontal period of a double speed, a main image analog data driver and a sub-image analog data driver of a color liquid crystal display device by performing predetermined processing on an output signal of the signal synthesizing means A single video signal processing circuit for sending to the driver is provided.

In the above-mentioned first, second or third image reproducing apparatus, a circuit which performs amplification, polarity inversion and γ correction is used as the video signal processing circuit.

As a driving method of the liquid crystal display device, for example, the same data is written in two pixels in each of the odd field and the even field in the vertical direction, and the data is vertically written between the odd field and the even field. A two-line variable pair driving method in which data is written by shifting one pixel is used.

[0010]

In the first image reproducing apparatus according to the present invention, the main image signal is double-speed converted by the first double-speed conversion means.
Further, the sub-image signal is double-speed converted by the second double-speed conversion means. The double-speed converted main image signal and the double-speed converted sub-image signal are switched and output by the signal synthesizing unit every double-speed one horizontal period. The output signal of the signal synthesizing means is subjected to predetermined processing by a single video signal processing, and then sent to a main image analog data driver and a sub image analog data driver of the liquid crystal display device.

In the second image reproducing apparatus according to the present invention,
The R, G, and B signals of the main image are double-speed converted by the first double-speed conversion unit. Also, the R, G, and B signals of the sub-image
Is converted by the double speed conversion means. The R, G, and B signals of the double-speed-converted main image and the R, G, and B signals of the double-speed-converted sub-image are switched and output by the signal synthesizing unit every one double-speed horizontal period. The output signal of the signal synthesizing means is subjected to predetermined processing by a single video signal processing, and then sent to the main image analog data driver and the sub image analog data driver of the three liquid crystal display devices.

In a third image reproducing apparatus according to the present invention,
The R, G, and B signals of the main image are double-speed converted by the first double-speed conversion unit. Also, the R, G, and B signals of the sub-image
Is converted by the double speed conversion means. The R, G, and B signals of the double-speed-converted main image and the R, G, and B signals of the double-speed-converted sub-image are switched and output by the signal synthesizing unit every one double-speed horizontal period. The output signal of the signal synthesizing means is subjected to predetermined processing by a single video signal processing, and then sent to a main image analog data driver and a sub image analog data driver of the color liquid crystal display device.

[0013]

FIG. 1 shows three liquid crystal displays with red, green,
This figure shows the configuration of a three-panel color stereoscopic image reproducing apparatus for writing an image corresponding to blue, projecting the image onto a single screen through filters of three primary colors, and superimposing the images. FIG.
Indicates signals of respective parts in FIG.

In this color stereoscopic image reproducing apparatus, three LCDs, that is, a red LCD (liquid crystal display) 20, a green LCD 30, and a blue LCD 40 are provided as display devices. Each of the LCDs 20, 30, and 40 has a size of 640 pixels in the horizontal direction and 480 pixels in the vertical direction. Each pixel is provided with a field effect transistor.

Each of the LCDs 20, 30, and 40 is provided with 480 gate lines. In addition, each LCD 20, 3
Each of 0 and 40 is provided with two sets of data lines arranged in a comb shape and each having 320 lines.

The gate lines of each LCD 20, 30, 40 are
It is driven by the gate drivers 21, 31, 41.
Of the two sets of data lines of each LCD 20, 30, 40, one
One of the data lines is a left image analog data driver (hereinafter, referred to as a left image data driver) 22, 32,
The other set of data lines is driven by a right image analog data driver (hereinafter, right image data driver) 23, 33, 43.

This color stereoscopic image reproducing apparatus has a main image input terminal PL and a sub image input terminal PR. The left image signal is input to the main image input terminal PL, and the right image signal is input to the sub image input terminal PR. The input image signal is
In this example, it is assumed that the signal is a composite color signal of the NTSC system.

The left image signal input to the main image input terminal PL is sent to the demodulation circuit 1 and the synchronization separation circuit 10
Sent to In the demodulation circuit 1, the left image signal is R, G, B
(Red, green, blue) separated into signals. In the sync separation circuit 10, a sync signal is extracted from the left image signal. The synchronization signal extracted by the synchronization separation circuit 10 is sent to the timing signal generation circuit 11. Timing signal generation circuit 11
Outputs timing signals a to h.

The R, G, and B signals output from the demodulation circuit 1 are sent to an A / D conversion circuit 2 and converted into 8-bit digital R, G, and B signals, respectively. In FIG. 2, the R, G, and B signals of the left image input to the A / D conversion circuit 2 are L1, L2, L3, and L for each horizontal period unit.
4...

The sampling frequency (signal a) of the A / D conversion circuit 2 is の of the reference frequency, assuming that the sampling frequency (signal c) of the D / A conversion circuit 8 described later is a reference frequency.

The R, G, and B signals sampled by the A / D conversion circuit 2 are written to the double speed conversion memory 3. Write frequency of double speed conversion memory 3 (signal a)
Is の of the reference frequency, and the readout frequency (signal b) is the same as the reference frequency.

Therefore, the R, G and B signals written in the double speed conversion memory 3 are read out from the double speed conversion memory 3 at twice the speed. However, the R, G, and B signals are read from the double speed conversion memory 3 with a delay of 1/2 horizontal period. From the double-speed conversion memory 3, signals for the same one horizontal period are successively read twice. The R, G, B signals of the left image output from the double speed conversion memory 3 are sent to the multiplexer 7.

The right image signal input to the sub-image input terminal PR is sent to the demodulation circuit 4. In the demodulation circuit 4, the right image signal is separated into R, G, and B signals. The R, G, and B signals output from the demodulation circuit 4 are sent to an A / D conversion circuit 5 and converted into 8-bit digital R, G, and B signals, respectively. 2, the R, G, and B signals of the right image input to the A / D conversion circuit 5 are represented by R1, R2, R3, R4,... For each horizontal period unit. The sampling frequency (signal a) of the A / D conversion circuit 5 is の of the reference frequency.

The R, G, B signals sampled by the A / D conversion circuit 5 are written to the double speed conversion memory 6. Writing frequency of double speed conversion memory 6 (signal a)
Is の of the reference frequency, and the readout frequency (signal b) is the same as the reference frequency.

Therefore, the R, G, B signals written in the double speed conversion memory 6 are read out of the double speed conversion memory 6 at twice the speed. However, the R, G, and B signals are read from the double speed conversion memory 6 with a delay of 1/2 horizontal period. From the double-speed conversion memory 6, signals for the same one horizontal period are successively read twice. The R, G, and B signals of the right image output from the double speed conversion memory 6 are sent to the multiplexer 7.

The control input terminal SEL of the multiplexer 7 receives a signal c which is inverted for each horizontal period of the double-speed converted R, G, B signals (one horizontal period of double speed).
As shown in FIG. 2, based on the signal c, the multiplexer 7 outputs the R, G, B signals of the double-speed converted left image and the R, G, B, B
The signal is alternately output.

R, G,
The B signal is sent to the D / A conversion circuit 8 and converted into an analog signal based on a predetermined sampling frequency (reference frequency) (signal d). The analog R, G, B signals output from the D / A conversion circuit 8 are sent to the video signal processing circuit 9. The video signal processing circuit 9 performs processes such as amplification, polarity inversion, and γ correction on the R, G, and B signals.
Here, the polarity inversion means that the polarity is inverted every horizontal period or every field. The video signal processing circuit 9 outputs processed R, G, and B signals based on a predetermined timing signal e.

The R signal output from the video signal processing circuit 9 is sent to the left image data driver 22 and the right image data driver 23 of the red LCD 20. The G signal output from the video signal processing circuit 9 is sent to the left image data driver 32 and the right image data driver 33 of the green LCD 30. The B signal output from the video signal processing circuit 9 is output to the left image data driver 4 of the blue LCD 40.
2 and the right image data driver 43.

Each of the left image data drivers 22, 32, 4
2, the first sampling clock signal f is sent from the timing signal generation circuit 11. A second sampling clock (signal g) is sent from the timing signal generation circuit 11 to each of the right image data drivers 23, 33, and 43. Further, a clock (signal h) for sequential scanning is sent from the timing signal generation circuit 11 to each of the gate drivers 21, 31, and 41.

As a driving method of each of the LCDs 20, 30, and 40, the same data is written in two pixels vertically in each of the odd field and the even field, and one pixel is written vertically between the odd field and the even field. A two-line variable pair drive system in which data is shifted and written is used.

FIG. 3 shows the LCD 2 in an odd field.
Data written to 0, 30, and 40 are shown. FIG. 4 shows LCDs 20, 30, 40 in even fields.
Shows the data to be written to. In FIG. 3 and FIG. 4, data surrounded by a circle indicates data that has been changed from data written in the immediately preceding horizontal line.

In the odd field, as shown in FIG. 3, the first horizontal lines of the LCDs 20, 30, and 40 include:
A sampling signal of the signal L2 in the second horizontal period of the left image and a sampling signal of the signal R1 in the first horizontal period of the right image are alternately written for each pixel. In the second horizontal line, a sampling signal of the signal L2 in the second horizontal period of the left image and a sampling signal of the signal R2 in the second horizontal period of the right image are alternately written for each pixel. In the third horizontal line, a sampling signal of the signal L3 in the third horizontal period of the left image and a sampling signal of the signal R2 in the second horizontal period of the right image are alternately written for each pixel.

In the even field, as shown in FIG. 4, the first horizontal lines of the LCDs 20, 30, and 40 include:
A sampling signal of the signal L1 in the first horizontal period of the left image and a sampling signal of the signal R1 in the first horizontal period of the right image are alternately written for each pixel. In the second horizontal line, a sampling signal of the signal L2 in the second horizontal period of the left image and a sampling signal of the signal R1 in the first horizontal period of the right image are alternately written for each pixel. In the third horizontal line, a sampling signal of the signal L2 in the second horizontal period of the left image and a sampling signal of the signal R2 in the second horizontal period of the right image are alternately written for each pixel.

As described above, in both the odd field and the even field, the same data is written in the left image data and the right image data over two horizontal lines. However, the horizontal line where the left image data is changed and the horizontal line where the right image data is changed are alternated. In the odd field and the even field, data is written with a shift of one horizontal line.

As shown in FIG. 2, in the odd field, for example, when the gate line of the second horizontal line is selected by the gate drivers 21, 31, 41 (To2), the left image data drivers 22, 32, 42
Thereby, the data L3 for the third horizontal period of the left image is sampled and held. From the left image data drivers 22, 32, and 42, the data L2 of the left image in the second horizontal period of the left image sampled and held last time is output.
Is output to the data line and written.

On the other hand, the right image data drivers 23, 3
From 3 and 43, the data R2 in the second horizontal period of the right image sampled and held last time is output to the data line and written.

When the gate line of the third horizontal line is selected by the gate drivers 21, 31, 41 (T
o3), as shown in FIG. 2, the right image data driver 2
The data R3 for the third horizontal period of the right image is sampled and held by 3, 33, and 43. Also,
From the right image data drivers 23, 33, and 43, the data R2 of the right image that has been sampled and held in the second horizontal period is output to the data line and written.

On the other hand, the left image data drivers 22, 3
From 2 and 42, the data L3 in the third horizontal period of the left image sampled and held last time is output to the data line and written. Hereinafter, a similar operation is repeated.

In the even field, as shown in FIG. 2, for example, when the gate line of the third horizontal line is selected by the gate drivers 21, 31, 41 (Te3), the operation is the second in the odd field. The operation is the same as that when the gate line of the horizontal line is selected (To2).

The operation when the gate line of the fourth horizontal line is selected in the even field (Te4) is the same as the operation when the gate line of the third horizontal line is selected in the odd field (To3). Will be the same.

As described above, the left image data driver 2
2, 32, 42 and right image data drivers 23, 3
The data sampled and written by 3, 43 are shifted by one horizontal line between the even field and the odd field.

In the color stereoscopic image reproducing apparatus of the above embodiment, only one video signal processing circuit 9 needs to be provided.
The capacity and power consumption are reduced as compared with the related art. Also,
Unlike the related art, there is no need to perform adjustment between the two video signal processing circuits.

In the two-line variable pair drive system, each L
Since the CDs 20, 30, and 40 are driven, an image in which flicker can be prevented and the resolution does not decrease can be obtained.

In the color stereoscopic image reproducing apparatus of the above-described embodiment, the multiplexer 7 converts the R, G, and B signals of the double-speed converted left image and the R, G, and B signals of the double-speed converted right image.
The B signal and the B signal are alternately switched and output at every double speed one horizontal period, but a signal that is inverted every double speed one horizontal period is input to the read enable terminal of each of the double speed conversion memories 3 and 6. Thus, the double-speed-converted R, G, and B signals of the left image and the double-speed-converted right, R, G, and B signals are alternately switched and output every one double-speed horizontal period. Is also good. In such a case, the multiplexer 7 becomes unnecessary.

As shown in FIG. 5, the D / A conversion circuit 8 similar to the D / A conversion circuit 8 of FIG.
A / A conversion circuits 12 and 13 are provided, respectively, and an analog switch 14 for switching and outputting the outputs of the D / A conversion circuits 12 and 13 every one horizontal period is provided. The output of the analog switch 14 is used as a video signal processing circuit. 9 may be sent.

FIG. 6 shows the configuration of a color stereoscopic image reproducing apparatus using a color liquid crystal display. 6, the same components as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. FIG. 7 shows signals of respective parts in FIG.

The LCD 50 has 640 pixels (640 × 3 = 1920 dots) in the horizontal direction and 480 pixels (480 dots) in the vertical direction. Each dot is provided with a field effect transistor and red, green and blue color filters.

The LCD 50 is provided with 480 gate lines. The LCD 50 is provided with two sets of 960 data lines arranged in a comb shape.

The gate lines of the LCD 50 are driven by a gate driver 51. One of the two data lines of the LCD 50 is a left image analog data driver (hereinafter referred to as a left image data driver) 5.
2, and the other set of data lines is driven by a right image analog data driver (hereinafter, right image data driver) 53.

In this color stereoscopic image reproducing apparatus, the R, G, B signals output from the video signal processing circuit 9
The data is sent to a left image data driver 52 and a right image data driver 53. Data driver for left image 5
2, the first sampling clock signal f is sent from the timing signal generation circuit 11. A second sampling clock signal g is sent from the timing signal generation circuit 11 to the right image data driver 53. Further, a clock signal h for sequential scanning is sent from the timing signal generation circuit 11 to the gate driver 51.

As a driving method of the LCD 50, the same data is written in each of the odd field and the even field by two pixels in the vertical direction, and the data is written by shifting one pixel in the vertical direction between the odd field and the even field. A two-line variable pair drive system is used.

FIG. 8 shows the LCD 5 in the odd field.
The data written to 0 is shown. FIG. 9 shows data written to the LCD 50 in the even field.

In FIGS. 8 and 9, the circled data represents the R, G, and B data of the left image written on the immediately preceding horizontal line, and the R, G, and B data of the changed left image. , G and B data. The data enclosed by a square indicates the R, G, and B data of the right image whose data has been changed with respect to the R, G, and B data of the right image written on the previous horizontal line. I have.

In the odd field, as shown in FIG. 8, the first horizontal line of the LCD 50 includes the second image of the left image.
Sampling signals R2, G2, B of signal L2 in the horizontal period
2 and the sampling signals R1, G1, and B1 of the signal R1 in the first horizontal period of the right image are alternately written for each dot. In the second horizontal line, sampling signals R2, G2, B2 of the signal L2 in the second horizontal period of the left image,
Sampling signal R of signal R2 in the second horizontal period of the right image
2, G2, and B2 are alternately written for each dot. The third horizontal line includes sampling signals R3, G3, B3 of the signal L3 in the third horizontal period of the left image and sampling signals R2, G of the signal R2 in the second horizontal period of the right image.
2 and B2 are alternately written for each pixel.

In the even field, as shown in FIG. 9, the first horizontal line of the LCD 50 includes the first image of the left image.
Sampling signals R1, G1, B of signal L1 in the horizontal period
1 and sampling signals R1, G1, and B1 of the signal R1 in the first horizontal period of the right image are written alternately for each dot. In the second horizontal line, sampling signals R2, G2, B2 of the signal L2 in the second horizontal period of the left image,
Sampling signal R of signal R1 in the first horizontal period of the right image
1, G1, and B1 are alternately written for each dot. The third horizontal line includes sampling signals R2, G2, B2 of the signal L2 in the second horizontal period of the left image and sampling signals R2, G2 of the signal R2 in the second horizontal period of the right image.
2 and B2 are alternately written for each pixel.

As described above, in both the odd field and the even field, the same data is written in the left image data and the right image data over two horizontal lines. However, the horizontal line where the left image data is changed and the horizontal line where the right image data is changed are alternated. In the odd field and the even field, data is written with a shift of one horizontal line.

As shown in FIG. 7, in an odd field, for example, when the gate line of the second horizontal line is selected by the gate driver 51 (To2),
The data L3 for the third horizontal period of the left image is sampled and held by the left image data driver 52. Further, from the left image data driver 52, the data L2 of the left image in the second horizontal period of the left image sampled and held last time is output to the data line and written.

On the other hand, from the right image data driver 53, the data R2 of the right image which has been sampled and held in the second horizontal period is output to the data line and written.

When the gate line of the third horizontal line is selected by the gate driver 51 (To3), FIG.
As shown in the figure, by the right image data driver 53,
Data R3 for the third horizontal period of the right image is sampled and held. The right image data driver 5
From 3, the data R2 of the second horizontal period of the right image sampled and held last time is output to the data line and written.

On the other hand, from the left image data driver 53, the data L3 of the left image in the third horizontal period which has been sampled and held last time is output to the data line and written. Hereinafter, a similar operation is repeated.

In the even field, as shown in FIG. 7, for example, when the gate line of the third horizontal line is selected by the gate driver 51 (Te3), the operation of the gate of the second horizontal line is performed in the odd field. The operation is the same as that when the line is selected (To2).

The operation when the gate line of the fourth horizontal line is selected in the even field (Te4) is different from the operation when the gate line of the third horizontal line is selected in the odd field (To3). Will be the same.

As described above, the left image data driver 52
The data sampled and written by the right image data driver 53 are shifted by one horizontal line between the even field and the odd field.

Also in the color stereoscopic image reproducing apparatus shown in FIG. 6, double-speed conversion is performed by inputting signals inverted every one double-speed horizontal period to the read enable terminals of the double-speed conversion memories 3 and 6, respectively. R in the left image,
The G and B signals and the R, G and B signals of the right image subjected to the double speed conversion may be alternately switched and output every one double speed horizontal period. In such a case, the multiplexer 7 becomes unnecessary.

Also in the color stereoscopic image reproducing apparatus shown in FIG. 6, the D / A
A D / A conversion circuit similar to the conversion circuit 8 is provided, and an analog switch for switching and outputting the output of each D / A conversion circuit every one horizontal period is provided. The output of the analog switch is output to a video signal processing circuit 9. It may be sent to.

Although the above description has been given of a color stereoscopic image reproducing apparatus, it goes without saying that the present invention can also be applied to a monochrome stereoscopic image reproducing apparatus using a liquid crystal display.

[0067]

According to the present invention, a single video signal processing circuit can be provided in the preceding stage of the liquid crystal display device, so that the capacity can be reduced, the power consumption can be reduced, and the adjustment can be facilitated.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram showing a configuration of a three-panel color stereoscopic image reproducing apparatus.

FIG. 2 is a time chart showing signals of respective units in FIG. 1;

FIG. 3 is a schematic diagram showing data written to an LCD in an odd field.

FIG. 4 is a schematic diagram showing data written to an LCD in an even field.

FIG. 5 is a circuit block diagram showing a modification of the three-panel color stereoscopic image reproducing device.

FIG. 6 is a circuit block diagram showing a configuration of a color stereoscopic image reproducing device using a color LCD.

FIG. 7 is a time chart showing signals of respective units in FIG. 6;

FIG. 8 is a schematic diagram showing data written to an LCD in an odd field.

FIG. 9 is a schematic diagram showing data written to an LCD in an even field.

[Explanation of symbols]

 1, 4 demodulation circuit 2, 5 A / D conversion circuit 3, 6 double speed conversion memory 7 multiplexer 8 D / A conversion circuit 9 video signal processing circuit 10 synchronization separation circuit 11 timing signal generation circuit 12, 13 D / A conversion circuit 14 Analog switch 20, 30, 40, 50 LCD 21, 31, 41, 51 Gate driver 22, 32, 42, 52 Left image data driver 23, 33, 43, 53 Right image data driver

Claims (5)

(57) [Claims] 1. A liquid crystal display device comprising a main image analog data driver and a sub-image analog data driver, first double-speed conversion means for double-speed converting a main image signal, and second double-speed conversion for double-speed converting a sub-image signal. Conversion means, a signal synthesizing means for switching and outputting between a double-speed converted main image signal and a double-speed converted sub-image signal for each one horizontal period of double speed, and a liquid crystal which performs predetermined processing on an output signal of the signal synthesizing means. A three-dimensional image reproduction device comprising: a single video signal processing circuit for sending to the main image analog data driver and the sub image analog data driver of the display device. 2. An image corresponding to red, green, and blue is written to three liquid crystal display devices each including a main image analog data driver and a sub image analog data driver,
In a three-plate type three-dimensional image reproducing apparatus for projecting an image onto one screen through three primary color filters and superimposing the three images, a first double-speed conversion means for double-speed converting the R, G, and B signals of the main image; A second double-speed conversion unit that double-converts the R, G, and B signals; and converts the R, G, and B signals of the double-speed-converted main image and the R, G, and B signals of the double-speed-converted sub-image to double-speed one horizontal A signal synthesizing unit that switches and outputs the signal every period, and a single video signal that performs a predetermined process on an output signal of the signal synthesizing unit and sends the signal to a main image analog data driver and a sub image analog data driver of each liquid crystal display device A stereoscopic image reproducing apparatus comprising: a processing circuit. 3. A color liquid crystal display device having an analog data driver for main image and an analog data driver for sub-image, first double-speed conversion means for double-speed converting R, G, and B signals of the main image, and R of sub-image. , G, and B signals are double-speed converted. The R, G, and B signals of the double-speed converted main image and the R, G, and B signals of the double-speed converted sub-image are converted to a double-speed one horizontal period. Signal synthesizing means for switching and outputting each signal, and a single video signal processing for performing predetermined processing on an output signal of the signal synthesizing means and sending the signal to a main image analog data driver and a sub image analog data driver of a color liquid crystal display device A stereoscopic image reproducing device comprising: a circuit; 4. The stereoscopic image reproducing apparatus according to claim 1, wherein said video signal processing circuit performs amplification, polarity inversion, and γ correction. 5. The driving method of the liquid crystal display device, wherein the same data is written in two pixels in each of the odd field and the even field in the vertical direction, and the pixel is shifted by one pixel in the vertical direction between the odd field and the even field. 4. The stereoscopic image reproducing device according to claim 1, wherein a two-line variable pair driving method for writing data by using a two-line variable pair driving method is used.