JP3098863B2 - DC-DC conversion circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention converts an output DC voltage to a voltage different from an input DC voltage by using a plurality of capacitors and changing a connection state between charging and discharging of the capacitors. The present invention relates to a DC-DC conversion circuit.

[0002]

2. Description of the Related Art Conventionally, as a DC-DC conversion circuit for converting a DC voltage using charging and discharging of a capacitor, FIG.
As shown in FIG. 2, a pair of main switch elements SW _A and SW _B are inserted between a DC power supply DC and a load L, and a charge / discharge circuit is connected to a series circuit of one main switch element SW _A and the DC power supply DC. 1 are connected in parallel. Charging and discharging circuit 1, diode D _11, via a D ₁₂ includes three capacitors C ₁ -C ₃ connected in series, each diode D _11, a main switching element cathode to the cathode of D ₁₂ S
W _A, diode connected to a node SW _B D _21, D ₂₂
Are connected to each other, and diodes D ₁₁ , D
The anode ₁₂ cathode of the diode D _31, D ₃₂ which connects the anode to the negative terminal of the DC power source is connected.

[0003] Therefore, the turning on of the main switch element SW _A, when to turn off the main switch element SW _B, diode D _11, D ₁₂ of each of the capacitors C ₁ ~ via
C ₃ is connected in series between both ends of the DC power supply DC and charged. Here, if the capacitors C _{1 to} C ₃ have the same capacitance and the forward voltage drop of each of the diodes D ₁₁ and D ₁₂ is ignored, the voltages across the capacitors C _{1 to} C ₃ are equal to each other. That is, assuming that the power supply voltage of the DC power supply DC is E, the voltage between both ends of each of the capacitors C _{1 to} C ₃ becomes E / 3.

After the capacitors C _{1 to} C ₃ have been charged by the DC power supply DC, the main switch element SW _A
With turn off and turn on the main switch element SW _B, the charge accumulated in the capacitor C ₁ -C ₃ is supplied to the load L through the diode _{D 21, D 22, D 31} , D 32. That is, the voltage between both ends of the load L becomes E / 3.
In this way, it is possible to apply one third of the power supply voltage E to the load L. In this configuration, the capacitor C
It is possible to apply a first voltage n of the power supply voltage E to the load L depending on the number n of ₁ -C _3.

[0005] As an extension of this configuration, there is also a configuration described in Japanese Patent Application Laid-Open No. 62-163560. In the invention described in the publication, the connection relation of the capacitors is set so that the voltage can be reduced at a preset ratio (rational number). On the other hand, as shown in FIG. 12, a configuration using a capacitor C in a circuit for suppressing a ripple component of a pulsating voltage obtained by full-wave rectifying an AC power supply AC by a full-wave rectifier RE including a diode bridge is also known. That is, a series circuit of a diode D and a capacitor C is connected between the output terminals of the full-wave rectifier RE, and a switch element Q composed of a transistor having an emitter-collector connected in parallel to the diode D is provided. The control circuit 2 that monitors the output voltage is used to turn on and off the switch element Q. The control circuit 2
When the output voltage of the full-wave rectifier RE is high, the switch element Q is turned off, the load L is supplied by the output of the full-wave rectifier RE, and the capacitor C is charged via the diode D. When the voltage is low, the switch element Q is turned on to supply the charge of the capacitor C to the load L. Therefore, by adjusting the ON timing of the switch element Q, the ripple of the pulsating voltage output from the full-wave rectifier RE can be suppressed.

[0006]

In the former conventional configuration described above, the input voltage can be reduced but not boosted, and the output voltage is set in multiple stages using the same circuit. There is a problem that can not be. The latter conventional configuration can suppress the ripple, but has the problem that the input voltage cannot be reduced or boosted and the output voltage cannot be set in multiple stages by the same circuit.

SUMMARY OF THE INVENTION An object of the present invention is to provide a DC-DC converter capable of stepping down and stepping up an output voltage in multiple stages using a single circuit. Is what you do.

[0008]

According to a first aspect of the present invention, there is provided a pair of main power supply units which are inserted in series between a DC power supply DC and a load L and which are selectively turned on / off. Switch element SW _A , SW _B and one main switch element SW _A
And the DC power supply DC are connected in parallel, and when the one main switch element SW _A is on, the DC power supply D
With the main switch element SW _B of the charge and the other a charging and discharging circuit 1 to supply the load L when on the C, the charging and discharging circuit 1, 2 a plurality of capacitors unit circuit is a terminal circuit 3 _i (hereinafter , The subscript i represents a natural number), and each capacitor unit circuit 3
_i is configured by connecting a series circuit of a capacitor C _i and a first auxiliary switch element SW _is and a second auxiliary switch element SW _ip between both terminals , and using one charge / discharge circuit 1
The output voltage to the load L is stepped down and stepped up in multiple stages.
As described above, the control circuit 2 for controlling the ON / OFF timing of each of the main switch elements SW _A and SW _B , each of the first auxiliary switch elements SW _is and each of the second auxiliary switch elements SW _ip is provided. It is.

According to a second aspect of the present invention , the AC power supply AC is full-wave conditioned.
A pulsating power source obtained by rectification by the flower RE and a pulsating power source
Between the load and the load L.
A pair of main switch elements SW _A and SW _B and one main switch
Connected in parallel to a series circuit of switch element SW _A and pulsating power supply
And one of the main switch elements SW _A is on
And the other main switch element SW _B
And a charge / discharge circuit 1 for supplying power to the load L when the switch is on.
The charge / discharge circuit 1 includes a plurality of capacitors each of which is a two-terminal circuit.
Of the unit circuit 3 _i (hereinafter, the subscript i represents a natural number)
Each capacitor is configured by connecting at least a part in series.
The unit circuit 3 _i requires a capacitor C _i and a first auxiliary switch.
Series circuit with the element SW _is and the second auxiliary switch element SW
One charge / discharge circuit configured by connecting _ip to both terminals
1 so that the output voltage to the load L is kept substantially constant.
Each main switch element SW _A and SW _B and each first auxiliary switch
Chi element SW _IS and the second auxiliary switching element SW _ip Tonoso
Charging and discharging by controlling the on / off timing of each
Control for controlling the ratio between the input voltage and the output voltage of the electric circuit 1
The circuit 2 is provided. The invention of claim 3 is
In the invention of claim 1 or 2, the voltage across the capacitor C _i provided in each capacitor unit circuit 3 _i is set equal to the drive voltage of the second auxiliary switch element SW _ip ,
The charge of each capacitor C _i second auxiliary switch element SW _ip is being held on.

[0010]

[Action] In the first aspect, the capacitor unit circuit 3 _i is a 2-terminal circuit A than by connecting a plurality constitutes a charging and discharging circuit 1, the capacitor unit circuit 3 _i, a capacitor C _i Since the series circuit with the first auxiliary switch element SW _is and the second auxiliary switch element SW _ip are connected between both terminals, the connection relation of the capacitor unit circuit 3 _i is appropriately set. If used , use one charge / discharge circuit 1
The output voltage to the load L is stepped down and boosted in multiple stages
The on / off state of the first auxiliary switch element SW _is and the second auxiliary switch element SW _ip of each capacitor unit circuit 3 _i at the time of charging and discharging of the charge / discharge circuit 1 _is designated by the control circuit 2 as described above. By doing so, it is possible to set the output voltage in multiple stages. That is, to charge the plurality of capacitors unit circuits 3 _i in a state connected in series, if the discharge was less than during charging, the number of capacitor unit circuit 3 _i to be connected in series, to buck the output voltage to the input voltage be able to. Further, in order to charge each capacitor unit circuit 3 _i, the charged capacitor unit circuit 3 _i if discharge connected in series, it is possible to boost the output voltage to the input voltage. Moreover, the capacitor unit circuit 3
_The output voltage can be set in multiple stages depending on how _i is combined.

According to a second aspect of the present invention, the key is a two-terminal circuit.
A plurality of capacitor unit circuits 3 _i are connected to form a charge / discharge circuit 1.
A than constitute a capacitor unit circuit 3 _i,
The direct connection between the capacitor C _i and the first auxiliary switch element SW _is
Connect the column circuit and the second auxiliary switch element SW _ip between both terminals
, The capacitor unit circuit 3 _i
If the connection relation of the two is appropriately set, one charge / discharge circuit 1
So that the output voltage to the load L is kept substantially constant
Each main switch element SW _A , SW _B and each first auxiliary switch
It with elements _SW is and each of the second auxiliary switch elements SW _ip
Each ON / OFF timing is designated by the control circuit 2.
As a result, the input voltage and the output voltage of the
Control the ratio and make the output voltage to the load L substantially constant
Becomes possible. In the configuration of claim 3, claim 1 or
In the invention of claim 2, since the second auxiliary switch element _SWip is controlled by using the charge charged in the capacitor C _i in each capacitor unit circuit 3 _i , the control of the second auxiliary switch element SW _ip is separately performed. Since it is not necessary to provide a power supply, the circuit configuration is simplified and the efficiency of the entire circuit is improved.

[0012]

(Embodiment 1) In this embodiment, as shown in FIG.
A pair of main switches are connected between the positive electrode of the DC power supply DC and the load L.
Switch SW_A, SW_BAre connected in series and inserted.
Switch element SW _A, SW_BOf the charge / discharge circuit 1
End of the charging and discharging circuit 1 and the other end of the DC power supply DC.
It is connected to the connection point between the negative electrode and the load L. Charge / discharge circuit 1
Is three capacitor unit circuits 3₁~ 3_ThreeSeries circuit
It is composed of Each capacitor unit circuit 3₁~ 3_Three
Is a two-terminal circuit, with a capacity between both terminals.
TA C₁~ C_ThreeAnd the first auxiliary switch element SW_1s~ SW_3s
And a second auxiliary switch element SW_1p~ S
W_3pIs connected. Here, each capacitor unit circuit 3₁
~ 3_ThreeCapacitor C₁~ C_ThreeAre set to equal capacity
You. Also, the main switch element SW_A, SW_B, The first aid
Switch element SW_1s~ SW_3s, Second auxiliary switch element
SW_1p~ SW_3pAre individually turned on and off by the control circuit 2.
Timing is controlled. The control circuit 2 supplies the load L
Set output voltage instead of monitoring applied voltage
As a result, the main switch
Switch SW_A, SW_B, First auxiliary switch element SW
_1s~ SW_3s, The second auxiliary switch element SW_1p~ SW_3pof
Controls on / off status.

By the way, the main switch element SW_A, S
W_B, First auxiliary switch element SW_1s~ SW_3sThe second
Auxiliary switch element SW_1p~ SW_3pThe control voltage of
It may be different from the power supply voltage of the path 2. In such cases
As shown in FIG. 2, the current mirror circuit 4_s, 4
_pA level shift is performed using, for example,. In the example shown in FIG.
Is the first auxiliary switch element SW_isIs a pnp-type transformer.
Jista Q_isAnd diode D _isAnd the second supplement
Auxiliary switch element SW_ipIs an npn transistor Q _ipWhen
Diode D_ipIt consists of: Also,
Star Q_ipHas a current mirror circuit 4_pAnd transformer T
_pThe control signal from the control circuit 2 is input through the controller.

With the above configuration, the main switch element S
W_A, SW_B, First auxiliary switch element SW_1s~ S
W_3s, The second auxiliary switch element SW_1p~ SW_3pControl times
It is possible to control as shown in FIG.
In each control state, when the input voltage is E, FIG.
Output voltage Vz as shown in FIG.
You. For example, when the output voltage Vz is E / 3,
Control is performed as follows. First, the main switch SW_AThe
, Main switch SW_BTurn off and use DC power supply DC
The charge / discharge circuit 1 is charged. At this time, each capacitor unit
Circuit 3₁~ 3_ThreeFirst auxiliary switch element SW_1s~ SW
_3sAll on, the second auxiliary switch element SW _1p~ SW
_3pAre all turned off (STEP 1). That is, each key
Capacitor unit circuit 3₁~ 3_ThreeCapacitor C₁~ C_ThreeTo
Connect in series and connect this series circuit to DC power supply DC
It is. Capacitor C₁~ C_ThreeAre of equal volume,
Each capacitor C₁~ C_ThreeTerminal voltage to E / 3
Become.

When the main switch SW _A is turned off and the main switch SW _B is turned on after the capacitors C _{1 to} C ₃ are charged, the charge / discharge circuit 1 is connected to the load L. At this time, the capacitor unit circuit 3 _1, on the first auxiliary switching element SW _1s, the second auxiliary switching element SW
The _1p is turned off for the remaining capacitor unit circuit 3 _2, 3 _3, the first auxiliary switch elements SW _2s, the SW _3s off, the second auxiliary switching element SW _2p, to turn on the SW _3p (STEP2) . With this setting, only the capacitor C ₁ of the capacitor unit circuit 3 ₁ will be is connected to the load L, the other capacitor C _2, C ₃ is disconnected from the load L. Therefore, the voltage applied to the load L is E /
It becomes 3.

In the above control example, the case where the voltage is stepped down has been described. However, the case where the output voltage is set to 5E / 2 will be described as an example of stepping up the output voltage. First, the main switch SW _A is turned on, the main switch SW _B is turned off, and the charging / discharging circuit 1 is charged by the DC power supply DC, similarly to the above-described control example. However, in the above control example in which the output voltage is E / 3, the charging process has one stage, but when the output voltage is 5E / 2, the charging process has three stages.

[0017] That is, in the first stage, a capacitor unit circuit 3 ₁ of the first auxiliary switching element SW _1s off, second
The auxiliary switch elements SW _1P turn on, another capacitor unit circuit 3 _2, for 3 ₃ The first auxiliary switch elements SW _2s, on the SW _3s, the second auxiliary switching element S
Set W _2p and SW _3p to off. At this time, the terminal voltage of the capacitor C ₁ of the capacitor unit circuit 3 ₁ 0, the terminal voltage of the capacitor C _2, C ₃ of the capacitor unit circuit 3 _2, 3 _3, respectively becomes E / 2 (STEP1).

In the second stage, the ON / OFF of the first auxiliary switch elements SW _{1s to} SW _3s and the second auxiliary switch elements SW _{1p to} SW _3p set in the first stage are reversed. That is, on the first auxiliary switching element SW _1s for the capacitor unit circuit 3 _1, the second auxiliary switching element SW
_1P is turned off, and the first auxiliary switch elements SW _2s and SW _3s are turned off for the other capacitor unit circuits 3 ₂ and 3 ₃ ,
The second auxiliary switch elements SW _2p and SW _3p are set to ON (STEP 2). At this stage, each capacitor C ₁ , C
The terminal voltages of ₂ and C ₃ are E, E / 2 and E / 2, respectively.

Furthermore, in the third step, on the first auxiliary switching element SW _2s for the capacitor unit circuit 3 _2,
The second auxiliary switch element SW _2p is turned off, and the first auxiliary switch elements SW _1s and SW _3s are turned off for the capacitor unit circuits 3 ₁ and 3 ₃ , and the second auxiliary switch elements SW _1p and SW _3p Is set to ON (STEP 3). At this time, the terminal voltage of each of the capacitors C ₁ , C ₂ , C ₃ is
E / 2, E and E respectively.

Therefore, if the terminal voltages of all the capacitors C _{1 to} C ₃ are added and output, it becomes 5E / 2.
That is, by setting the first auxiliary switching element SW _1s to SW _3s of each capacitor unit circuits 3 ₁ to 3 _3-one, the second off the auxiliary switching element SW _1p to SW _3p, all capacitors C ₁ -C ₃ are connected in series, and the voltage across the series circuit becomes 5E / 2 (STEP 4).

As described above, the charging process is performed in one to a plurality of stages, and the first auxiliary switch element SW _1s at the time of discharging is charged.
To SW _3s and the second auxiliary switch element SW _{1p to} SW _3p
If the combination of the ON / OFF states of, 設定, 必要, 入 力, 、 ２, ３,
/ 6, 1, 4/3, 3/2, 2, 7/3, 5/2, and 3 times each output voltage can be obtained.

[0022] In this embodiment, the three capacitors unit circuits 3 ₁ to 3 ₃ shows an example in which are connected in series to constitute a charging and discharging circuit 1, the charging and discharging circuit 1, Ya two capacitors unit circuits It is also possible to configure with four or more capacitor unit circuits. In particular, if four or more capacitor unit circuits are used, the number of steps for setting the output voltage can be further increased. When the number of capacitor unit circuits increases, it becomes necessary to control a large number of switch elements as the first auxiliary switch element and the second auxiliary switch element in addition to the main switch elements SW _A and SW _B. However, if a microcomputer is used, many switch elements
It is possible to cope with a case where control is required to combine the OFF states in a complicated manner.

(Embodiment 2) In this embodiment, as shown in FIG. 4, a pulsating voltage output from a full-wave rectifier RE composed of a diode bridge is input and a main switch is used to obtain a desired output voltage. Elements SW _A and SW _B , first auxiliary switch elements SW _{1s to} SW _3s , second auxiliary switch element S
And controls the timing of the W _1p to SW _3p on and off.

The control circuit 2 monitors the variation in the pulsating voltage by the voltage across the resistor R ₂ of the full-wave rectifier resistor R ₁ connected in series between the output end of the RE, R _2. Control circuit 2
From being set desired output voltage in the same manner as in Example 1, based on the ratio of the monitored pulsating voltage and set output voltage by the voltage across the resistor R _2, the output voltage is substantially constant , The ratio between the input voltage and the output voltage of the charge / discharge circuit 1 is controlled in the same manner as in the first embodiment.

That is, the control circuit 2 operates as shown in FIG.
And the resistor R_TwoInput voltage Vin, which is the voltage across
The ratio of the output voltage to the set voltage Vs (Vin / V
s) is provided, and the comparison circuit 21
The obtained ratio is converted into a digital signal by the A / D conversion circuit 22.
After the conversion, the charge / discharge circuit 1
Set the input / output voltage ratio. In the magnification setting circuit 23,
Main switch element SW_A, SW_B, Need first auxiliary switch
Raw SW_1s~ SW_3s, The second auxiliary switch element SW _1p~ S
W_3pSet by controlling the on / off of
Of the input / output voltage ratios obtained by the comparison circuit 21
Choose a ratio that is close to the reciprocal of the ratio. For example, the comparison circuit 21
If the ratio obtained in step (2) is １ ／, the magnification setting circuit 23 sets 2
If the ratio obtained by the comparison circuit 21 is 2,
For example, the magnification setting circuit 23 selects 1/2 times. Like this
When the magnification is selected by the switch control unit 24, the selected magnification is selected.
The control procedure (program) corresponding to the set magnification is stored in the memory 2
5 and the main switch element SW_A, SW_B, First
Auxiliary switch element SW_1s~ SW_3s, The second auxiliary switch
H SW_1p~ SW_3pOn and off.

As described above, the main switch elements SW _A , SW
_B , if the ON / OFF timing of the first auxiliary switch elements SW _{1s to} SW _3s and the second auxiliary switch elements SW _{1p to} SW _3p is controlled, the output voltage of the charge / discharge circuit 1 is controlled by the control circuit 2
, The output voltage of the charging / discharging circuit 1 is not completely constant because the ratio of the input / output voltage of the charging / discharging circuit 1 is set stepwise. By connecting the smoothing capacitor C ₀ to the output side of the first circuit, fluctuations in the voltage applied to the load L can be greatly reduced. Even if the capacitor C ₀ is connected between the output terminals of the rectifier circuit RE, the fluctuation of the voltage applied to the load L can be suppressed. However, by providing the capacitor C ₀ at the subsequent stage of the charge / discharge circuit 1 as in this embodiment. Voltage fluctuation can be further reduced. In addition, if the voltage fluctuation is about the same,
The capacitance of the capacitor C ₀ can be made much smaller than when the capacitor C ₀ is connected between the output terminals of the rectifier circuit RE. Other configurations are the same as in the first embodiment.

(Embodiment 3) In this embodiment, as shown in FIG. 6, the charge / discharge circuits 11 connected to the output side of the charge / discharge circuit ₁ ,
1 ₂ by powering the separately to a plurality of loads L _1, L _2, and in which the voltage applied to each load L _1, L ₂ has to be set. Charging and discharging circuit 1, two capacitors unit circuits 3 _1, 3 ₂ and the series connection, between the one of the capacitor unit circuit 3 ₂ The direct-current power supply DC to the first auxiliary switch elements SW _2s and the load L ₂ Has been inserted. A main switch S is provided between the charge / discharge circuit 1 and the positive electrode of the DC power supply DC.
W _A is inserted. The capacitors C ₁ and C ₂ of each of the capacitor unit circuits 3 ₁ and 3 ₂ have a main switch element S
W _1C, the charging and discharging circuit through the SW _{2C 1 1, 1 2} are connected. Main switch element SW _1C, a SW _2C are each 2 Gokutanto switches, contacts each of which is inserted between the two ends of the capacitor C _1, both ends of the C ₂ and the charge-discharge circuit 1 _1, 1 _2. Here, capacitors having the same capacity are used for the capacitors C ₁ and C ₂ .

[0028] Each discharge circuit ₁ 1, 1 _2, has a structure in which each of the two capacitors unit circuit 3 _11, 3 _12, 3 _21, 3 ₂₂ connected in series. Furthermore, each of the charge / discharge circuits 1 ₁ , 1 ₂
Main switch element S is connected between one end of each switch and each of the loads L ₁ and L _2.
W _1B and SW _2B are inserted. Capacitors C ₁₁ and C _{12 of} each capacitor unit circuit 3 ₁₁ , 3 ₁₂ , ₃₂₁ and 3 ₂₂ ,
C ₂₁ and C ₂₂ have the same capacity. Due to the above connection relationship, the control circuit 2 includes five main switch elements SW _A , SW _1B , SW _2B , SW _1C , SW _2C , and 6.
First auxiliary switch elements SW _1s , SW _2s , S
_W11s , _SW12s , _SW21s , _SW22s and six second
Auxiliary switch elements SW _1p , SW _2p , SW _11p , SW ₁₂
The on / off timing of _p , SW _21p and SW _22p is controlled.

For example, when the output voltage of the DC power supply DC is E
At one time, both loads L₁, L_TwoVoltage applied to both
Would be controlled as follows.
First, in the first stage of the charging process, a capacitor unit circuit
3₁, 3_TwoCapacitor C₁, C _TwoE / 2
Charge so that it becomes. That is, the main switch element SW
_AON, main switch element SW_1C, SW_2COff and
Capacitor unit circuit 3₁, 3_TwoAbout the first auxiliary switch
Switch SW_1s, SW_2sOn, requires a second auxiliary switch
Raw SW_1p, SW_2pSet to off. Such a setting letter
In the state, the charge and discharge circuit 1₁, 1_TwoDisconnect from DC power supply DC
And a capacitor C between both ends of the DC power supply DC.₁, C_Two
Are connected. Therefore, each key
Japashita C₁, C_TwoBecomes E / 2.

Next, charging and discharging circuit ₁ 1, 1 each capacitor C ₁₁ of _2, C _12, C _21, the terminal voltage of C ₂₂ each E / 2
Charge so that it becomes. That is, the main switch element SW
_1C and SW _2C are turned on, the main switch elements SW _1B and SW _2B are turned off, and the first switch elements SW _11s and SW 1
_21s on, first switch elements SW _12s and SW _22s off, second switch elements SW _11p and SW _21p off,
The second switch elements SW _12p and SW _22p are set to ON. At this time, since the capacitors C ₁₁ and C ₂₁ are connected in parallel to the capacitors C ₁ and C ₂ , the voltage between both ends of the capacitors C ₁₁ and C ₂₁ becomes E / 2. Here, the capacitance of the capacitors C ₁ and C ₂ is equal to the capacitance of the capacitors C ₁₁ and C ₁₁ .
Main switch elements SW if sufficiently larger than the capacity of the C _21
A can be turned off, but can be left on.

Further, the first auxiliary switch element S
W_11s, SW_12s, SW_21s, SW_22sAnd the second aid
Switch element SW_11p, SW_12p, SW_21p, SW_22p
The on and off states are inverted for and. That is,
First switch element SW_11s, SW _21sOff the first
Switch element SW_12s, SW_22sOn the second switch.
H SW_11p, SW_21pOn, the second switch element
SW_12p, SW_22pSet to off. This and
Come, capacitor C₁₂, C_{twenty two}Is the capacitor C₁, C_TwoNiso
Since each is connected in parallel, the capacitor C₁₂, C_{twenty two}End of
The child voltages become E / 2. In this way, the
Pasita C₁₁, C₁₂, C_{twenty one}, C_{twenty two}Are all E /
It becomes 2. Here, the capacitor C₁, C_TwoCapacity
Pasita C₁₂, C _{twenty two}If the capacity is larger than
Switch SW_ACan be turned off, but left on
Even better.

Since the charging process is completed as described above, the main switch elements SW _1C and SW _2C are turned off, and the first first auxiliary switch elements SW _11s , SW _12s , SW _21s and SW are turned off.
_22s is turned on, and the second auxiliary switch elements SW _11p , SW
Turn off _12p , SW _21p and SW _22p . That is, the capacitors C ₁₁ and C ₁₂ are connected in series, and the capacitors C ₂₁ and C ₂₂ are connected in series. When the main switch elements SW _1B and SW _2B are turned on in this state, the voltages applied to the loads L ₁ and L ₂ become E, respectively.

[0033] In the above description has been set equal to the voltage applied to both the load L _1, L _2, but by changing the charging and discharging circuit 1 _1, 1 ₂ of the control procedure for each load L _1, L ₂ It is also possible to apply different voltages. Further, as described above, the terminal voltages of the capacitors C ₁ and C ₂ are respectively set to E / 2.
, The main switch element SW _A , the first
The auxiliary switch elements SW _1s , SW _2s and the second auxiliary switch elements SW _1p , SW _2p are unnecessary. Further, when setting an applied voltage separately for three or more different loads, the number of capacitor unit circuits constituting the charge / discharge circuit 1 is increased, and a charge / discharge circuit is provided on the output side for each capacitor unit circuit. The charge and discharge circuits 1a and 1b may be configured using three or more capacitor unit circuits. Other configurations are the same as in the first embodiment.

(Embodiment 4) In this embodiment, as shown in FIG.
Charge / discharge circuit 1 is divided into six capacitor unit circuits 3₁₁, 3_{twenty one},
3₃₁, 3₁₂, 3_{twenty two}, 3₃₂Is constituted by,
Capacitor unit circuit 3₁₁, 3_{twenty one}, 3₃₁, 3₁₂, 3_{twenty two}, 3
₃₂Are connected in parallel two by two, and three parallel circuits are connected in series.
And the main switch element SW_AThrough both ends of DC power supply DC
It has a configuration connected between them. In this embodiment,
Each capacitor unit circuit 3₁₁, 3_{twenty one}, 3 ₃₁, 3₁₂, 3_{twenty two},
3₃₂For the first auxiliary switch element SW_11s, SW
_21s, SW_31s, SW_12s, SW_22s, SW_32sOff
And the second auxiliary switch element SW_11p, SW_21p, S
W_31p, SW_12p, SW_22p, SW_32pWith turned on
In the state, each capacitor C₁₁, C_{twenty one}, C₃₁, C_{twenty one}, C_{twenty two},
C₃₂Second auxiliary switch element SW
_11p, SW_21p, SW_31p, SW_12p, SW_22p, SW
_32pIs obtained. This configuration
In order to make₁₁, C_{twenty one}, C₃₁,
C_{twenty one}, C_{twenty two}, C₃₂The voltage between both ends of the
Raw SW_11p, SW_21p, SW_31p, SW_12p, S
W_22p, SW_32pMust be equal to the drive voltage of
Therefore, the capacitor unit circuit 3 connected in series ₁₁, 3
_{twenty one}, 3₃₁, 3₁₂, 3_{twenty two}, 3₃₂Of the power supply voltage E
2 auxiliary switch elements SW_11p, SW_21p, SW_31p,
SW_12p, SW_22p, SW_32pDivided by the drive voltage of
Is determined as That is, in the present embodiment, the second supplement
Auxiliary switch element SW_11p, SW_21p, SW_31p, SW
_12p, SW_22p, SW_32pDrive voltage is set to E / 3
I have.

More specifically, as shown in FIG.
Auxiliary switch element SW_isIs a pnp transistor Q_isWhen
Diode D_isAnd a second auxiliary switch is required.
Raw SW_ipIs an npn transistor Q_ipAnd diode D
_ipAnd Also, the transistor Q_ipBase of
Pnp transistor Q_idEmitter-collector
Through capacitor C_iCharge.
That is, the transistor Q_ipThe reference potential of
Change the driving voltage to match the fluctuation of the reference potential.
It is necessary to make the capacitor C as described above._i
Auxiliary switch element SW using the charge_ipNo drive
Because a dynamic voltage is obtained, the second
Auxiliary switch element SW_ipCan be controlled
You. Also, the transistor Q_isAnd transistor Q_idIs
Each current mirror circuit 4_s, 4 _pControl times through
It is controlled by a control signal from the road 2.

The capacitor unit circuit 3 _{i having the} configuration shown in FIG.
For, the first auxiliary switching element SW _IS is turned on, when charging the capacitor C _i is the control signal input to the current mirror circuit 4 _s, 4 _p and L level, the transistor Q _IS and transistor Turn off both Q _id . At this time, the voltage across the capacitor unit circuit 3 _i, since greater than the voltage across the capacitor C _i, so that the diode D _IS is charged in the capacitor C _i on. At this time, the diode _Dip is kept off because the reverse voltage is applied.

On the other hand, in the first auxiliary switch elements SW _IS is turned on to discharge the charged electric charge of the capacitor C _i is on the transistor Q _IS sets the control signal to the current mirror circuit 4 _s in H level To Since the diode _Dip is turned off by the reverse bias, the capacitor C
The electric charge of _i will be supplied to the load L through the transistor Q _is .

[0038] In the charging process, the first auxiliary switch elements SW _IS off and set the control signal to the current mirror circuit 4 _p as transistor Q _ip is on when not charging the capacitor C _i to H level I do. At this time, the base of the transistor Q _ip charges through the transistor Q _id of the capacitor C _i - is applied between the emitter to turn the transistor Q _ip. At this time, the diode D
_is is reverse biased and the transistor Q _is kept off.

In the discharging process, a second auxiliary switch is required.
Raw SW_ipTurn on the capacitor C _iDisconnect from the discharge path
When separated, each current mirror circuit 4_s, 4
_pAre set to L level, and the
Transistor Q_is, Q_ipTurn off both. This time die
Aether D_ipIs a forward-biased power supply path to the load L
become. Also, the capacitor C_iVoltage across the capacitor
Unit circuit 3_iIs greater than the voltage across the
D_isIs reverse biased and kept off. That is,
First auxiliary switch element SW_isTurns off.

As described above, for the capacitor unit circuit 3 _i that has not released charge during the discharging process, the voltage across the capacitor C _i is reduced by the second auxiliary switch element SW _ip
Is used as the driving voltage of the second auxiliary switch S
The power consumption required for controlling the _Wip is suppressed, the efficiency is improved, and the level shift of the reference potential is performed to control the second auxiliary switch element _{SWip in} which the reference voltage fluctuates. Therefore, it is not necessary to use a transformer, and a design using a semiconductor circuit becomes possible.

In the circuit configuration of FIG. 7, it is possible to set the output voltage in seven stages by controlling the charging process and the discharging process as shown in FIG. In FIG.
→ the capacitor C _i second auxiliary switching element S charges of
It indicates that the use as a driving voltage W _ip, - the result of using the electric charge of the capacitor C _i as the second auxiliary switching element SW _ip driving voltage, that voltage across the capacitor C _i has become indefinite Show. Referring to FIG. 9, as an example of decreasing the input voltage, a case where the voltage applied to the load L is E / 3 will be described. In the charging process, the main switch element S
On the W _A, it sets off a main switch element SW _B, first the first auxiliary switching element SW _11s, SW _{21 s,} SW
_31s , _SW12s , _SW22s , _SW32s are turned on, and the second auxiliary switch elements _SW11p , _SW21p , _SW31p , SW
Turn off _12p , SW _22p and SW _32p . In this state, the capacitors C ₁₁ , C ₂₁ , C ₃₁ , C ₂₁ , C ₂₂ , C ₃₂
Are connected in parallel two by two, and three parallel circuits are connected in series. All capacitors C ₁₁ ,
Assuming that the capacitances of C ₂₁ , C ₃₁ , C ₂₁ , C ₂₂ , and C ₃₂ are equal, each of the capacitors C ₁₁ , C ₂₁ , C ₃₁ , C ₂₁ , C ₂₂ , C ₃₂
Are E / 3 respectively.

Next, the first auxiliary switch element SW _11s ,
SW _21s is turned on, and the first auxiliary switch element SW _31s , S
_W12s , _SW22s , _SW32s are turned off, the second auxiliary switch elements _SW11p , _SW21p are turned off, and the second auxiliary switch elements _SW31p , _SW12p , _SW22p , _SW32p are set on, and the main switch is set. When SW _A is turned off and the main switch SW _B is turned on, the load L is fed by the electric charges of the capacitors C ₁₁ and C ₁₂ connected in parallel, and the voltage applied to the load L becomes E / 3. It is.

The control example described above is an example of the step-down operation.
In the case where the voltage applied to the load L is set to 7E / 3 as an example of
In such a case, the control may be performed as follows. In this case, charge
The process has three stages. That is, in the first stage, the output power
Same as when the pressure is E / 3, and the main switch element
SW_AON, main switch element SW_BSet to off,
First, the first auxiliary switch element SW_11s, SW_21s, SW
_31s, SW_12s, SW _22s, SW_32sOn, the second complement
Auxiliary switch element SW_11p, SW_21p, SW_31p, SW
_12p, SW_22p, SW_32pSet to off. This and
All capacitors C₁₁, C_{twenty one}, C₃₁, C_{twenty one},
C_{twenty two}, C₃₂Are E / 3 respectively.

In the second stage of the charging process, the first auxiliary switch element SW _11s is turned on, and the second auxiliary switch element SW _11s is turned on.
_21p and SW _31p are turned on, and the other first auxiliary switch elements SW _21s , SW _31s , SW _12s , SW _22s and SW _32s
Off, and the other second auxiliary switch elements SW _11p and SW _11p
Turn off _12p , SW _22p and SW _32p . Thus, only the voltage across the capacitor C ₁₁ is E.

In the third stage of the charging process, the first auxiliary switch element SW _21s is turned on, and the second auxiliary switch element SW _21s is turned on.
_31p and _SW12p are set to ON, and the remaining first auxiliary switch elements _SW11s , _SW31s , _SW12s , _SW22s , S
W _32s off, remaining second auxiliary switch element S
Set W _11p , SW _21p , SW _22p , and SW _32p to off. That is, the voltage across the capacitor C ₂₁ is E.

As described above, the capacitors C ₁₁ and C ₂₁
Becomes E, and the remaining capacitors C ₃₁ , C ₁₂ ,
With the voltages across C ₂₂ and C ₃₂ at E / 3, the first auxiliary switch elements SW _11s , SW _21s , and SW _31s are turned on, and the remaining first auxiliary switch elements SW _12s , S
_W22s and _SW32s are turned off, and all the second auxiliary switch elements _SW11p , _SW21p , _SW31p , _SW12p , SW
Turn off _22p and SW _32p . At the same time, the main switch element SW _A is turned off and the main switch element SW _B is set on. At this time, the terminal voltages of the capacitors C ₁₁ , C ₂₁ , and C ₃₁ are added, and the voltage of 7E / 3 becomes the voltage applied to the load L.

As described above, the first auxiliary switch elements SW _11s , SW _21s , SW _31s , SW _12s , SW _22s ,
SW _32s , second auxiliary switch element SW _11p , S
By controlling the connection procedure in the charging process and the discharging process by controlling W _21p , SW _31p , SW _12p , SW _22p , and SW _32p , it is possible to set the voltage applied to the load L in multiple stages. It is. Other configurations are the same as in the first embodiment.

Embodiment 5 In this embodiment, as shown in FIG. 10, instead of using a bipolar transistor as the first auxiliary switch element SW _is and the second auxiliary switch element SW _ip of the capacitor unit circuit 3 _i . DMOS
This type uses a FET of a type. Since the DMOS type FET has a parasitic diode, it is not necessary to provide an external diode, and the circuit configuration is further simplified.

In each of the above embodiments, the current mirror circuit 4
_s , 4 _p from the control circuit 2 to the capacitor unit circuit 3
_Although the level shift of the control signal to _i is performed, the level shift may be performed using a photocoupler or the like.

[0050]

According to the first aspect of the present invention, a charge / discharge circuit is formed by connecting a plurality of capacitor unit circuits which are two-terminal circuits. The capacitor unit circuit comprises a capacitor and a first auxiliary switch. Since the series circuit with the element and the second auxiliary switch element are connected between both terminals, if the connection relation of the capacitor unit circuit is appropriately set , one charge / discharge circuit can be used. Multi-stage output voltage to load
The control circuit specifies the on / off state of the first auxiliary switch element and the second auxiliary switch element of each capacitor unit circuit when charging and discharging the charge / discharge circuit so that the voltage is stepped down and boosted to the floor. This has the advantage that the output voltage can be set in multiple stages. That is, the output voltage can be stepped down or boosted with respect to the input voltage by using the same circuit configuration, and the number of setting stages of the output voltage can be arbitrarily determined by a combination of the capacitor unit circuits having the same configuration. It has the advantage that it can be designed.

The invention according to claim 2 is a two-terminal circuit.
A charge / discharge circuit is constructed by connecting multiple paster unit circuits.
Therefore, the capacitor unit circuit is called a capacitor.
A series circuit with a first auxiliary switch element and a second auxiliary switch element;
Because it is configured by connecting the switch element and both terminals,
If the connection relation of the capacitor unit circuit is set appropriately,
The output voltage to the load L is substantially equal to one by using one charging / discharging circuit 1.
Each main switch element SW _A , SW _B and each
First auxiliary switch element SW _is and each second auxiliary switch
Controls the on / off timing of each element SW _ip
The input of the charging / discharging circuit 1 is designated by the control circuit 2.
Controls the ratio between the voltage and the output voltage, and controls the output voltage to load L.
Can be made substantially constant.
The invention of claim 3 is the invention of claim 1 or claim 2.
In addition, since the second auxiliary switch element is controlled using the charge charged in the capacitor in each capacitor unit circuit, it is not necessary to provide a separate power supply for controlling the second auxiliary switch element, and the circuit configuration is simplified. In addition, there is an advantage that the efficiency of the entire circuit is improved.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a first embodiment.

FIG. 2 is a circuit diagram showing a capacitor unit circuit used in the first embodiment.

FIG. 3 is an operation explanatory diagram illustrating a control example according to the first embodiment.

FIG. 4 is a circuit diagram showing a second embodiment.

FIG. 5 is a block circuit diagram of a control circuit used in a second embodiment.

FIG. 6 is a circuit diagram showing a third embodiment.

FIG. 7 is a circuit diagram showing a fourth embodiment.

FIG. 8 is a circuit diagram showing a capacitor unit circuit used in a fourth embodiment.

FIG. 9 is an operation explanatory diagram illustrating a control example of the fourth embodiment.

FIG. 10 is a circuit diagram showing a capacitor unit circuit used in a fifth embodiment.

FIG. 11 is a circuit diagram showing a conventional example.

FIG. 12 is a circuit diagram showing another conventional example.

[Explanation of symbols]

1 charging and discharging circuit 2 control circuit 3 _i capacitor unit circuits C _i capacitor DC DC power supply L load SW _A main switching element SW _B main switching element SW _IS first auxiliary switch elements SW _ip second auxiliary switching element

Claims (3)

(57) [Claims] 1. A pair of main switch elements inserted in series between a DC power supply and a load and selectively turned on and off, and are connected in parallel to a series circuit of one main switch element and the DC power supply. A charge / discharge circuit that is charged by the DC power supply when the one main switch element is on and supplies power to the load when the other main switch element is on. , And each capacitor unit circuit connects a series circuit of a capacitor and a first auxiliary switch element and a second auxiliary switch element between both terminals. Output to the load using one charge / discharge circuit
A control circuit is provided for controlling the on / off timing of each main switch element, each first auxiliary switch element, and each second auxiliary switch element so that the voltage is stepped down and stepped up in multiple stages. DC- characterized by the fact that
DC conversion circuit. 2. An AC power source obtained by rectifying an AC power by a full-wave rectifier.
Pulsating power supply and the pulsating power supply and load are inserted in series.
A pair of main switch elements that are selectively turned on and off
In parallel with the series circuit of one main switch element and the pulsating power supply.
Column connected and one of the above main switch elements is on
Is charged by the pulsating power supply and the other main switch element is turned off.
A charge / discharge circuit that supplies power to the load when the
The circuit is a two-terminal circuit consisting of a plurality of capacitor unit circuits.
Are connected in series, and each capacity is
The data unit circuit includes a capacitor, a first auxiliary switch element,
Series circuit and the second auxiliary switch element between both terminals.
Connected to the load using a single charge / discharge circuit.
In order to keep the output voltage almost constant,
Each first auxiliary switch element and each second auxiliary switch element
To control the on / off timing of each
Controls the ratio between the input voltage and the output voltage of the charge / discharge circuit
DC converter - dc control circuit characterized by comprising provided. 3. A capacitor provided in each capacitor unit circuit.
Voltage across the second auxiliary switch element is equal to the drive voltage of the second auxiliary switch element.
The second auxiliary switch is set according to the charge of each capacitor.
The switch element is held on.
The DC-DC conversion circuit according to claim 1 or 2.