JP3105103B2 - Adjustment device for electronic control unit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an adjusting device for debugging contents stored in a memory section of an electronic control unit.

[0002]

2. Description of the Related Art Generally, an electronic control unit (ECU) used for an automobile, a home electric appliance, or the like has a CPU, a ROM and a RAM as a memory unit. When developing this ECU, it is necessary to perform debugging such as rewriting the contents of ROM (control data and the like) and monitoring the contents of RAM (control variables and the like used temporarily). In particular, ECUs used for automobile engine control, ABS control, etc.
In the case of (1), it is necessary to monitor the correlation between the behavior of the vehicle and the control program in real time, and to examine the correlation. A monitoring device or other adjusting device is used.

[0003] Conventionally, the communication system between the ECU and the adjusting device is based on a system speed (address bus, data bus, and control bus) of the CPU in the ECU because the transfer speed and the circuit change of the ECU are small. The mainstream is a parallel communication system using a bus. In a monitor device as an adjusting device, a dual port RAM (DP
RAM), a data is written from the ECU to the DPRAM, and the monitor device uses a monitor system called a hard latch system or a bus steal system in which the written data is read and used as monitor data.

[0004]

However, the above CPU
There are two types of system buses: a multiplex bus in which the address bus and the data bus are shared in whole or in part, and a non-multiplex bus in which the address bus and the data bus are completely separated. On the other hand, the conventional adjusting device generally supports only one of the bus types, and there is a problem that the adjusting device cannot be used when the bus type is different.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and it is an object of the present invention to determine whether or not the CPU bus type can be used in either a multiplex bus or a non-multiplex bus. It is an object of the present invention to provide an ECU adjustment device capable of expanding the range.

[0006]

According to one aspect of the present invention, there is provided an electronic control unit comprising: a CPU;
A bus type determining unit that is connected via a bus of the electronic control unit to determine a bus type of the CPU of the electronic control unit in an adjustment device for debugging storage contents of the memory unit;
A bus switching unit that switches a bus line in accordance with the determination result of the determination unit.

[0007] The invention according to claim 2 is dependent on the invention according to claim 1, wherein the adjustment device is a monitor device. In other words, a dual-port RAM that can be accessed from two directions
The electronic control unit writes data to the dual port RAM via the CPU bus, and the monitor device reads and monitors the written data.

[0008]

According to the above-mentioned structure, according to the first aspect of the present invention,
When the electronic control unit and the adjustment device are connected, in the adjustment device, the bus type determination unit determines the CPU bus type, and the bus switching unit switches the bus line according to the determination result. Thus, regardless of whether the system bus of the CPU is a multiplex bus or a non-multiplex bus, a signal can be received by the adjusting device via the bus and debugging such as monitoring can be performed.

[0009]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a monitor device according to an embodiment of the present invention. The monitor device 2 is a memory unit (RAM 1 described later) of an electronic control unit (hereinafter referred to as ECU) 1.
It monitors the stored contents of 3) and is a kind of adjustment device.

The ECU 1 includes a CPU 11, a ROM (Read Only Memory) 12 as a memory unit,
An AM (random access memory) 13 and a connector 14 are built in. The CPU 11 has 16 bits and is set in the extended bus mode.
And the control bus 17 are both ROM 12 and RAM
13 and the connector 14.
The ROM 12 stores a control program and control data for the ECU 1. The RAM 13 includes the CPU 1
1 stores control variables temporarily used in performing control and is used as a work area for calculation.

The connection connector 14 is for connection to the monitor device 2 via a cable 18. The connection connector 14 has an address bus 15, a data bus 16 and a control bus 17 from the CPU 11.
Are connected respectively. Here, the system bus type of the CPU 11 includes a multiplex type in which an address signal of an upper byte is output to an address bus 15 and a data signal and an address signal of a lower byte are mixed and output to a data bus 16; An address signal of one word (upper byte and lower byte) is output to 15,
There are two types: a non-multiplex type that outputs a data signal to the data bus 16.

On the other hand, the monitor device 2 includes a control command unit 2
1, RAM monitor control unit 22, and dual port RAM
(Hereinafter referred to as DPRAM) 23, RAM monitor display unit 24, bus type determination unit 25, bus switching unit 26, data error detection unit 27, connector 28, and decoding unit 29.
And The connection connector 28 is for connecting to the ECU 1 via the cable 18. Of the three types of system buses connected to the connector 28, one end of the address bus 31 and one end of the data bus 32 are connected to the DPRAM 23 via the bus switching unit 26, and one end of the control bus 33 is connected to the DPR via the decoding unit 29.
It is connected to AM23.

The control command section 21 receives a request (including an operation) from a user or the like and outputs a control command to the RAM monitor control section 22. RAM monitor controller 22
Receives a command from the control command unit 21, receives the DPRAM 23,
The AM monitor display section 24 and the decoding section 29 are controlled.

The DPRAM 23 is a RAM that can be accessed from two directions.
13 is written to the DPRAM 23. on the other hand,
The RAM monitor control unit 22 reads the contents of the DPRAM 23 to generate monitor data, and the RAM monitor display unit 24 displays the monitor data sent from the RAM monitor control unit 22 on a screen in real time.

Further, the bus type determining section 25
It automatically determines whether the bus type of the CU 1 is a multiplex bus or a non-multiplex bus, and sends a control signal to the bus switching unit 26. The bus switching unit 26
Has a function of separating a mixed bus of addresses and data into addresses and data in the case of a multiplex bus based on a signal from the bus type determination unit 25. The data error detection unit 27 is provided with a DPRAM 23 from the ECU 1.
And DP from RAM monitor control unit 22
The timing with a read signal to the RAM 23 is checked to detect the occurrence of a data error. The detection result is sent to the RAM monitor control unit 22 as an error signal.

Next, the operation of the above embodiment will be described.

When the connection connector 14 on the ECU 1 side and the connection connector 28 on the monitor device 2 are connected via the cable 18, and the monitor device 2 monitors the contents stored in the RAM 13 of the ECU 1, the operation is connected to the ECU 1 side. The description will be made separately for the monitor device 2 side.

On the ECU 1 side, the CPU 11
When executing the control program stored in M12,
The PU 11 writes and reads control variables and the like used temporarily in the RAM 13. At the same time, RA
The contents written in M13 (that is, the stored contents) are transferred to the DPRAM of the monitor device 3 via the system buses 15 to 17.
33. At this time, if the bus type of the CPU 11 is a multiplex type, an upper byte address signal is output to the address bus 15, a data signal and a lower byte address signal are mixed and output to the data bus 16, and the control bus 17 is output. An address strobe signal (hereinafter, referred to as an AS signal), a read / write signal, etc. When the bus type of the CPU 11 is a non-multiplex type, a one-word address signal is output to the address bus 15, a data signal is output to the data bus 16, and an AS signal and a read / write signal are output to the control bus 17, respectively. You. In the case of the multiplex type and the non-multiplex type, the system bus 15 to 1
7 has different output timings.

On the other hand, on the monitor device 2 side, the bus type determining unit 25 determines the bus type of the CPU 11, and the bus switching unit 26 switches the bus line according to the result of the determination. More specifically, the bus type determining unit 25 checks the movement of the AS signal on the control bus 17 and
CPU 1 when S signal repeats high level and low level
1 is determined to be a multiplex type, and AS
When the signal does not change, the CPU 11 determines that the bus type of the CPU 11 is a non-multiplex type. When this determination is completed, the bus type determining unit 25 sends a signal to the bus switching unit 26.
A bus switching signal is sent to perform bus line switching control. The bus switching unit 26 switches the bus line according to the bus type based on the bus switching signal.

That is, when the bus type of the CPU 11 is a multiplex bus, as shown in FIG. 2, the address signals (A0 to A7) of the lower byte and the data signals (D0 to D7).
For example, the address signal and the data signal are separated from each other by latching the address signal at the falling timing of the AS signal to the data bus 32 where the data signal 7) is mixed, and the two signals are separately input to the DPRAM 23.

On the other hand, when the bus type of the CPU 11 is of a non-multiplex type, as shown in FIG. 3, a 1-byte address signal (A0 to A15) is sent from the connector 28, and eventually from the ECU 1, to the address bus 31 and the data signal (D0). .. D7) are completely separated and transferred to the data bus 32.
Input to 23.

An EC is stored in the DPRAM 23.
After a signal is input from the CPU 11 of U1 and the same contents as in the RAM 13 are written, when there is a monitor request from the user, the control command unit 21 sets the monitor information (monitor channel number, address, attribute (byte or word)). ) Is specified and sent to the RAM monitor control unit 22. The RAM monitor control unit 22 sends information (number of channels, attributes, etc.) of the display data to the RAM monitor display unit 24 before displaying the monitor data. Then, the DPRAM2 is sent from the ECU1 side.
3 is read (the content stored in the internal RAM 13 of the ECU 1) and sent to the RAM monitor display unit 24 as monitor data. The RAM monitor display unit 24 displays the monitor data on the screen in a predetermined format in real time based on the information of the display data.

Thus, regardless of whether the bus type of the CPU 11 of the ECU 1 is a multiplex bus or a non-multiplex bus, the type is determined and the bus line from the connector 28 to the DPRAM 23 is automatically switched. Since the data signal and the address signal are always separately input to the DPRAM 23, the contents of the RAM 13 can be monitored, and the range of use of the monitor device 2 can be expanded.

In the above embodiment, the RAM 1 of the ECU 1
3 has been described, but the present invention is not limited to this monitor device, and may be, for example, an EC device.
Needless to say, the present invention can be similarly applied to an ECU adjustment device that performs ROM emulation for changing the storage content of the ROM 12 of U1 and other debugging.

[0026]

As described above, according to the electronic control unit adjusting apparatus of the present invention, even if the CPU bus type is a multiplex bus or a non-multiplex bus, the type is determined and the bus line is determined. Since the switching is automatically performed, debugging such as monitoring of the stored contents of the memory unit in response to a signal from the electronic control unit can be performed, and the range of use can be expanded.

[Brief description of the drawings]

FIG. 1 is a block diagram of a monitor device and an electronic control unit according to an embodiment of the present invention.

FIG. 2 is a diagram showing a state of a bus line in the case of a multiplex bus.

FIG. 3 is a diagram showing a state of a bus line in the case of a non-multiplex bus.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Electronic control unit (ECU) 2 Monitoring device (adjustment device) 11 CPU 13 RAM (memory part) 15-17 System bus 23 Dual port RAM (DPRAM) 25 Bus type discrimination part 26 Bus switching part

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-61-177552 (JP, A) JP-A-4-3699739 (JP, A) JP-A-4-302335 (JP, A) JP-A-2- 3835 (JP, A) JP-A-2-112003 (JP, A) JP-A-4-80674 (JP, A) JP-A-59-189459 (JP, A) JP-A-2-76054 (JP, A) JP-A-61-97767 (JP, A) JP-A-53-132231 (JP, A) JP-A-64-18347 (JP, U) (58) Fields investigated (Int. Cl. ⁷ , DB name) G06F 11/28 G06F 11/22 G06F 11/30 G06F 11/32 G06F 11/34 G06F 13/16

Claims (2)

(57) [Claims] 1. An adjusting device connected via a bus of a CPU of an electronic control unit for debugging contents stored in a memory unit thereof, the bus type determining unit determining a bus type of the CPU of the electronic control unit. An electronic control unit adjustment device, comprising: a bus switching unit that switches a bus line according to a determination result of the determination unit. 2. A dual port RAM which can be accessed from two directions, wherein data is written from the electronic control unit to the dual port RAM via a CPU bus, and the written data is read and monitored by a monitor device. The adjustment device for an electronic control unit according to claim 1, wherein the adjustment device is configured to perform the adjustment.