JP3117766B2 - Heterojunction bipolar transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a heterojunction bipolar transistor (hereinafter referred to as "HBT") which is promising as a high-speed, high-frequency device.

[0002]

2. Description of the Related Art An HBT in which an emitter is made of a semiconductor material having a larger energy band gap than a base.
Have many advantages over homojunction bipolar transistors. These are listed below. (1) Since the back injection of minority carriers from the base to the emitter is small, the emitter injection efficiency is high and the current gain is high. (2) As a result of (1), even if the impurity concentration of the base is increased, a high current gain can be maintained, and the base resistance can be reduced. (3) As a result of (1), the impurity concentration of the emitter can be reduced, so that the emitter junction capacitance can be reduced.

[0003] Due to these advantages, HBTs are
Promising transistor for high-speed logic
Have been. In general, current gain isolation of bipolar transistors
Cutting frequency f_tAnd the maximum oscillation frequency f _maxIs the number
1, given by Equation 2.

[0004]

(Equation 1)

[0005]

(Equation 2)

Here, τ _ec is the total delay time between the emitter and the collector, C _bc is the capacitance between the base and the collector, and R _b is the base resistance. The base resistance _Rb is a collector-top type transistor having a collector provided at the top, and is given by Equation 3 in a structure in which a base electrode is provided on both sides of the collector.

[0007]

(Equation 3)

Here, L _c , l _c , and l _bc are the collector length, the collector width, and the distance between the collector and the base electrode, respectively, and R _s , ρ _c are the sheet resistance and the contact resistivity of the base layer, respectively. . Therefore, in order to make effective use of the HBT, which is essentially advantageous for high speed and high frequency, it is necessary to use Equations 1 and 2
It is more important to reduce floating elements such as resistance and capacitance. In particular, in order to increase the maximum oscillation frequency f _max, it is important to reduce the capacitance C _bc and base resistance R _b the base-collector. Therefore, a collector-top type HBT provided with a collector at the top can reduce the base-collector capacitance _Cbc , which is advantageous for improving high-frequency characteristics.

Further, the base resistance R _b, as can be seen from Equation 3, the resistance of the intrinsic base portion is the number 3 of the first term on the right side can be made sufficiently small by optimizing the size of the collector region. The second term on the right side of Equation 3 can be made sufficiently small by applying the self-alignment method and reducing the distance between the collector and the base electrode. The third term on the right side of Equation 3 can be made sufficiently small by increasing the base concentration or introducing a semiconductor material having a small contact resistance with a metal.

By the way, a conventional collector top type HB
T has a sectional structure shown in FIG. This conventional collector-top type HBT is a GaAs-AlGaAs based HBT.
BT, semi-insulating Ga having a (001) plane orientation
An n ⁺ -type GaAs layer 22 serving as an emitter contact layer and an n-type Al _0.3 Ga serving as an emitter region are formed on an As substrate 21.
_0.7 As layer 23, p ⁺ type GaAs layer 2 serving as a base region
4. An n-type GaAs layer 25 serving as a collector region, an n ⁺ -type GaAs layer 26 serving as a collector contact layer, an emitter electrode 32, a base electrode 33 and a collector electrode 34 are formed. Has an insulating region 35 which is insulated by ion implantation using oxygen.

By adopting the collector-top structure, the capacitance between the base and the collector can be sufficiently reduced. In addition, an insulating region 35 is provided to suppress leakage of electrons injected from the emitter region to the base electrode 33 and increase current gain.

[0012]

However, in the above-described conventional configuration and manufacturing method, when performing ion implantation for forming the insulating region 35, oxygen passes through the base region, and thus the crystal of the base region is deteriorated. Invite, base electrode 3
The contact resistance with the metal that becomes 3 is not sufficiently reduced,
This is a cause of deteriorating high frequency characteristics. Further, after the implantation, the temperature must be raised to 700 ° C. or higher for activation, so that the steep doping profile and the composition profile are destroyed. Therefore, it is difficult to say that the insulating region 35 formed by ion implantation sufficiently suppresses the leak current, and thus there is a limit in increasing the current gain.

An object of the present invention is a child provide large heterojunction bipolar transistor current gain.

[0014]

According to a first aspect of the present invention, there is provided a heterojunction bipolar transistor, comprising: a semiconductor substrate having an emitter region of one conductivity type, an intrinsic base region and an external base region of another conductivity type, and a collector region of one conductivity type. Are provided in order, and a half of the emitter region is formed immediately below the external base region.
A leak suppression region of another conductivity type having a band gap larger than that of the conductor material is provided.

The heterojunction bipolar transistor according to claim 2, wherein, in the heterojunction bipolar transistor of claim 1, wherein, as the external base region, the semiconductor material layers of the same or different highly doped than the intrinsic base region
Forms form.

[0016]

[Action] heterojunction bipolar transient scan data of the present invention
According to, immediately below the external base region, an emitter region
With a larger band gap than the growing semiconductor material
By providing the electric leakage suppression region, the electrons injected from the emitter region can be sufficiently suppressed from leaking to the base electrode, so that the current gain can be increased.

Furthermore, the base resistance can be reduced by forming a highly doped same or different semiconductor material layer (second semiconductor material layer) in the external base region by epitaxy. As a result, a heterojunction bipolar transistor having high current gain and excellent high-frequency characteristics can be realized.

[0018]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional structural view of a heterojunction bipolar transistor according to one embodiment of the present invention. In this heterojunction bipolar transistor, an n @ + -type GaAs layer 2 serving as an emitter contact layer and n serving as an emitter region are formed on a semi-insulating GaAs substrate 1 having a (001) plane orientation.
-Type Al _0.3 Ga _0.7 As layer 3c, p ⁺ -type GaAs layer 4a serving as an intrinsic base region, and n-type GaAs serving as a collector region
n ⁺ -type GaAs serving as s layer 5a and collector contact layer
A layer 6a, an emitter electrode 12, a base electrode 13, and a collector electrode 14 are formed. Further, p-type doped Al _x is used as a leak suppression region for preventing electrons injected from the emitter region from leaking to the base electrode 13.
A Ga _1-x As (x> 0.3) layer 9 a and ap ⁺ -type Ge layer 10 a as an external base region are formed by epitaxy. In this case, p-type doped Al _x Ga
_{The 1-x} As (x> 0.3) layer 9a is smaller than the emitter region.
With a different conductivity type from the emitter region with a large band gap
Yes, pn junction in the emitter region just below the external base region
Formed at the junction between the wide band gaps
Pn junction between the intrinsic base region and the emitter region
All on voltages are high and flow through the junction in the normal operating range.
Current is negligible.

A method of manufacturing the heterojunction bipolar transistor thus configured will be described with reference to FIGS. First, on a semi-insulating GaAs substrate 1 having a (001) plane orientation, a 600 nm thick n-type impurity containing 5 × 10 ¹⁸ / cm ³ n-type impurities was formed by molecular beam epitaxy (MBE). ⁺ Type GaAs layer 2,
5 × 10 ¹⁷ / cm ³ n-type impurity-containing thickness 10
0 nm n-type Al _0.3 Ga _0.7 As layer (emitter material layer) 3, 100 nm p ⁺ -type GaAs layer (base material layer) containing 4 × 10 ¹⁹ / cm ³ p-type impurities
An n-type GaAs layer (collector material layer) having a thickness of 500 nm containing an n-type impurity of 4.5 × 10 ¹⁶ / cm ³
× 10 ¹⁸ / cm ³ thickness containing an n-type impurity of 200
After forming an n ⁺ -type GaAs layer 6 of nm, a silicon oxide (SiO ₂ ) film 7 is formed on the entire surface by a vapor phase growth method.
The structure shown in FIG. 2 is obtained.

Next, a pattern 8 made of aluminum corresponding to the collector region is formed on the SiO ₂ film 7 by vapor deposition and lift-off with the pattern extending in the [110] direction. Then, using the pattern 8 made of aluminum as a mask and fluorinated methane (CHF ₃ ) as an etching gas, the SiO ₂ film 7 is etched by a parallel plate type reactive etching (RIE) apparatus to obtain the pattern 8. An insulating film 7a made of a SiO ₂ film corresponding to the above is formed. Thereafter, n-type Al _0.3 Ga is etched by wet etching with a sulfuric acid / hydrogen peroxide-based etchant using the pattern 8 and the insulating film 7a as a mask.
Etch until the _0.7 As layer 3 remains about 70 nm,
n ⁺ -type GaAs layer 6a, n-type GaAs layer 5a, p ⁺ -type G
A forward mesa comprising an aAs layer 4a and an n-type Al _0.3 Ga _0.7 As layer 3a and a thin n-type Al _0.3 Ga _0.7 As layer 3b
Is formed to obtain the structure shown in FIG.

Then, after removing the aluminum pattern 8, Al _x Ga _{1 -x} As (x> 0 .0) doped p-type from the direction perpendicular to the substrate by molecular beam epitaxy .
3) The layer (first semiconductor material layer) 9 has a thickness of about 30 nm and a thickness of 1 × 10 ²⁰ / cm ³ containing a p-type impurity.
A 00 nm p ⁺ -type Ge layer (second semiconductor material layer) 10 is formed to obtain the structure shown in FIG.

Next, an insulating film 7a made of a SiO ₂ film and a polycrystallized semiconductor material layer (not shown) adhered thereon.
Is selectively removed, and then the p ⁺ -type Ge layer 10a and Al _x Ga _{1 -x} As are etched by photolithography and etching.
(X> 0.3) layer 9a, n-type Al _0.3 Ga _0.7 As layer 3
A mesa made of c is formed, and the n ⁺ -type GaAs layer 2 is exposed to obtain a structure shown in FIG.

Finally, the emitter electrode 12, base electrode 13 and collector electrode 14 are formed by photolithography and vapor deposition, and the HBT shown in FIG. 1 is completed. As described above, according to this embodiment, p-type doped Al _x Ga _{1 -x} is formed as a leak suppression region immediately below the external base region.
By forming the As (x> 0.3) layer 9a by epitaxy, electrons injected from the emitter region are reduced to the base electrode 1
3 is sufficiently suppressed, so that the current gain can be increased.

Further, a p ⁺ -type Ge layer 1 which is a highly doped semiconductor material layer (second semiconductor material layer) is formed in the external base region.
The base resistance can be reduced by epitaxially forming Oa. As a result, it has a high current gain,
In addition, a heterojunction bipolar transistor having excellent high-frequency characteristics can be realized. In this embodiment, p-type Ge (p ⁺ -type Ge layer 10a) is used as the external base region, but p-type Ga forming the intrinsic base region is used.
GaAs having the same concentration as or higher than that of As (p ⁺ -type GaAs layer 4a) may be used.

[0025]

Further, Al _0.3 Ga is used as an emitter region.
_Although a composition having a composition of _0.7 As is used, a composition other than the composition may be used. In short, it is only necessary that the emitter region has a larger energy band gap than the intrinsic base region. In addition,
In this embodiment, an npn-type HBT is described, but the present invention can also be applied to a pnp-type HBT. In the embodiment, the GaAs-AlGaAs-based HBT is described, but the present invention can also be applied to other material-based HBTs.

For example, n-type doped GaAs as the emitter region, p-type doped Ge as the intrinsic base region, and n-type doped G as the collector region
e, an undoped or p-type doped Al _x Ga _{1 -x} As (X> 0) as a leak suppression region formed epitaxy in the emitter region immediately below the external base region, and an intrinsic base region as the external base region. Ge doped with p-type and having a carrier concentration higher than that of Ge may be used.

Further, p-type doped Al _0.3 Ga _0.7 As as an emitter region, n-type doped GaAs as an intrinsic base region, p-type doped GaAs as a collector, and an emitter region immediately below an external base region. An undoped or n-type doped Al _x Ga _{1 -x} As (X>) leak-preventing region formed by epitaxy
0.3), GaAs or Ge having a carrier concentration higher than n-type doped GaAs forming the intrinsic base region may be used as the external base region.

Also, GaAs doped with p-type as an emitter region, Ge doped with n-type as an intrinsic base region, Ge doped with p-type as a collector region,
An undoped or n-type doped Al _x Ga _{1 -x} As (X> 0) is formed as a leak suppression region formed epitaxy in the emitter region immediately below the external base region, and an intrinsic base region is formed as the external base region. Ge doped with n-type and having a carrier concentration higher than Ge may be used.

[0030]

According According to the present invention as described above in the heterojunction bipolar transient is te of the present invention, immediately under the external base region,
Bandgirder larger than the semiconductor material forming the emitter region
By providing the other conductivity type leakage suppression region having a gap, the leakage of electrons injected from the emitter region to the base electrode can be sufficiently suppressed, so that the current gain can be increased.

Further, the base resistance can be reduced by forming a highly doped same or different semiconductor material layer (second semiconductor material layer) in the external base region by epitaxy. As a result, a heterojunction bipolar transistor having high current gain and excellent high-frequency characteristics can be realized.

[Brief description of the drawings]

FIG. 1 is a sectional view of a heterojunction bipolar transistor according to one embodiment of the present invention.

FIG. 2 is a sectional view showing a step of manufacturing a heterojunction bipolar transistor according to one embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a step of manufacturing a heterojunction bipolar transistor according to one embodiment of the present invention.

FIG. 4 is a cross-sectional view showing a step of manufacturing a heterojunction bipolar transistor according to one embodiment of the present invention.

FIG. 5 is a cross-sectional view showing a step of manufacturing a heterojunction bipolar transistor according to one embodiment of the present invention.

FIG. 6 is a sectional view of a conventional heterojunction bipolar transistor.

[Explanation of symbols]

Reference Signs List 1 GaAs substrate (semiconductor substrate) 2 n ⁺ -type GaAs 3 n-type Al _0.3 Ga _0.7 As (emitter material layer) 3 an n-type Al _0.3 Ga _0.7 As 3b n-type Al _0.3 Ga _0.7 A left during etching
s 3cn n-type Al _0.3 Ga _0.7 As (emitter region) 4 p ⁺ -type GaAs (base material layer) 4a p ⁺ -type GaAs (intrinsic base region) forming a mesa 5 n-type GaAs (collector material layer) 5a forming a mesa N type GaAs (collector region) 6 n ⁺ type GaAs 6 an ⁺ type GaAs 7 SiO ₂ film 7 a SiO ₂ film insulating film 8 aluminum pattern 9 epitaxy formed and p-type doped Al _x Ga _{1 -x}
As (x> 0.3) layer (first semiconductor material layer) 9a Al _x Ga doped epitaxially and doped into p-type
_1-x As (x> 0.3) layer (leakage suppression region) 10 Epitaxy-formed p ⁺ -type Ge (second semiconductor material layer) 10a Epitaxy-formed p ⁺ -type Ge (external base region) 12 Emitter electrode 13 Base electrode 14 Collector electrode

Continuation of the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/331 H01L 29/205 H01L 29/73-29/737

Claims (2)

(57) [Claims] 1. A semiconductor substrate, comprising: an emitter region of one conductivity type; an intrinsic base region and an external base region of another conductivity type;
A collector-top type heterojunction bipolar transistor sequentially provided with a collector region of one conductivity type , wherein the emitter region is formed immediately below the external base region .
Other conductive material with band gap larger than semiconductor material
A hetero-junction bipolar transistor, characterized in that a hetero- type leak suppression region is provided. 2. The heterojunction bipolar transistor according to claim 1, wherein the external base region is made of a same or different semiconductor material layer more highly doped than the intrinsic base region.