JP3125823B2 - Overflow detection circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an overflow detection circuit, and more particularly, to a low cut filter.
ilter) and calibration (Calibra)
The present invention relates to an overflow detection circuit in a digital signal circuit including a Tion circuit.

[0002]

2. Description of the Related Art At present, in AV equipment (audiovisual equipment) and the like, it has become popular to convert analog input signals such as audio signals and video signals into digital data using an A / D converter and perform various signal processing. Have been done.

FIG. 3 is a block diagram showing an example of the configuration of a conventional digital signal conversion circuit for converting an analog input signal into a digital signal and outputting the digital signal.

In FIG. 3, an analog input signal is input from an input terminal 11 and is amplified by a signal amplifier 12. The level of the amplified analog signal is adjusted by the level setting volume 13 and becomes the input of the A / D converter 1. The A / D converter 1 converts an input analog signal into digital data. The A / D converted digital data is supplied to the low cut filter 2 as an input data signal (IN). The low cut filter 2 is for blocking the passage of low frequency components.
The output data signal (OUT) of the low cut filter 2
Is digital data to be subjected to digital signal processing. Further, the output data signal (OUT) is sent to the overflow detection circuit 3 to detect an overflow.

That is, in this example, an input signal is digitized by an A / D converter 1 and an output data signal (OUT) is obtained through a low cut filter 2.
The low cut filter 2 is used to remove a DC component (hereinafter, also simply referred to as an “offset”) such as an offset voltage component and a temperature drift in the digitized data. This is because these offsets cause noise when performing digital signal processing.

Also, the digitized output data signal (OUT) needs to be within an effective data range (a numerical range that can be handled by a digital signal processing circuit). Therefore, the output data signal (OUT) is monitored by the overflow detection circuit 3. When the output data signal (OUT) has caused an overflow, the overflow detection signal (FLAG) is output from the overflow detection circuit 3. The input level of the / D converter 1 is adjusted.

FIG. 4 is a block diagram showing another example of the configuration of a conventional digital signal conversion circuit, which is for converting an analog input signal into a digital signal and outputting the same as in the conventional example of FIG. is there. Parts corresponding to those in the conventional example of FIG. 3 are denoted by the same reference numerals, and description thereof will be omitted as appropriate.

In the conventional example shown in FIG. 4, a calibration circuit 6 is used in place of the low cut filter 2 used in the conventional example shown in FIG. 3, and other configurations are the same as those in the conventional example shown in FIG. is there.

In the conventional example shown in FIG. 4, data digitized by the A / D converter 1 is sent to a calibration circuit 6 as an input data signal (IN). This input data signal (IN) becomes one input data of the adder 6b in the calibration circuit 6, and is also sent to the calibration register 6a. The compensation data for the offset is set in the calibration register 6a, and the compensation data becomes the other input data of the adder 6b as negative (-) data. Therefore, the output data signal (OUT) of the adder 6b is data in which the offset is compensated. The adder 6b
The output data signal (OUT) is fed to the overflow detection circuit 3, the detection of the overflow is made.

The example of FIG. 4 is different from the example of FIG. 3 only in that the low cut filter 2 is changed to a calibration circuit 6, and the overflow detection is performed by using an output data signal (OUT) in which an offset is compensated. Is the same as the example of FIG.

[0011]

As described above, FIG.
In both of the conventional examples shown in FIG. 4, an output data signal (OUT) is obtained by removing an offset from an A / D converted input data signal (IN) and the output data signal (OUT) is obtained.
, Overflow is detected.

However, in the case of such a configuration, depending on the form of the input data signal (IN), the overflow may not be detected normally. Less than,
Although the case of the conventional example of FIG. 3 will be described, the situation is the same for the case of the conventional example of FIG.

FIG. 5 is a diagram showing a signal example for explaining the problem of the conventional example of FIG. In FIG.
(A) shows an input data signal (I) to the low cut filter 2.
N), and FIG. 5B shows the output data signal (OUT) of the low cut filter 2, and each waveform is expressed as an analog waveform signal for easy understanding. However, it is actually a digitally coded data signal. The symbol + FU in the figure
LL represents a 100% level (maximum value) on the positive side effective as a digital signal, and -FULL represents a 100% level (minimum value) on the negative side, which is also a detection level of the overflow detection circuit 3. Equivalent to.

That is, the input data signal 5 shown in FIG.
Reference numeral 1 includes a large amount of offset (DC) and overflows the low cut filter 2 at the portion indicated by the broken line. When the signal 51 passes through the low cut filter 2, the offset (DC) is removed, and
The data in the overflow portion is lost, resulting in a waveform 52 shown in FIG. In this case, since the overflow detection circuit 3 monitors the signal 52, the overflow cannot be detected.

The problem in the case of the input signal shown in FIG. 5 can be avoided if the input data signal (IN) of the low cut filter 2 is used as the input signal of the overflow detection circuit 3 as shown in FIG. it can. However, a problem arises this time with the waveform shown in FIG.

That is, FIG. 7 is a diagram showing an example of a signal for explaining the problem of the conventional example of FIG.
FULL, -FULL, and the like are the same as those in FIG.

In FIG. 7, the input data signal 71 of FIG. 7A includes a large amount of offset (DC), but no overflow occurs. However, when the waveform 71 passes through the low-cut filter 2, the offset (DC) is removed, and the signal 72 shown in FIG. 7B is obtained, and an overflow occurs at a portion shown by a broken line. In this case, since the overflow detection circuit 3 (FIG. 6) monitors the signal 71, the overflow cannot be detected.

As described above, in the conventional overflow detection circuit, the input data signal (IN) or the output data signal (OUT) obtained by removing the offset from the input data signal (IN).
, Overflow detection may not be performed depending on the form of the input data signal (IN), making it difficult to adjust the input level optimally.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and in a digital signal processing circuit having a low cut filter and a calibration circuit, an overflow detection circuit capable of accurately detecting an overflow regardless of the form of an input signal. The purpose is to provide.

[0020]

According to the first aspect of the present invention, there is provided an overflow detecting circuit for detecting an overflow of an input data signal to a low cut filter, and detecting an overflow of an output data signal from the low cut filter. a second overflow detecting means for, first
Based on the detection results of the first and second overflow detection means.
To determine whether an overflow has occurred.
And a step . The above determination means include
At least one of the first and second overflow detecting means.
If an overflow is detected,
Is generated, and a signal indicating the determination result is generated.
Means may be further provided. Overflow occurs
An overflow table that displays this when it is determined to have occurred
An indicating means may be further provided.

According to a fourth aspect of the present invention, there is provided an overflow detecting circuit comprising:
A first overflow detecting means for detecting an overflow of the input data signal to the calibration circuit, and a second overflow detecting means for detecting an overflow of the output data signal from the calibration circuit, the first and
On the basis of the detection result of the second overflow detection means,
And determining means for determining whether or not overflow has occurred.

[0022] The determination means includes the first and second o.
At least one of the overflow detection means
If detected, it is determined that an overflow has occurred and
Generating means for generating a signal indicating the determination result of
Can be When it is determined that an overflow has occurred
In addition, an overflow display means for displaying this is provided.
Can be

[0023]

In the overflow detecting circuit having the configuration according to the first aspect, the input data signal to the low cut filter is supplied to the second cut filter .
The first overflow detection means monitors the output data signal from the low cut filter by the second overflow detection means , and further, based on the detection results of these two overflow detection means , Whether an overflow has occurred
Is determined.

Therefore, the overflow detection circuits 4a, 4b
If one or both of them detects an overflow, the OR circuit 4c outputs an overflow detection signal. That is, since overflow detection is performed for both the input data signal and the output data signal of the low cut filter 2, the overflow can be accurately detected even if the offset is removed.

In the overflow detecting circuit according to the fourth aspect , the input data signal to the calibration circuit is monitored by the first overflow detecting means , and the output data signal from the calibration circuit is monitored by the second overflow detecting means . Monitoring by the row detecting means , and based on the detection results of these two overflow detecting means, an overflow is generated.
It is determined whether it has been done.

Therefore, the overflow detection circuits 4a, 4b
If one or both of them detects an overflow, the OR circuit 4c outputs an overflow detection signal. That is, since the overflow detection is performed for both the input data signal and the output data signal of the calibration circuit 6, the overflow can be reliably detected even if the offset of the signal is removed.

In the overflow detection circuit having the structure described in claim 5 , the overflow detection circuit according to claim 1 or 3 is provided with an overflow display circuit 5 for displaying that an overflow has occurred. Therefore, the optimum input level can be easily adjusted while watching the overflow display.

[0028]

FIG. 1 is a block diagram showing the configuration of an embodiment of an overflow detection circuit according to the present invention.
This is an embodiment commonly corresponding to the invention described in No. 5 . Parts corresponding to those in the conventional example of FIG. 3 are denoted by the same reference numerals, and description thereof will be omitted as appropriate.

In FIG. 1, A / D converter 1
The D-converted digital data is input to an input data signal (I
N) and sent to the low-cut filter 2,
It is also sent to the overflow detection circuit 4a (first overflow detection means). Output data signal obtained through low cut filter 2 (OUT), together are sent to the digital signal processing circuit, the overflow detection circuit 4b (second
To the overflow detection means). The OR detection of the overflow detection outputs of the overflow detection circuits 4a and 4b is performed by an OR circuit 4c ( determining means), and the result is output as an overflow detection signal (FLAG). The overflow display circuit 5 (overflow display means) receives the overflow detection signal (FLAG) and turns on the LED 5b.

That is, in this embodiment, the overflow detection circuit 4a detects an overflow for the input data signal (IN) of the low cut filter 2, and the overflow detection circuit 4b detects the overflow for the output data signal (OUT). It is carried out. Therefore, when one or both of the overflow detection circuits 4a and 4b detect an overflow, an overflow detection signal (FLAG) is output from the OR circuit 4c. As described above, in the present embodiment, since the overflow detection is performed for both the input data signal (IN) and the output data signal (OUT) of the low cut filter 2, even if the offset of the input signal is removed, the overflow is accurately performed. Can be detected.

If an overflow has occurred, the display control circuit 5a turns on the LED 5b so that the overflow state can be clearly identified.

Therefore, if an overflow has occurred, the level setting volume 13 is adjusted (by adjusting the input signal level to the A / D converter 1) until the LED 5b is turned off, and the overflow state is released. be able to.

In this embodiment, the method of adjusting the level of the input signal of the A / D converter 1 while checking the lighting state of the LED 5b includes the A / D converter 1 inside. It can be used particularly effectively for devices that do not have a level display meter.

FIG. 2 is a block diagram showing the configuration of another embodiment of the overflow detection circuit of the present invention, which is an embodiment commonly corresponding to the third and fifth aspects of the present invention. Note that the same reference numerals are given to portions corresponding to the conventional example in FIG. 4 and the embodiment in FIG.

[0035] In the embodiment of FIG. 2, a common terminal "c" of the changeover switch 7 is connected to the input of the A / D converter 1, one terminal "a" of the changeover switch 7 is connected to the level setting volume 13, The other terminal "b" is grounded. Normally, the terminal “a” and the terminal “c” are connected. The digital data output from the A / D converter 1 is sent as an input data signal (IN) to the calibration circuit 6 and also to the overflow detection circuit 4a. The output data signal (OUT) of the calibration circuit 6 is sent to the overflow detection circuit 4b.

In the embodiment shown in FIG.
This is a method in which the calibration register 6a and the adder 6b are used, and the set value to the calibration register 6a is converted into the input data signal (IN) by the adder 6b.
, And offset compensation is performed.

For example, to compensate for the offset of the A / D converter 1, the changeover switch 7
The input of the A / D converter 1 is grounded, and the amount of compensation to the calibration register 6a is set so that the output data signal (OUT) of the adder 6b becomes zero.

In the embodiment shown in FIG. 2, similarly to the embodiment shown in FIG. 1, two overflow detection circuits 4a and 4b are used, and the overflow of the input data signal (IN) to the calibration circuit 6 is performed by the overflow detection circuit 4a. , And the overflow detection circuit 4b detects the overflow of the output data signal (OUT). Therefore, when one or both of the overflow detection circuits 4a and 4b detect an overflow, an overflow detection signal (FLA) is output from the OR circuit 4c.
G) is output. That is, the input data signal (IN) and the output data signal (O
UT) to detect overflow for both.
Even if the offset of the input signal is removed, the overflow can be accurately detected.

The point that the level of the input signal is adjusted while observing the LED 5b is the same as in the embodiment of FIG.

[0040]

According to the overflow detecting circuit of the present invention, an overflow is detected based on both the input data signal and the output data signal of the calibration circuit.
Is determined , the overflow of digital data can be reliably detected.

[0041] According to the overflow detection circuit according to claim 3, based on both the signal of the input data signal and an output data signal of the calibration circuit, the overflow
Since it is determined whether or not the overflow has occurred , the overflow of the digital data can be reliably detected.

[0042] According to the overflow detection circuit according to claim 5, and reliably detect the overflow, since be displayed, it is possible to adjust the input level to the A / D converter and the like easily and optimally.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of an overflow detection circuit of the present invention.

FIG. 2 is a block diagram showing the configuration of another embodiment of the overflow detection circuit of the present invention.

FIG. 3 is a block diagram illustrating a configuration example of a conventional digital signal conversion circuit.

FIG. 4 is a block diagram illustrating another configuration example of a conventional digital signal conversion circuit.

FIG. 5 is a diagram showing a signal example for explaining a problem of the conventional example.

FIG. 6 is a block diagram in which the configuration of the conventional example of FIG. 3 is partially changed.

FIG. 7 is a diagram showing a signal example for explaining a problem of the conventional example of FIG. 6;

[Explanation of symbols]

Reference Signs List 1 A / D converter 2 Low cut filter 3 Overflow detection circuit 4 Overflow detection circuit section 4a Overflow detection circuit (first overflow detection means) 4b Overflow detection circuit (second overflow detection means) 4c OR circuit (OR circuit) ( 5) Overflow display circuit (overflow display means) 5a Display control circuit 5b LED 6 Calibration circuit 6a Calibration register 6b Adder 7 Changeover switch 11 Input terminal 12 Signal amplifier 13 Level setting volume

Claims (6)

(57) [Claims] 1. An overflow detection circuit of a digital signal processing circuit having a low cut filter, wherein: first overflow detection means for detecting an overflow of an input data signal to the low cut filter; and an overflow of an output data signal from the low cut filter. A second overflow detecting means for detecting the detection result, and a detection result of the first and second overflow detecting means.
To determine whether an overflow has occurred based on the
Overflow detection circuit characterized by comprising a constant section. 2. The method according to claim 1, wherein the determining unit is configured to perform the first and second operations.
At least one of the overflow detection means
If detected, it is determined that an overflow has occurred and
Generating means for generating a signal indicating the result of determination Further equipped
2. The overflow detection circuit according to claim 1, wherein
Road. 3. When it is determined that an overflow has occurred.
Overflow display means for displaying this on Further comprising
2. The overflow detection circuit according to claim 1, wherein
Road. 4. A calibrator for compensating a signal offset.
Over digital signal processing circuit with
In the flow detection circuit, When the input data signal to the calibration circuit is
First overflow detecting means for detecting a overflow; Turn off the output data signal from the calibration circuit
Second overflow detecting means for detecting an overflow, The detection results of the first and second overflow detection means
To determine whether an overflow has occurred based on the
Means Overflow detection circuit characterized by comprising:
Road. 5. The method according to claim 1, wherein the determining unit is configured to perform the first and second operations.
At least one of the overflow detection means
If detected, it is determined that an overflow has occurred and
Generating means for generating a signal indicating the result of determination Further equipped
5. The overflow detection circuit according to claim 4, wherein
Road. 6. When it is determined that an overflow has occurred.
Overflow display means for displaying this on Further comprising
5. The overflow detection circuit according to claim 4, wherein
Road.