JP3147355B2 - Address translator - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing apparatus, and more particularly to a method for specifying an effective area in address conversion.

[Conventional technology]

Conventionally, this type of effective area specification method is only in the positive growth direction, and the effective area range specification is a range divided from the lower address, such as 1/1, 1/2, 1/4, 1/8 of the area , The table area is reduced according to the system, and the table search time is reduced by address conversion.

 FIG. 5 shows a circuit diagram in a conventional example.

1 / 1,1 / 2,1 / 4,1 / the effective area range for each area
A range register (500) in which 8 is stored in 2 bits, a decoder (502), a current page register (501) for storing a virtual address currently undergoing address translation, a comparator (503), and a selector (503). 504). Each comparator (503) detects whether the address of the current page register (501) is within the range of the valid area, decodes the range register (500) by the decoder (502), and is valid by the selector (504). As a result of selecting the range of the area, an effective area signal AREAOK (505) is generated.

FIG. 6 shows a memory map diagram in a conventional example. FIG. 6A shows an effective area when 1/2 is specified in the range register. FIG. 6B shows an effective area when 1/4 is specified in the range register.

[Problems to be solved by the invention]

In the above-described conventional method for specifying an effective area, since only the positive growth direction is used, the disadvantage that the growth in the negative direction, such as a stack, must be adjusted to the upper limit of the specified effective address. is there.

[Means for solving the problem]

According to the present invention, a method of designating an effective area includes a growth direction bit for storing a positive or negative growth direction of the effective area, a boundary page register for storing a page number indicating a boundary point of the effective area, and a current address conversion. A current page register for storing the virtual address of the current page, and a subtractor for outputting only the borrow information obtained by the subtraction.

As described above, in contrast to the above-described conventional effective address specification method, the present invention has two types of growth directions, positive and negative, in the effective area, and specifies the range of the effective area in page units.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

 FIG. 1 is a circuit diagram of a first embodiment of the present invention.

The virtual address (107) is an area number, a page number,
Consists of an offset.

A growth direction bit (100) that stores the positive or negative growth direction of the effective area, a boundary page register (101) that stores, for each area, a page of a definable range boundary point in the area; , A current page register (102) for storing a virtual address whose address is to be converted, and a subtractor (103) for outputting only borrow information obtained by subtraction. Using the growth direction bit as borrow, the value of the current page register (102) is subtracted from the value of the boundary page register (101) with borrow by the subtractor (103). As a result, the output page borrow (10
4) and the exclusive OR (105) of the growth direction bits gives
Generate the area valid signal AREAOK (16).

Here, the operation result of the subtractor (103) is as follows.

However, it is assumed that the subtractor (103) has operation bits that do not cause overflow.

FIG. 2 is a memory map diagram in the area of the first embodiment of the present invention.

The page (200) indicating the boundary of the effective area has a different meaning depending on the growth direction of the area. A positive growth direction means the upper limit of the effective area, and a negative growth direction means the lower limit of the effective area. I do. Therefore, when the current access page of the address to be accessed is the current access page ≦ the boundary page of the effective area (positive growth direction), the current access page ≧ the boundary page of the effective area (negative growth direction), the correct access ( Is within the range). At this time, the area valid signal AREAOK (105) is active.

 FIG. 3 is a circuit diagram of a second embodiment of the present invention.

The virtual address is composed of a section number, an area number, a page number, and an offset.

The difference from the first embodiment is that a growth direction bit is provided for each of the section and the area. Also, sections,
Since the addresses are converted in the order of the areas, the effective area is detected by one subtractor (307).

A section growth direction bit (300) for storing the positive or negative growth direction of the effective section, and an area growth direction bit (30) for storing the positive or negative growth direction of the effective area.
1), a boundary area register (302) that stores, for each section, an area of a definable range boundary point in the section, and a page of a definable range boundary point in the area for each area. And a current area register (3) storing a virtual address register (306) that is performing a current address translation.
04), a current page register (305), and a subtractor (307) that outputs only the subtracted borrow information.

An area signal AREA (30) for identifying whether the address being converted is an area or a page.
Switching is performed using the multiplexer (318) according to 8).
The section growth direction bit and the area growth direction bit are selected by the multiplexer (318), and the growth direction signal (30
9) Generate A boundary area register (302) and a boundary page register (303) are selected by a multiplexer (318) to generate a boundary address (310). Multiplexer (318) of current area register (306) and current page register (305) of current address register (306)
To generate the current address (311). Using the growth direction signal (309) as a borrow, the boundary address (310)
Then, subtraction with borrow from the current address (311) is performed by the subtractor (307). As a result, the output area
A section valid signal SECTOK (316) is generated by an exclusive OR (314) of the borrow (312) and the growth direction signal (309). Similarly, an area valid signal AREAOK (317) is generated by an exclusive OR (315) of the page borrow (313) and the growth direction signal (309).

Here, the operation result of the subtractor (307) is as follows.

○ If the address being converted is an area (AREA = 1) ○ If the address currently being translated is an area (AREA = 0) However, it is assumed that the subtractor (307) has operation bits that do not cause overflow.

FIG. 4 is a memory map diagram of sections and areas according to the second embodiment of the present invention.

The area (400) that points to the boundary of the effective section has a different meaning depending on the growth direction of the section. A positive growth direction means the upper limit of the effective section, and a negative growth direction means the lower limit of the effective section. I do. The meaning of the page (402) pointing to the boundary of the effective area also differs depending on the growth direction of the area. A positive growth direction means the upper limit of the effective area, and a negative growth direction means the lower limit of the effective area. Means Therefore, the current access area of the address to be accessed is: current access area ≦ boundary area of valid section (positive growth direction) current access area ≧ boundary area of valid section (negative growth direction) If the current access page is current access page ≤ effective area boundary page (positive growth direction) Current access page ≥ valid area boundary page (negative growth direction), and access is correct (within range) Judge that there is. At this time, the section valid signal SECTOK (316)
And the area valid signal AREAOK (317) are both active. This determination is made in the order of the address conversion, that is, in the order of the effective section and the effective area.

〔The invention's effect〕

As described above, according to the present invention, positive and negative 2
By setting the growth direction in the positive direction in the area where normal data and instruction codes exist, and setting the growth direction in the negative direction for the stack, the table area is reduced according to the system and the address is reduced. There is an effect that the table search time can be shortened by the conversion, and the area for the stack can be effectively used.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a first embodiment of the present invention. FIG. 2 is a memory map diagram in the area of the first embodiment of the present invention. FIG. 3 is a circuit diagram of a second embodiment of the present invention. FIG. 4 is a memory map diagram of sections and areas according to the second embodiment of the present invention. FIG. 5 is a circuit diagram of a conventional example. FIG. 6 is a memory map diagram of a conventional example. 100 ... growth direction bit, 101 ... valid boundary page register, 102 ... current page register, 103 ... subtractor,
104… Page borrow, 105… Exclusive OR, 106…
… Area valid signal AREAOK, 107 …… Virtual address, 200…
... Page indicating boundary of effective area, 201 ... Effective area, 202 ... Effective area, 300 ... Section growth direction bit, 301 ... Area growth direction bit, 302 ... Boundary area register, 303 ... Boundary page・ Register, 304 ...
Current area register, 305: Current page register, 306: Address register, 307: Subtractor, 308
... area signal, 309 ... growth direction signal, 310 ... start address, 311 ... current address, 312 ... area borrow, 313 ... page borrow, 314 ... exclusive OR, 31
5 …… Exclusive OR, 316 …… Section valid signal SECT
OK, 317: Area valid signal AREAOK, 318: Multiplexer, 400: Area pointing to the boundary of valid section, 4
01 ... valid section, 402 ... page pointing to the boundary of valid area, 403 ... valid area, 500 ... range register,
501 ... current page register, 502 ... decoder, 503
…… Comparator, 504 …… Selector, 505 …… Effective area signal
AREAOK, 600: Boundary of effective area (1/2 of maximum area), 60
1 ... effective area, 602 ... boundary of effective area (1/1 of maximum area)
4), 603: Effective area.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G06F 12 / 10,9 / 46,9 / 34

Claims (1)

(57) [Claims] 1. An address translation device for translating a virtual address into a real address by a page-based virtual storage function, wherein a growth direction bit for storing a positive or negative growth direction of an effective area and a boundary point of the effective area are indicated. A boundary page register for storing a page number, a current page register for storing a virtual address for which the current address is being translated,
A subtractor that outputs only the borrow information obtained by the subtraction, wherein the growth direction bit is set as a borrow, and the value of the current page register is subtracted with the borrow from the value of the boundary page register by the subtractor. An address translation device, wherein an effective area signal is generated by an exclusive OR of the output and the growth direction bit.