JP3148461B2 - Liquid crystal display module signal wiring structure - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal wiring structure for a liquid crystal display module.

[0002]

2. Description of the Related Art In recent years, high definition of liquid crystal display devices has been promoted, but with the progress of high definition, influences between respective mounting components such as signal wiring and driver ICs cannot be ignored. .

FIG. 6 is a plan view of a signal wiring structure of a conventional liquid crystal display module, FIG. 7 is an enlarged plan view of a region surrounded by a chain line in FIG. 6, and FIG. 8 is a solid line B in FIG. '
FIG. 9 is a cross-sectional view of the position of the sample-and-hold capacitor near the end of the driver IC along the line A. FIG. 9 is a cross-sectional view of the position of the output terminal of the driver IC near the end of the driver IC along the solid line A ′ in FIG. Is shown.

As shown in FIG. 6, a driving driver IC 3 for supplying a signal to a liquid crystal display module provided with a plurality of sample-and-hold capacitor columns 2 including a plurality of sample-and-hold capacitors 1 is provided with a transparent insulating substrate such as glass. It is electrically connected to the signal wiring 4 on the substrate via a dielectric substance. The input of each signal to the driver IC 3 is input from the input wiring 5 on one side of the driver IC 3.

[0005] Here, dielectric material, the first SiN _X or the like on signal lines below the insulating film, covering the sample hold capacitor second consisting of a polyimide or the like is one of the circuits constituting the driver IC Insulating film and driver IC
And the signal wiring board.

As shown in FIG. 7, the signal wiring 4 is connected to the liquid crystal display module from the signal output terminal 7 of the driver IC 3 so as to overlap the sample / hold capacitor array 2 of the driver IC.

At this time, there is a sample-and-hold capacitor 1 which does not overlap with the signal wiring 4.

This will be described with reference to FIGS.

First, the physical and electrical connection between the driver IC and the signal wiring board 6 will be described with reference to FIG.

A signal wiring 4 made of Au / Cr or the like is formed on a transparent insulating signal wiring board 6, for example, a glass substrate, and a contact hole for contacting with a signal output terminal 7 of a driver IC 3 described later thereon. the entire region other than 8, the first insulating film 9 such as SiN _X is covered by laminating.

The signal wiring board 6 and the driver IC 3 are physically connected to each other by an adhesive 12 mixed with conductive particles 11 having a particle diameter of about several microns, and a signal output terminal 7 of the driver IC 3 is connected to a signal output terminal 7. The wiring 4 is electrically connected to the wiring 4 by the conductive particles 11 through a region where the first insulating film 9 is not stacked, that is, through the contact hole 8 provided in the first insulating film 9. .

Next, a method of superimposing the sample-and-hold capacitor 1 and the signal wiring 4 will be described with reference to FIG. 9 showing a sectional view of the vicinity of the sample-and-hold capacitor 1 of the driver IC.

The driver IC 3 has a sample-and-hold capacitor 1, and its periphery is covered with a second insulating film 10 made of polyimide or the like.

Two sample-and-hold capacitors correspond to one signal line.

The other signal wiring 4 is a driver IC connected to a contact hole 8 provided in the first insulating film 9.
The output terminal 7 is connected to the liquid crystal display module through a path that overlaps with the position of the sample and hold capacitor 1 of the driver IC 3 from the output terminal 7 and is connected to the liquid crystal display module. Since it is disposed through the shortest oblique distance from the terminal, in the region at the end of the driver IC, there is a supplementary hold capacitor that does not overlap with the signal wiring.

Therefore, the mutual influence between the signal wiring and the sample-and-hold capacitor is not uniform, so that a line-shaped luminance unevenness occurs in the image of the liquid crystal display module.

Here, the influence on the image from the sample and hold capacitor of the driver IC in the case of the signal wiring structure of the conventional liquid crystal display module will be described.

FIG. 10 shows the effect on the image from the sample and hold capacitor of the driver IC in the case of the signal wiring structure of the conventional liquid crystal display module.

Here, a case where the number of signal wirings 4 corresponding to one row of sample-and-hold capacitors 2 is 15 is shown.

In the figure, the horizontal axis indicates the number of the signal wiring from the left end on the video signal side of the liquid crystal display module, and the vertical axis indicates the output voltage level of the signal wiring.

As shown in FIG. 1, conventionally, signal wirings (30n + 1th and 30n + 30) which do not substantially overlap with the sample and hold capacitors near both ends of the driver IC
, N = 0, 1, 2, 3 and the signal wiring numbers in the figure are 1, 30, 31, 31, 60 and 61) and about 1/4 of the sample and hold capacitors. No signal wiring (30n + 2 and 30n + 29, n =
0, 1, 2, and 3;
Nos. 29, 32, 59 and 62)
The voltage of the signal supplied to the driver IC 3 is compared with the voltage of the signal wiring superimposed on the sample and hold capacitor near the center of the driver IC such as the signal wiring numbers 10 and 25 in the figure, and The voltage of the supplied signal is high.

Therefore, when the display system is a normally white system, there is a drawback that, in the case of the signal wiring on the video signal side, regions having high luminance in the vertical direction at equal intervals are generated in the image of the liquid crystal display module.

Naturally, in the normally black system, contrary to the normally white system, in the case of the signal wiring on the video signal side, regions having low luminance in the vertical direction at equal intervals are displayed in the image of the liquid crystal display module. There is a disadvantage that this occurs.

[0024]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned drawbacks, and has been made in consideration of the above-mentioned drawbacks. An object of the present invention is to provide a wiring structure of a liquid crystal display module which is arranged so that an area where each sample-and-hold capacitor provided in an IC overlaps with each other is uniform, and can supply a signal to the liquid crystal display module uniformly. And

[0025]

A wiring structure of a liquid crystal display module according to the present invention comprises a signal wiring for supplying a signal to the liquid crystal display module on a transparent insulating substrate, and a dielectric material interposed on the signal wiring. A driver IC in which a plurality of sample-and-hold capacitors corresponding to the respective signal lines are arranged, and the signal line and the driver IC are connected to each other.
The area where the signal wiring corresponding to the output terminal of the driver IC overlaps with the sample hold capacitor corresponding to each signal wiring is uniform in each sample hold capacitor.

[0026]

According to the present invention, a signal wiring for supplying an output signal from a driver IC for driving a liquid crystal display module to a liquid crystal display module is provided for each sample and hold capacitor row provided in the driver IC. Since the capacitors are arranged so as to be superimposed uniformly, the supplied signal can be made uniform.

[0027]

FIG. 1 is a plan view of a signal wiring structure of a liquid crystal display module of the present invention, FIG. 2 is an enlarged plan view of a region surrounded by a dashed line in FIG. 1, and FIG. FIG. 4 is a cross-sectional view of the position of the sample and hold capacitor near the end of the driver IC along the solid line B. FIG. 4 is a cross-sectional view of the position of the output terminal of the driver IC near the end of the driver IC along the solid line A in FIG. The figure is shown.

As shown in FIG. 1, a plurality of sample-and-hold capacitor arrays 2 in which a plurality of sample-and-hold capacitors 1 are arranged are provided, and a driver IC 3 for supplying a signal to a liquid crystal display module is provided on a transparent insulating substrate. ,
For example, it is electrically connected to a signal wiring 4 on a glass substrate via a dielectric substance.

Each signal to the driver IC 3 is
It is input from one side of C3 from the signal input terminal 5 of the driver IC3.

Although not shown, the number of driver ICs is, for example, 6 around the liquid crystal display module on the video signal side.
And eight on the scanning signal side.

As shown in FIG. 2, each signal wiring 4 is disposed so as to be uniformly superimposed on the position where each sample-hold capacitor 1 of each sample-hold capacitor row 2 of the driver IC 3 is formed.

The sample-and-hold capacitor for holding the signal supplied to the signal line C in FIG.
However, the sample-and-hold capacitor D is arranged so that the area overlapping the signal wiring other than the signal wiring C is uniform with the other signal wirings.

[0033] By doing so, the first insulating film SiN _X or the like on signal lines will be described later, a second insulating film made of polyimide or the like covering the sample hold capacitor is one of the circuits constituting the driver IC And driver IC
The applicant of the present application has determined that the capacitance generated between the sample hold capacitor and the signal wiring will affect all the signal wirings in a well-balanced manner due to the respective dielectric substances of the adhesive bonding the signal wiring board and the signal wiring board. Found by experiment.

The connection between the driver IC and the signal wiring board and the superposition of the sample-and-hold capacitor of the signal wiring according to FIG. 4 showing the cross-sectional view of the solid line A in FIG. 2 and FIG. 3 showing the cross-sectional view of the solid line B in FIG. How to explain.

First, as shown in FIG. 3, Au / Cr or I / O is formed on a transparent insulating signal wiring substrate 6, for example, a glass substrate.
A signal wiring 4 made of TO (Indium Tin Oxide) and having a thickness of about 1000 to 2000 mm is formed, and the entire surface of the region other than the contact hole 8 which contacts the signal output terminal 7 of the driver IC 3 is SiN _X. The first insulating film 9 is laminated and covered. The transparent insulating signal wiring substrate 6 is not limited to a glass substrate but may be a quartz substrate.

The driver IC 3 and the signal wiring board 6 are physically connected to each other by an adhesive 12 mixed with conductive particles 11 having a particle diameter of about several microns, as in the conventional connection method. The signal output terminal 7 of the driver IC 3 and the signal wiring 4 are connected by the conductive particles 11 through a region where the first insulating film 9 is not laminated, that is, through the contact hole 8 provided in the first insulating film 9. They are electrically connected.

Next, as shown in FIG.
Is provided with a sample-and-hold capacitor 1, and the periphery thereof is covered with a second insulating film 10 made of polyimide or the like. Also, two sample-and-hold capacitors 1 correspond to one signal wiring 4 and are located almost at the center of the signal wiring 4 and overlap with the signal wiring via the above-described dielectric substance.

The feature of the present invention is that each of the signal wirings 4 is uniformly overlapped with each of the sample and hold capacitors 1 of the driver IC 3.

Here, the signal wiring structure of the liquid crystal display module of the present invention, that is, the structure in which each signal wiring overlaps with each sample-hold capacitor of the driver IC, and the case where the sample-hold capacitor in the signal wiring overlaps The effect on the image due to the structure of the signal wiring is compared with that of the conventional signal wiring, which does not have any.

FIG. 5 is a characteristic diagram showing the effect on the image from the sample and hold capacitor of the driver IC in the case of the signal wiring structure of the liquid crystal display module of the present invention.

Here, a case where the number of signal wires 4 corresponding to one row of sample-and-hold capacitors 2 is 15 is shown.

In the figure, the horizontal axis shows the number of the signal wiring from the left end on the video signal side of the liquid crystal display module, and the vertical axis shows the output voltage level of the signal wiring. The signal wiring numbers correspond to those described in the section of the related art.

As shown in the figure, the signal wiring (signal wiring numbers 1 and 30 in the figure) which has hardly overlapped the sample hold capacitor near the end of the driver IC conventionally.
No. 31, No. 60, No. 61), and signal wiring that did not overlap about 1/4 with the sample hold capacitor (No. 2, No. 29, No. 32, No. 59, No. 62 in the figure) Also, the voltage of the signal supplied to the liquid crystal display module is uniformly supplied to the liquid crystal display module without increasing.

For this reason, when the display system is a normally white system, in the case of the signal wiring on the video signal side, the image of the liquid crystal display module is superimposed on the conventional sample and hold capacitor near the end of the driver IC. A uniform image can be supplied without generating a region having a high luminance in the vertical direction at equal intervals for each unconnected signal wiring.

Naturally, in the normally black system, contrary to the normally white system, in the case of the signal wiring on the video signal side, regions having low luminance in the vertical direction at equal intervals are displayed on the image of the liquid crystal display module. Thus, a uniform image can be supplied without any occurrence of the image.

In the above-described embodiment, the signal wiring on the video signal side has been particularly described. However, it is apparent that the same effect can be obtained by using the present invention on the scanning signal side.

The sample-and-hold capacitor D for holding the signal supplied to the signal wiring C in FIG. 2 may overlap with the signal wiring C itself if there is no space for arranging the signal wiring.

Further, the above-mentioned general formula 3 representing the signal wiring number
0n + 1, 30n + 30, 30n + 2 and 30n + 29
Is a case where the number of signal wirings corresponding to one row of sample and hold capacitors is fifteen, and the value of n in the equation fluctuates according to the number of signal wirings. In general, n is 0 or more. Is an integer.

[0049]

According to the present invention, an area where a signal wiring for supplying an output signal from a driver IC for driving a liquid crystal display module to the liquid crystal display module and each sample and hold capacitor provided in the driver IC overlaps. However, since they are arranged so as to be uniform in each sample and hold capacitor, the voltage level of the supplied signal can be made uniform, thereby producing a linear luminance due to the non-uniformity of the supplied signal voltage. The occurrence of unevenness can be prevented.

[Brief description of the drawings]

FIG. 1 is a plan view showing a wiring structure of a liquid crystal display module of the present invention.

FIG. 2 is an enlarged plan view showing a wiring structure of the liquid crystal display module of the present invention.

FIG. 3 is a cross-sectional view showing a wiring structure around a driver IC according to the present invention.

FIG. 4 is a cross-sectional view showing a wiring structure around a driver IC according to the present invention.

FIG. 5 is a characteristic diagram showing characteristics according to a wiring structure of the liquid crystal display module of the present invention.

FIG. 6 is a plan view showing a wiring structure of a conventional liquid crystal display module.

FIG. 7 is an enlarged plan view showing a wiring structure of a conventional liquid crystal display module.

FIG. 8 is a cross-sectional view showing a wiring structure around a conventional driver IC.

FIG. 9 is a cross-sectional view showing a wiring structure around a conventional driver IC.

FIG. 10 is a characteristic diagram showing characteristics of a wiring structure of a conventional liquid crystal display module.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Sample hold capacitor 2 Sample hold capacitor row 3 Driver IC 4 Driver IC signal wiring 5 Driver IC signal input wiring 6 Signal wiring board 7 Driver IC signal output terminal 8 Contact hole 9 First insulating film 10 Second insulation Film 11 conductive particles 12 adhesive

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G02F 1/1345 G02F 1/133 505 G09G 3/36

Claims (1)

(57) [Claims] 1. A plurality of signal wirings for supplying a signal to a liquid crystal display module on a transparent insulating substrate, and a plurality of sample and hold capacitors corresponding to each of the signal wirings are arranged on the signal wirings via a dielectric substance. The signal wiring corresponding to the output terminal of the driver IC, and the signal wiring corresponding to each of the signal wirings, in the signal wiring structure of the liquid crystal display module, wherein the signal wiring and the driver IC are connected to each other. A signal wiring structure of a liquid crystal display module, wherein an area where each sample hold capacitor overlaps is uniform in each sample hold capacitor.