JP3150245B2 - Semiconductor test apparatus and semiconductor test method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor test apparatus and a semiconductor test method for testing electrical characteristics of a semiconductor integrated circuit.
It is about the law .

[0002]

2. Description of the Related Art FIG. 5 is a partial circuit diagram showing an example of a conventional semiconductor test apparatus. In FIG. 5, reference numeral 1 denotes a semiconductor integrated circuit under test (hereinafter referred to as a test IC), and 2a denotes a test IC.
1 is a V _CC power supply pin, 2b is a V _SS ground power supply pin, 3a to 3n are function pins for transmitting input / output waveforms of the test IC 1, 4 is a transfer relay, 4a, 4
b is each terminal of the transfer relay 4, 5a and 5b
Is an operational amplifier, 6a, 6b and 6c, 6d are resistors for determining the voltage amplification factor of the operational amplifiers 5a, 5b, 7a and 7
b is a D / A converter for controlling the output voltages of the operational amplifiers 5a and 5b, 8a and 8b are control lines for controlling the output voltages of the D / A converters 7a and 7b, and 9 is a D / A converter.
This is a data line that determines the output voltage of the A converter.

Next, the operation will be described. In a normal IC test, V _{SS is set} to the ground level and a specified power supply voltage is supplied to V _CC to perform the test. However, depending on the IC, an offset voltage is applied to the V _SS terminal to raise the entire IC with respect to the ground potential. Such tests are required. Here, only the method of generating the offset voltage at the time of the test will be described.

As described above, the V _CC pin 2 of the test IC 1
b is connected to the ground by the transfer relay 4, but in some test items,
The output voltage of the operational amplifier 5b is supplied to the terminal a. However, since the function waveform of the test apparatus has a limited amplitude (−2 to 7 V), the operational amplifier 5 b is set to 0 [V] and the operational amplifier 5 a is set to 5 [ V] or the like. After completing the function input,
Supplying an offset voltage, may be increased potential between pairs ground, but test the IC, there is defined a potential difference between V _CC, not exceed the potential difference. Therefore, it is an instruction from the main controller. Data 9 for D / A converter
And by alternately controlling the control lines 8a and 8b,
The output voltages of the / A converters 7a and 7b are changed in a stepwise manner, thereby changing the V _CC and V _SS voltages.

FIG. 6 shows this voltage change, where 10 is the V _SS voltage and 11 is the V _CC voltage.

[0006]

Since the conventional device is configured as described above, it is necessary to change the voltage stepwise while observing the regulation of the potential difference between V _{CC and} V _SS. Was hanging. In addition, all the processing requires consideration of the test programmer, and the load on the test programmer was large.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has been made in consideration of the above problem.
IC test time and program development time by changing the output voltage of the other voltage generator together with the change of the output voltage of the reference voltage generator based on the voltage generator that supplies the voltage to the _SS pin) The purpose is to shorten the.

[0008]

According to a first aspect of the present invention, there is provided a semiconductor test apparatus comprising: a plurality of voltage generators each capable of supplying an arbitrary voltage to a plurality of power pins of the IC; A reference voltage generator that generates a voltage that becomes the reference voltage of the reference voltage generator, while maintaining the potential difference between the output voltage of the reference voltage generator and the voltages of the plurality of voltage generators, according to the transition of the output voltage of the reference voltage generator. And a voltage shift circuit for shifting output voltages of the plurality of voltage generators.

According to a second aspect of the present invention, there is provided a semiconductor test apparatus, comprising: a driver circuit for applying a waveform having an arbitrary voltage amplitude to an input pin of an IC; and a reference voltage generator for generating a voltage serving as a reference voltage of the IC. And a voltage shift circuit that changes the amplitude voltage output from the driver circuit according to the transition of the output voltage of the reference voltage generator while maintaining the potential difference from the output reference voltage of the reference voltage generator. is there.

Further, according to a third aspect of the present invention, there is provided a semiconductor test apparatus, comprising: a voltage comparator for comparing a voltage of an output pin of the IC with a preset expected voltage;
A reference voltage generator that generates a voltage that is a reference voltage of
A voltage shift circuit for changing an expected voltage of the voltage comparator according to an output voltage transition of the reference voltage generator while maintaining a potential difference from an output reference voltage of the reference voltage generator. Furthermore, claim 4 of the present invention
The semiconductor test method according to
And supply an arbitrary voltage to multiple voltage generators.
In both cases, the reference voltage generator
And the output voltage of the reference voltage generator and the plurality of
While maintaining the potential difference with the voltage of the voltage generator of
According to the transition of the output voltage of the voltage generator,
The output voltage of the generator is shifted by a voltage shift circuit.
It is.

[0011]

The voltage shift circuit according to any one of the first to fourth aspects of the present invention adds the output voltage from the reference voltage output device to the voltage originally output from the voltage generator and outputs the sum. As a result, the output voltage of the voltage generator that supplies the voltage to the reference voltage pin of the IC can be used as the reference voltage of another voltage generator, and the voltage shift can be performed at high speed while maintaining the potential difference between the outputs of the respective voltage generators. can do.

[0012]

【Example】

Embodiment 1 FIG. An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing an embodiment according to claim 1, and the same reference numerals in FIG. 1 as those in FIG. 5 indicate the same components.
5c is an operational amplifier for inverting the output voltage of the operational amplifier 5b, and 5d is an operational amplifier for inverting the output voltage of the operational amplifier 5a.
The operational amplifiers for differential amplification of the output voltage d and the resistors 6e to 6j determine the amplification factors of the operational amplifiers 5c and 5d, respectively.

Next, the operation will be described. Operational amplifier 5
The output voltage of b is supplied to the V _SS pin of the test IC 1 and the (−) of the operational amplifier 5c as a reference voltage generator.
Input to the input pin. Now, when the amplification resistors 6e and 6f of the operational amplifier 5c have the same resistance value, the operational amplifier 5c
Is an inverted voltage of the output voltage of the operational amplifier 5b. This output voltage is the inverted reference voltage (AOFFSET)
Is sent to a voltage shift circuit (not shown) attached to another plurality of voltage generators.

In FIG. 1, one of the voltage shift circuits is constituted by an operational amplifier 5d and its peripheral circuits. AOFF
SET is input to the (-) input pin of the operational amplifier 5d,
The output voltage of the operational amplifier 5a is input to a (+) input pin. If the amplification resistors 6g to 6j of the operational amplifier 5d have the same resistance value, the output voltage of the operational amplifier 5d is a voltage obtained by adding the inverted voltage of the (-) input pin voltage to the (+) input pin voltage. That is, the input voltage of the V _CC pin of the test IC is a value obtained by adding the reference voltage ( _VSS pin input voltage) to the output voltage of the operational amplifier 5a as the voltage generator.

As described in the prior art, since the amplitude of the input waveform to the function pin is defined by the test equipment, the voltage of the V _SS pin O [V], the V _CC pin 5 [V], etc. is normally set. Has been entered. When the _VSS pin, that is, the output voltage of the operational amplifier 5b is O [V], the output voltage of the operational amplifier 5c is also O [V]. Therefore, as the output voltage of the operational amplifier 5d, that is, the voltage of the V _CC pin, the output voltage of the operational amplifier 5a is input as it is.

Next, from this state, although not shown in FIG.
By manipulating input data and the like of the A / A converter 7b (similar to the prior art example), the output voltage of the operational amplifier 5b, that is, V
_{Assuming that} the input voltage of the _SS pin is 10 [V], the inverted voltage -10 [V] is output from the operational amplifier 5c, and +20 [V] is output from the operational amplifier 5d. That is, the input voltage of the V _CC pin can be changed almost simultaneously only by changing the input voltage of the V _SS pin.

FIG. 2 shows changes in the input voltage of the V _SS pin and the input voltage of the V _CC pin according to the present embodiment. 12 is V
Shows the change of the input voltage of the _CC pin, 13 denotes a change in the input voltage V _SS pin.

If the D / A converters 7a and 7b have inverted outputs, the usage of the operational amplifiers 5a to 5d is also changed. Also, the voltage shift circuit can take other circuit configurations.

Embodiment 2 FIG. Next, a second embodiment of the present invention will be described with reference to the drawings. FIG. 3 is a partial view showing an embodiment of the invention described in claim 2, and the same parts as those in FIG. 1 and FIG. In the figure, 3m is one input pin among the function pins 3a to 3n, 14
Is a driver circuit for inputting an input waveform to the function input pin 3m at a prescribed level, 5e and 5f are operational amplifiers as voltage shift circuits for applying a prescribed level voltage to the driver circuit 14, and 6k to 6r are amplification factors of the operational amplifiers 5e and 5f. , 7c and 7d indicate D / A converters for applying set voltages to the operational amplifiers 5e and 5f, respectively, and 15 indicates information indicating whether the driver circuit 14 outputs a high level or a low level.

Next, the operation will be described. In the case of the prior art, the operational amplifiers 5e and 5f have the same circuit as the operational amplifiers 5a and 5b in FIG.
The differential amplifier circuit is the same as the operational amplifier 5d, and the (-) input pin is AOFFSET like the operational amplifier 5d.
Is entered. That is, when AOFFSET is 0 [V],
The operational amplifier 5e outputs a voltage set by the D / A converter 7c, and the operational amplifier 5f outputs a voltage set by the D / A converter 7d. If AOFFSET becomes, for example, 10 [V], the operational amplifiers 5e and 5f The AOFFSET voltage is added to the voltages set by the D / A converters 7c and 7d, respectively, and input to the driver circuit 14.

The driver circuit 14 outputs the HI / LO information 1
In accordance with the instruction of 5, the output voltages of the operational amplifiers 5e and 5f are output.

Embodiment 3 FIG. Next, a third embodiment of the present invention will be described with reference to the drawings. FIG. 4 is a partial view showing an embodiment of the invention described in claim 3, and the same parts as those in FIG. 1, FIG. 3 and FIG. In the figure, 3
p is one output pin among the function pins 3a to 3n, 16a and 16b are high converters and low converters as voltage comparators for comparing whether the output waveform from the test IC is a prescribed high level or a low level, respectively. The converters 5g and 5h are operational amplifiers for providing predetermined high and low levels to the high converter 16a and the low converter 16b, 6s to 6q are resistors for determining the amplification factors of the operational amplifiers 5g and 5h, and 7e and 7f are the operational amplifiers 5g and 5h, respectively. Is a determination circuit for determining whether or not the voltage comparison results of the high converter 16a and the low converter 16b are correct.

Next, the operation will be described. As in the second embodiment, the operational amplifiers 5g and 5h are the same circuits as the operational amplifiers 5a and 5b in FIG. 5 in the case of the prior art. Further, similarly to the operational amplifier 5d, AOFFSET is input to its (-) input pin. That is, when AOFFSET is 0 [V], the operational amplifier 5g is connected to the D / A converter 7e.
The set voltage is output, and the operational amplifier 5h outputs the voltage set by the D / A converter 7f.
If the voltage is other than [V], the operational amplifiers 5g and 5h apply AOFFSE to the voltages set by the D / A converters 7e and 7f, respectively.
The T voltage is added and input to the converters 16a and 16b as a specified voltage. As a result, the standard for determining the level of the output waveform from the test IC 1 changes.

The high converter 16a determines the result if the output voltage of the function output pin 31 is higher than the given specified voltage, and the low converter 16b determines the result if the output voltage is lower than the given specified voltage.
And the determination circuit 17 determines whether the results from both comparators are correct.

[0025]

According to a first aspect of the present invention, there is provided a semiconductor test apparatus comprising: a plurality of voltage generators capable of supplying an arbitrary voltage to a plurality of power supply pins of an IC;
A reference voltage generator for generating a voltage serving as a reference voltage of C; and a transition of the output voltage of the reference voltage generator while maintaining a potential difference between the output voltage of the reference voltage generator and the voltages of the plurality of voltage generators. A voltage shift circuit that shifts the output voltages of the plurality of voltage generators according to the following. The voltage generator that supplies the voltage to the reference power supply pin of the test IC is used as a reference of the voltage generator in the test apparatus. By changing the reference voltage, the voltage of the output of the other voltage generator can be similarly shifted, so that the device can be inexpensive and the IC test time and program development time can be shortened.

According to a second aspect of the present invention, there is provided a semiconductor test apparatus, comprising: a driver circuit for applying a waveform having an arbitrary voltage amplitude to an input pin of an IC; and a reference voltage generator for generating a voltage serving as a reference voltage of the IC. And a voltage shift circuit for changing an amplitude voltage output from the driver circuit according to a transition of an output voltage of the reference voltage generator while maintaining a potential difference from an output reference voltage of the reference voltage generator. By using the voltage generator that supplies the voltage to the reference power supply pin as the reference of the voltage generator in the test equipment and changing the reference voltage, the voltage of the output of the other voltage generators can be shifted in the same way. This makes it possible to reduce the cost of the device and shorten the time required for testing the IC and the time required for developing the program.

Further, according to a third aspect of the present invention, there is provided a semiconductor test apparatus, comprising: a voltage comparator for comparing a voltage of an output pin of an IC with a preset expected voltage;
A reference voltage generator that generates a voltage that is a reference voltage of
A voltage shift circuit for changing an expected voltage of the voltage comparator according to an output voltage transition of the reference voltage generator while maintaining a potential difference from an output reference voltage of the reference voltage generator; By using the voltage generator that supplies the voltage as a reference of the voltage generator in the test apparatus and changing the reference voltage, the voltage of the output of the other voltage generator can be shifted similarly. Can be made inexpensive, and the IC test time and the program development time can be shortened. In addition, this
The semiconductor test method according to claim 3 of the present invention is a method for testing a plurality of ICs.
Generating multiple voltages for each power pin
And supply a reference voltage to the IC.
Generated by the reference voltage generator, the output voltage of the reference voltage generator
While maintaining the potential difference between the voltage and the voltages of the above-mentioned voltage generators.
According to the transition of the output voltage of the reference voltage generator,
The output voltages of multiple voltage generators are
By shifting, IC test time and program opening
The starting time can be shortened.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a diagram illustrating a voltage shift graph according to the first embodiment.

FIG. 3 is a block diagram showing a second embodiment of the present invention.

FIG. 4 is a block diagram showing a third embodiment of the present invention.

FIG. 5 is a block diagram showing a conventional semiconductor test apparatus.

FIG. 6 is an operation explanatory diagram of a conventional semiconductor test apparatus.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 IC under test 2 Power supply pin of IC under test 5 Operational amplifier 6 Resistor 7 D / A converter 14 Driver circuit 16 Comparator circuit 17 Judgment circuit

Claims (4)

(57) [Claims] 1. A semiconductor test apparatus for testing electrical characteristics of an IC having two or more power supply pins, wherein a plurality of voltage generators capable of supplying an arbitrary voltage to the plurality of power supply pins of the IC are provided. A reference voltage generator for generating a voltage to be a reference voltage of the IC; and a reference voltage generator for the reference voltage generator while maintaining a potential difference between an output voltage of the reference voltage generator and voltages of the plurality of voltage generators. And a voltage shift circuit for shifting output voltages of the plurality of voltage generators according to a transition of the output voltage. 2. A semiconductor test apparatus for testing electrical characteristics of an IC, comprising: a driver circuit for applying a waveform having an arbitrary voltage amplitude to an input pin of the IC; and a reference voltage generator for generating a voltage serving as a reference voltage of the IC. And the amplitude voltage output from the driver circuit, while maintaining the potential difference between the output reference voltage of the reference voltage generator,
A voltage shift circuit for changing the output voltage of the reference voltage generator in accordance with a change in output voltage of the reference voltage generator. 3. A semiconductor test apparatus for testing an electrical characteristic of an IC, comprising: a voltage comparator for comparing a level of a voltage of an output pin of the IC with an expected voltage set in advance; A reference voltage generator for generating the following voltage: a voltage shift for changing an expected voltage of the voltage comparator according to an output voltage transition of the reference voltage generator while maintaining a potential difference from an output reference voltage of the reference voltage generator. A semiconductor test apparatus, comprising: a circuit; 4. The electric power of an IC having two or more power supply pins.
In a semiconductor test method for testing dynamic characteristics, an arbitrary voltage is applied to each of a plurality of power pins of the IC.
Are supplied to a plurality of voltage generators, and the reference voltage of the IC is supplied.
The reference voltage generator generates a voltage that becomes a voltage, and outputs the reference voltage generator and the plurality of voltage generators.
While maintaining the potential difference with the voltage of the reference voltage generator,
According to the transition of the output voltage, the output of the multiple voltage generators
The voltage is shifted by a voltage shift circuit.
Semiconductor testing method.