JP3158078B2 - Filter circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a filter circuit. In particular, the present invention relates to a filter circuit provided with an adjustment circuit so that the center frequency of a bandpass filter can be adjusted.

[0002]

2. Description of the Related Art A band pass filter such as an infrared remote control receiver needs to be adjusted to a specific center frequency.
However, the correction to the target value due to the variation in the manufacturing process and the 30k
It is necessary to cope with various center frequencies in the range of Hz to 60 kHz, and it is necessary to adjust the filter circuit.

Conventionally, as a method of realizing the above adjustment, I
As a filter circuit provided with an adjustment circuit inside C, FIG.
As shown in (1), a filter circuit has been proposed in which adjustment is performed by wire bonding connection in an assembly and mounting process using a normal process having no special process for the purpose of adjustment at the IC manufacturing stage (Japanese Patent Laid-Open No. Hei 6-1994). 216702). Hereinafter, this conventional filter circuit for performing adjustment by wire bonding connection will be described with reference to FIGS. 4 and 5. FIG. This filter circuit is composed of a main circuit 41 and a center frequency adjusting current source circuit 43 for supplying an output current to the main circuit 41. The center frequency adjusting current source circuit 43 has a common resistor R0. And a resistor circuit 45 having one ends of the plurality of resistors Ra to Rl commonly connected to each other and bonding pads A to L provided at the other end. The center frequency can be adjusted by selecting one or several resistors to the leads selected from the bonding pads A to L, performing wire bond connection, and adjusting the resistance value of the center frequency adjusting current source circuit 3. Is configured.

The principle of adjusting the center frequency of the filter circuit by adjusting the resistance will be described. Body circuit 41
Is composed of two capacitors C1 and C2, two transconductance amplifiers 51 and 52, a buffer amplifier 53 and the like as shown in FIG. 5, and the center frequency f0 is determined by setting the capacitance values of the two capacitors to C1, C2, Assuming that the mutual conductance of the mutual conductance amplifier is gm, there is a relationship shown in the following (Equation 1).

[0005]

(Equation 1)

The output current I of the center frequency adjusting current source circuit 43 supplied to the main circuit 41 has the relationship shown in (Equation 2) using gm and the proportionality constant c.

[0007]

Gm = c · I This output current I is determined by a combination resistor R obtained by selecting a resistor circuit 45 in the center frequency adjusting current source circuit 43, and uses a proportional constant k. (Expression 3).

[0008]

I = k · 1 / R The combination resistance R is a common resistance Ro of the resistance circuit 43.
And the selection resistance, and when the selection resistance is Rs, the combination resistance R has the relationship of (Equation 4).

[0009]

R = Ro + Rs The center frequency can be adjusted by adjusting the value of the combination resistor R based on the above (Equation 1), (Equation 2), (Equation 3), and (Equation 4).

Hereinafter, a case will be described in which the center frequency f0 at the time of R = 10k in the filter circuit configured as described above is adjusted at substantially equal intervals of 15 steps with an adjustment range of f0 ± 7%. Assuming that the adjustment number corresponding to the 15 stages of the combination resistance R is n (n = 1 to 15) and R corresponding to each n is R (n), each combined resistance value R (n) is represented by the following (Equation 5). ).

[0011]

(Equation 5)

When the common common resistor Ro is set to (Equation 6) in consideration of the adjustment range of ± 7%, the selection resistor Rs (n) corresponding to the adjustment number n is (Equation 7).

[0013]

## EQU6 ## Ro = 10k / 1.07 = 9.35k

[0014]

Rs (n) = R (n) -9.35k The following Table 1 shows combinations of the combined resistance value R (n), the value of the selection resistor, and the pad number of the resistor to be selected in each of 15 stages. Show the list.

[0015]

[Table 1]

Here, basically, in order to realize approximately equal adjustment intervals of 15 steps, 15 combination resistors R
(n), that is, here, 15 selection resistors Rs are required. In the case of devising a combination of two or more selection resistors, as shown in (Table 1), adjustment numbers 9 to 11 can be realized by a combination of two selection resistors, but 1 to 8 and 12 to 15 correspond to the corresponding resistors. A selection resistor with a value is required. In other words, a resistance circuit is provided in which twelve selection resistors are provided with bonding pads.

[0017]

In the conventional method of adjusting the diffusion resistance by wire bonding, as described above, a case where the adjustment range f0 ± 7% of the center frequency is performed in 15 steps with the maximum number of selected pads being 2 pads. Required 12 pads. Therefore, on account of assembling the pad, IC
Due to the arrangement in one line along the bottom of the chip, there is a problem that the free area of the other circuit section increases, the chip size increases, and the cost increases.

The present invention solves the above problems,
An object of the present invention is to provide a filter circuit capable of adjusting the center frequency with a smaller number of bonding pads than a conventional filter circuit, and to reduce the chip size and cost of a semiconductor device.

[0019]

In order to achieve the above object, a filter circuit according to the present invention comprises a main circuit and a resistor circuit having one end of a plurality of resistors connected to one another and a bonding pad provided at the other end. And two or more center frequency adjusting current source circuits, and a current calculating circuit that calculates an output current of the center frequency adjusting current source circuit as an input and supplies a calculation result to a main body circuit.

With this configuration, a current is output from the center frequency adjusting current source circuit, and the output current value of one center frequency adjusting current source circuit is calculated with the output current value of the other center frequency adjusting current source circuit. Thus, the current value can be changed to a plurality of current values for adjustment, and the number of necessary resistors can be reduced.

Next, the current operation circuit is preferably a current multiplication / division circuit.

Further, the main body circuit includes a transconductance amplifier and a buffer amplifier, and the two or more center frequency adjusting current source circuits include a first center frequency adjusting current source circuit and a second center frequency adjusting current source circuit. When the outputs of the first and second center frequency adjusting current source circuits are I1 and I2, respectively, the output I3 of the current arithmetic circuit is preferably I3 = (I1) ² / I2.

With this configuration, one output from the first center frequency adjusting current source circuit is divided into a plurality of adjusting current values by a division operation using the output of the second center frequency adjusting current source circuit. It can be changed, and the required number of resistors can be reduced.

Next, it is preferable that at least one of the bonding pads is wire-bonded.

Further, it is preferable that the resistors are arranged in parallel with diffusion resistors having different resistance values.

It is preferable that the resistor is provided between the bonding pads.

Preferably, the plurality of bonding pads are provided side by side so as to reach the vicinity of both ends on one side of the semiconductor substrate.

Further, it is preferable that a resistor having a larger resistance value than each of the plurality of resistors is connected as a common resistor to a portion where the plurality of resistors are commonly connected.

With this configuration, the chip size can be reduced by arranging the necessary minimum number of bonding pads, and various combined resistance values can be realized by connecting the bonding pads of the selected resistance to provide the necessary current source for adjusting the center frequency. The circuit output can be obtained.

[0030]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. For comparison with the prior art, a case where the center frequency f0 is similarly adjusted in 15 steps of f0 ± 7% will be described. FIG. 1 is a configuration diagram of a filter circuit according to the present invention. First and second center frequency adjusting current source circuits 3 and 4 are connected to a current multiplying / dividing circuit 2 for supplying an output current I3 to the main body circuit 1. The resistor circuit 5 is composed of a common resistor R1o and five selection resistors R1s having different resistance values. The resistor circuit 6 of the second center frequency adjusting current source circuit 4 has a common resistor R1.
2o and three selection resistors R2s having different resistance values. One end of each selection resistor is connected to the common resistor, and the other end is connected to each of the bonding pads A to H. Each of the bonding pads A to H is connected to a bonding wire 8 as shown in FIG.
Is selectively connected to the GND lead 7. That is, the current operation circuit of this embodiment has a configuration using a multiplication / division circuit, and the number of resistors of the resistance circuit (the number of bonding pads)
Are eight in total including the resistance circuits 5 and 6, and the adjustment of the resistance value is performed in accordance with the combination of the resistors to be selected.
This is performed by connecting the D lead 7 with a wire 8.

FIG. 2 shows a configuration example of the current multiplication / division circuit.
In the loop of the transistors Q1, Q2, Q3, and Q5, with each base-emitter voltage VBE

[0032]

VBE (Q1) + VBE (Q2) = VBE (Q3) +
There is a relationship of VBE (Q5). Transistor collector current IC and VB
If the saturation current is IS and the thermal voltage is VT between E and
IC = IS * EXP (VBE / VT) That is, VBE =
Since there is a relationship of VT * ln (IC / IS), the collector current of the transistor is set to IC (Q1), IC (Q2), IC (Q
3) Substituting into (Equation 8) as IC (Q5) and rearranging,

[0033]

Ln (IC (Q1) · IC (Q2)) = ln (IC
(Q3) · IC (Q5)). The collector currents of Q1 and Q2 are I1,
Since the collector current of Q5 is I2, the collector current I3 of Q3 supplied to the main circuit 1 is

[0034]

[Mathematical formula-see original document] I3 = (I1) ² / I2, and I3 is a current obtained by multiplying and dividing I1 and I2.

Here, I1 and I2 are the first and second, respectively.
It is the output current of the current source circuit for adjusting the center frequency, and the combination resistance obtained by selecting from the resistance circuits 5 and 6 is R1,
Assuming that R2, using a proportionality constant m,

[0036]

## EQU11 ## I1 = m / R1

[0037]

## EQU12 ## I2 = m / R2. Here, the combination resistances R1 and R2 are the sums of the respective common resistances R1o and R2o of the resistance circuits 5 and 6 and the respective selection resistances, and the selection resistances are R1s and R2s.
Then

[0038]

## EQU13 ## R1 = R1o + R1s

[0039]

R2 = R2o + R2s Therefore, I3 is given by (Equation 10) and (Equation 12)

[0040]

## EQU15 ## I3 = mR2 / (R1) ² . Since this I3 has the same relationship as (Equation 1) and (Equation 2) described in the prior art, the center frequency f0 is calculated using the proportionality constant c '.

[0041]

## EQU16 ## The relationship f0 = c '* I3 is established, and the center frequency can be adjusted by R1 and R2.

In the following, R1 = 10k and R2 = 10
k, that is, the apparent resistance of I3 (R1) ² / R2
The case where the center frequency f0 when = 10k is adjusted at approximately equal 15-step adjustment intervals of f0 ± 7% will be described.

Apparent resistance value of I3 (R1) ² / R2 = 10k
The adjustment number is set to n (n = 1 to 1) so as to correspond to the 15 steps
5) As (R1) ² / R2 corresponding to each n, (R1) ² / R2
Assuming (n), there is the relationship of (Equation 17).

[0044]

[Equation 17]

It is necessary to set the combination resistors R1 (n) and R2 (n) from n = 1 to 15 corresponding to the 15 steps so as to satisfy (R1) ² / R2 (n) calculated thereby. .

Table 2 shows combinations of R1 and R2 when the resistance R2 is fixed and when R2 is variable.

[0047]

[Table 2]

First, the case where the resistance R2 is fixed at 10 kΩ will be described. In this case, it is necessary to adjust the combination resistor R1 in 15 steps as shown in (Equation 18) in order to cope with the adjustment in 15 steps.

[0049]

(Equation 18)

Next, the case where R2 is variable will be described. R1
It can be seen that by combining R2 with R2, 15 combinations of five R1 resistors and three R2 resistors are possible. That is, R1 (n) is (Equation 19)
Some have the same resistance value as shown in (Equation 23).
Eventually, it can be composed of five types of resistors.

[0051]

R1 (1) = R1 (6) = R1 (11)

[0052]

R1 (2) = R1 (7) = R1 (12)

[0053]

R1 (3) = R1 (8) = R1 (13)

[0054]

R1 (4) = R1 (9) = R1 (14)

[0055]

R1 (5) = R1 (10) = R1 (15) That is, R2 is changed in three regions of n = 1 to 5, 6 to 10, and 11 to 15. Ie

[0056]

## EQU24 ## R2 (1-5) = 10 kΩ

[0057]

R 2 (6 to 10) = 10 kΩ · R 1 (6) ² / R 1 (1) ²

[0058]

R2 (11-15) = 10 kΩ · R1 (11) ² / R1 (1) ²

By making R2 variable, n
= (R1) ² / R2 (n) values from 1 to 15 can be realized by eight resistors in total of R1 and R2.

Table 3 summarizes the setting of each resistor including the common resistor. Each common resistance is R1o = 10
Assuming that k and R2o = 10k, combinations of the values of the selection resistors R1s (n) and R2s (n) and the selection pads corresponding to the adjustment number n stages are shown.

[0061]

[Table 3]

As described above, the adjustment range, the adjustment interval, and the maximum number of selected pads are the same as those of the above-described conventional case, but are less than the conventional minimum required number of bonding pads.
It is possible to make approximately equal adjustments in 15 steps with the number of bonding pads.

In order to reduce the chip area of the filter, it is preferable to reduce the total value of the common resistance and the selection resistance provided between the pads. For example, in the combination resistance R2 of Table 2, the step size (0.54 kΩ) is smaller than the base value (10 kΩ), and all the base value 10 kΩ is taken by the common resistor R2o, and each of the selection resistors R2s is only the step size. , The total value becomes minimum (11.62 kΩ).

In the above configuration, the number of bonding pads can be further reduced by connecting the GND wiring to the bonding pads in advance.
In the resistance circuit of the first center frequency adjusting current source circuit,
The pad A side of the selection resistor connected to the pad A is connected in advance to the GND wiring on the chip. If the selection resistance of the pads B to E is set to the initial value in parallel connection with the selection resistance of the pad A, the pad A can be deleted, and the number of bonding pads becomes seven.
At this time, in the combination using pad A in Table 3, the number of wires is only one on the second center frequency adjusting current source circuit side. Similarly, on the second center frequency adjusting current source circuit side, if one circuit is similarly connected in advance to the GND wiring, a pad reduction effect can be obtained. That is, if both the first and second center frequency adjusting current source circuits have the above circuit configuration, the number of bonding pads is six. For example, if the pad A of the first center frequency adjusting power supply circuit and the pad F of the second center frequency adjusting power supply circuit are connected to the GND wiring in advance, the pads A, F
Can be deleted. In this case, pads A and F are selected in a state where wire bonding is not performed.

[0065]

According to the filter circuit of the present invention, the center frequency can be adjusted with a smaller number of bonding pads than the conventionally required minimum number of bonding pads under the conditions of the target adjustment range, adjustment interval, and maximum number of selected pads. Since a filter circuit that can be used can be used, a semiconductor chip size can be reduced, and an inexpensive semiconductor device can be realized.

When the same number of pads as in the prior art can be selected, more adjustment steps are possible than in the prior art, so that a filter circuit with high adjustment accuracy can be realized.

Further, since the number of wires can be reduced as compared with the conventional method, the material cost and the number of assembly steps can be reduced, and an inexpensive filter circuit can be realized.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of a bandpass filter of the present invention.

FIG. 2 is an explanatory diagram of a method of adjusting the bandpass filter circuit of FIG. 1;

FIG. 3 is a circuit diagram of the current multiplication / division circuit of FIG. 1;

FIG. 4 is a circuit diagram showing a configuration of a conventional bandpass filter.

FIG. 5 is a circuit diagram showing a configuration of a main circuit of the bandpass filter of FIG. 4;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Body circuit 2 Current multiplication / division circuit 3 1st center frequency adjustment current source circuit 4 2nd center frequency adjustment current source circuit 5, 6 Resistor circuit 7 GND lead 8 Wire A to L Bonding pad

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H03H 11/04 H03H 11/12

Claims (8)

(57) [Claims] 1. A center frequency adjusting current source circuit comprising: a main body circuit; a resistor circuit having one end of a plurality of resistors commonly connected to each other and a bonding pad provided at the other end; And a current calculation circuit for calculating the output current of the source circuit as an input and supplying the calculation result to the main circuit. 2. The filter circuit according to claim 1, wherein said current operation circuit is a current multiplication / division circuit. 3. The main body circuit includes a transconductance amplifier and a buffer amplifier, and the two or more center frequency adjusting current source circuits include a first center frequency adjusting current source circuit and a second center frequency adjusting current source. 2. An output I3 of the current operation circuit is I3 = (I1) 2 / I2, where the outputs of the first and second center frequency adjusting current source circuits are I1 and I2, respectively. Filter circuit. 4. The filter circuit according to claim 1, wherein at least one of the bonding pads is wire-bonded. 5. The filter circuit according to claim 1, wherein the resistors are arranged in parallel with diffused resistors having different resistance values. 6. The filter circuit according to claim 1, wherein a resistor is provided between the bonding pads. 7. The filter circuit according to claim 1, wherein the plurality of bonding pads are arranged so as to reach near both ends on one side of the semiconductor substrate. 8. A portion where the plurality of resistors are connected in common,
2. The filter circuit according to claim 1, wherein a resistor having a resistance value larger than each of the plurality of resistors is connected as a common resistor.