JP3158689B2 - Frequency modulation current generation circuit and frequency modulation method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency modulation current generating circuit and a frequency modulation method used for a recording system such as a video tape recorder.

[0002]

2. Description of the Related Art Conventionally, a video tape recorder separates a video signal into a luminance signal Y and a color difference signal C at the time of recording, and improves the S / N in a high frequency band for the luminance signal Y of both signals. For this purpose, frequency modulation (hereinafter referred to as FM (Freguency Modulation)) is performed with emphasis, and the luminance signal Y after FM modulation is recorded on a magnetic tape. FIG. 6 shows an example of a signal recording pattern in the SP mode of the 8 mm video tape recorder. As shown in FIG. 6, the luminance signal Y is recorded on a predetermined track TR of the magnetic tape TP.

The luminance signal Y recorded on the magnetic tape TP is reproduced by the reproducing head. At this time, as shown in FIG. 7, the luminance signal Y is adjacent to the track on which the luminance signal Y is to be reproduced. There is a high possibility that the crosstalk components CT from the tracks overlap and suffer so-called beat disturbance. For this reason, in a conventional video tape recorder, F
An FM modulation current generation circuit including an M modulation circuit is provided, and FIG.
(a), the spectrally the luminance signal Y during recording, as so-called interleaving, relative to (15.734 kHz in the NTSC system) the horizontal synchronizing frequency f _H (1/2) f _H (Half H) (hereinafter, referred to as a half H shift), and a crosstalk component is removed by using a comb filter FLT arranged in the reproduction system at the time of reproduction as shown in FIG. c)
As shown in FIG. 7, a luminance signal Y free from beat interference is obtained.

FIG. 9 is a block diagram showing a configuration example of a conventional FM modulation current generating circuit in a recording system of a video tape recorder. In FIG. 9, 1 is a reference current generating circuit,
2 is a carrier frequency setting current generating circuit, 3 is a half H shift current generating circuit, 4 is a luminance signal voltage / current converting circuit, 5
Denotes an adder, and 6 denotes an FM modulation circuit.

In such a configuration, a reference current I _{REF having} no temperature dependency generated by a reference current generating circuit 1 which is a current source whose current value can be selected by an external external resistor.
Is the carrier frequency setting current generating circuit 2 and the half H
It is supplied to the shift current generating circuit 3. The carrier frequency setting current generating circuit 2 receives the reference current I _REF , generates a carrier frequency setting current I _CAR whose frequency is adjusted so as to absorb the element variation of the FM modulation circuit 6, and outputs it to the adder 5. . The half H shift current generating circuit 3 receives the reference current I _REF and receives the half H shift current I _REF at a timing corresponding to the switching pulse SW of a predetermined cycle.
_HHS is generated and output to the adder 5. Further, the luminance signal voltage / current conversion circuit 4 adjusts a predetermined frequency shift amount with respect to the luminance signal Y of the video signal separated by the Y / C separation circuit (not shown), and The frequency deviation amount setting current I _DEV is generated and output to the adder 5.

In the adder 5, the input carrier frequency setting current I _CAR , the half H shift current I _HHS and the frequency deviation setting current I _DEV are merged and output to the FM modulation circuit 6. In the FM modulation circuit 6, the input combined current I
A predetermined FM modulation is performed based on (I _CAR + I _HHS + I _DEV ), and a luminance signal Y FM-modulated and offset by 1 / 2f _H is recorded on a magnetic tape by a recording head (not shown).

[0007]

In the above-mentioned conventional circuit, the half H shift current I _HHS generated by the half H shift current generation circuit 3 depends on the temperature dependence generated by the reference current generation circuit 1 as an external current source. Reference current I
_Since it is generated based on _REF , there is no temperature dependency. However, the reference current I _REF is equal to the VC of the FM modulation circuit 6.
Since the adjustment is not made so as to absorb the device variation of O (Voltage Control Oscillator), the half H shift current I _HHS is affected by the sensitivity variation due to the device variation of the VCO as shown in FIG. as a result,
The absolute value of 1 / 2f _H is likely to deviate, and if the absolute value of the current causing the 1 / 2f _H offset is deviated in this way, a crosstalk component from an adjacent track generated during reproduction is arranged in the reproduction system. Comb filter FL
As a result, the image cannot be removed due to T, and a high-precision image free of beat disturbance or the like cannot be obtained.

The present invention has been made in view of the above circumstances, and an object of the present invention is to suppress the influence of sensitivity variations due to VCO element variations and to generate a frequency modulation current generation circuit capable of generating a highly accurate offset current and a frequency modulation current generation circuit therefor. An object of the present invention is to provide a frequency modulation method using current.

[0009]

[0010]

Means for Solving the Problems To achieve the above object,
Therefore, in the frequency modulation current generation circuit according to the present invention, a carrier current generation circuit that generates a carrier current having no temperature dependency, and a carrier current from the carrier current generation circuit are reduced by a predetermined reduction amount so that the video signal component A shift current generating circuit for generating a half H shift current for adding an offset of の of the horizontal synchronization frequency, a carrier current from the carrier current generating circuit, a half H shift current from the shift current generating circuit, and a video signal And a frequency modulation circuit that performs frequency modulation based on the component.

In the frequency modulation method of the present invention, the temperature dependency
Generates a carrier current without
In the horizontal synchronization frequency of the video signal component.
Half H shift voltage for adding 1/2 offset
Current, and the carrier current and shift current
Based on these half H shift currents and video signal components
Performs frequency modulation.

[0012]

[0013]

According to the frequency modulation current generation circuit of the present invention, a carrier current having no temperature dependency is generated by the carrier current generation circuit, and this carrier current is output to the half H shift current generation circuit and the frequency modulation circuit. Half H
The shift current generating circuit generates a half H shift current for adding an offset of １ ／ of the horizontal synchronization frequency to the video signal component obtained by reducing the input carrier current by a predetermined reduction amount. Is output to the frequency modulation circuit. A frequency modulation circuit, the inputted carrier current, based on the half-H shift current and a video signal component, the frequency modulation is performed with respect to 1 / 2f _H shifted video signal.

According to the frequency modulation method of the present invention, temperature-dependent
A non-existent carrier current is generated.
Is reduced by a predetermined amount, and the horizontal synchronization
Half H-sequence for adding an offset of half the wave number
Shift current is generated, carrier current and shift current
Based on the half-H shift current from the
The frequency modulation is performed on the video signal shifted by a predetermined amount.

[0015]

FIG. 1 is a block diagram showing an embodiment of a frequency modulation current generating circuit according to the present invention.
The same components are denoted by the same reference numerals. That is, 1
Denotes a reference current generation circuit, 2 denotes a carrier frequency setting current generation circuit, 3a denotes a half H shift current generation circuit, 4 denotes a luminance signal voltage / current conversion circuit, 5 denotes an adder, and 6 denotes an FM modulation circuit.

The reference current generating circuit 1 is a current source whose current value can be selected by an external external resistor, generates a reference current I _REF having no temperature dependency, and outputs the generated reference current I _REF to a carrier frequency setting current generating circuit 2 .

FIG. 2 is a circuit diagram showing a specific configuration example of the reference current generating circuit 1. This reference current generation circuit 1
Band gap regulator V ₁₀₁ , npn-type transistors Q _{101 to} Q ₁₁₀ , pnp-type transistors P _{101 to} P ₁₀₁
And ₁₀₆ and a resistor R ₁₀₁ to R _114, and a variable resistive element Rx external.

The output of the band gap regulator V ₁₀₁ is supplied to the base of the transistor Q ₁₀₆ by the resistance elements R ₁₀₁ and R ₁₀₂ is divided by the resistance element R ₁₀₃
It is supplied to the base of the collector and the transistor Q ₁₀₃ of the transistor Q ₁₀₁ through.

Transistors _{Q101, Q102, Q104} and Q
The bases of ₁₀₅ are connected in series, and each transistor Q _101,
The emitter of Q _102, Q ₁₀₄ and Q ₁₀₅ are resistance elements R _104,
R _105, R _{106, and} R ₁₀₇ are connected to the respective resistors R _104, R _105, R _{106, and} R ₁₀₇ are connected to the resistors R ₁₀₂ and R ₁₁₄ . The collector of the transistor Q ₁₀₂ is connected to its base is connected to the emitter of the transistor Q _103. The collector of the transistor Q ₁₀₄ is connected to the emitter of the transistor Q _106, the collector of the transistor Q ₁₀₅ is connected to the emitter of the transistor Q _107. These transistors Q _{101,
Q102, Q104, Q105} and resistance elements _{R104, R105, R106,}
The R _107, a so-called constant current circuit is constituted.

[0020] p collector of the transistor Q ₁₀₃ is to form a current mirror circuit through a resistive element R _108, R ₁₀₉
connected to the emitter of the np type transistor P _101, P _102, via a resistor R _110, R ₁₁₁ are also connected to the emitter of the multi-emitter pnp type transistor P _103, P ₁₀₄ constituting a current mirror circuit. Base of the transistor P ₁₀₁ and P ₁₀₂ are connected to each other, base and collector of the transistor P ₁₀₁ is connected.
The connection point between the collector and the base of the transistor P ₁₀₁ is connected to the collector of the transistor Q _106, the collector of the transistor P ₁₀₂ is connected to the base of the collector and the transistor Q ₁₀₈ of the transistor Q _107.

[0021] Similarly, based multi-emitter pnp type transistor P ₁₀₃ and P ₁₀₄ are connected to each other, base and collector of the transistor P ₁₀₄ is connected. The collector of the transistor P ₁₀₃ is connected to the emitter of the multi-emitter pnp type transistor P _105, connection point between the collector and the base of the transistor P ₁₀₄ is connected to the emitter of the multi-emitter pnp type transistor P _106. It is the current mirror circuit by the transistors P ₁₀₅ and P ₁₀₆ is configured, both base connected, base and collector of the transistor P ₁₀₅ is connected.

The emitters of the transistors Q ₁₀₆ and Q ₁₀₇ are connected to each other, and these transistors Q ₁₀₆ and Q ₁₀₇ constitute a differential amplifier. The base of transistor Q ₁₀₇ is connected to the external resistor Rx via the resistance element R _112, R _113. The output of the differential amplifier, i.e. the collector of the transistor Q ₁₀₇ is connected to the base of the transistor Q ₁₀₈ as described above. The emitter of the transistor Q ₁₀₈ is connected to the connection point between the resistor R ₁₁₂ and R _113, the collector is connected to the connection point between the base and the collector of the transistor P _105.

Furthermore, the collector of the multi-emitter pnp type transistor P ₁₀₆ constituting the current mirror circuit is also connected to the collector of the base and multi-emitter npn type transistor Q ₁₀₉ of the npn-type transistors Q ₁₁₀ constituting a current mirror circuit, the emitter of the transistor Q ₁₀₉ is connected to the resistance element R _114, a base connected to the emitter of the transistor Q _110.

In the reference voltage generating circuit 1 having such a configuration, the current I _R adjusted by the external resistor Rx and amplified by the differential amplifier including the transistors Q ₁₀₆ and Q ₁₀₇ is applied to the transistor Q ₁₀₈ . through the collector, it is folded by a current mirror circuit configured by the multi-emitter pnp type transistor appears as a multi-emitter pnp type transistor reference current I _REF independent of temperature to the collector of the P _106. This transistor P
_The reference current I _REF appearing at the collector of ₁₀₆ is output, for example, through the base of a transistor Q ₁₀₉ constituting a current mirror circuit.

The carrier frequency setting current generating circuit 2 receives the reference current I _REF from the reference current generating circuit 1 and generates a carrier frequency setting current I _CAR whose frequency is adjusted so as to absorb the element variation of the FM modulation circuit 6. This carrier frequency setting current I _CAR is output to half H shift current generating circuit 3 a and adder 5.

FIG. 3 is a circuit diagram showing a specific configuration example of the carrier frequency setting current generating circuit 2. As shown in FIG. The carrier frequency setting current generating circuit 2 includes a variable voltage source V ₂₀₁ , constant voltage sources V _{202 and} V ₂₀₃ , npn transistors Q _{201 to} Q _201.
215, multi-emitter pnp type transistor P ₂₀₁ ~P
₂₀₄ and resistance elements R _{201 to} R ₂₁₈ .

The output of the variable voltage source V ₂₀₁ is a transistor Q
Supplied to ₂₀₁ base. Each collector of the collector of the transistor Q ₂₀₁ is the transistor _{Q 202, Q 203, Q 204} , Q 205, to the base of the transistor Q ₂₀₂ through a resistor R _203, a current mirror circuit through a resistive element R ₂₁₀ R ₂₁₁ and They are respectively connected to the emitters of the multi-emitter pnp type transistor P _201, P ₂₀₂ constituting the.

The emitter of the transistor Q ₂₀₁ is connected to the collector of the transistor Q _210, and is connected to the emitter of the transistor Q ₂₀₂ through a resistor R _201, R ₂₀₁ for attenuation. Resistance element R ₂₀₁ and R _{20 2} Connection point between is connected to the base of the transistor Q _205,
Connection point between the emitter and the resistance element R ₂₀₂ of the transistor Q ₂₀₂ is connected to the collector of the transistor Q _211.

The base of the transistor Q ₂₀₂ and the resistance element R
Connection point between ₂₀₃ is connected to the base of the transistor Q ₂₀₃ through a resistor R _204, resistor to a connection point between the base and the resistor R ₂₀₄ of the transistor Q ₂₀₃ is element R ₂₀₅
And R ₂₁₄ are connected in series. Transistor Q
The emitter of ₂₀₃ is connected to a transistor Q ₂₀₄ via resistance elements R _{206 and} R ₂₀₇ for impedance adjustment connected in parallel.
It is connected to the base and connected to the collector of the transistor Q _212.

[0030] is connected the emitter of the transistor Q ₂₀₄ is connected through a resistor R ₂₀₈ to the base of the collector and the transistor Q ₂₀₈ of the transistor Q _206. The base of transistor Q ₂₀₆ is connected to the collector and the emitter is connected to the collectors of the emitter and the transistor Q ₂₁₃ of the transistor Q _207. The emitter of the transistor Q ₂₀₅ is respectively connected is through the resistance element R ₂₀₉ to the base of the collector and the transistor Q ₂₀₉ of the transistor Q _207. The base of transistor Q ₂₀₇ is connected to the collector, also the transistor Q based ₂₁₃ is connected to the positive potential side of the constant voltage source V _202, emitter constant voltage source through a resistor R ₂₁₆ V ₂₀₂
It is connected to the negative potential side of and V _203. The emitters of the transistors Q ₂₀₈ and Q ₂₀₉ are connected to each other, and the connection midpoint is connected to the collector of the transistor Q ₂₁₄ .

Multi-emitter pnp transistor P
The bases of ₂₀₁ and P ₂₀₂ are connected to each other, and the base and collector of transistor P ₂₀₂ are connected. In addition, the collector of the transistor P ₂₀₁ is multi-emitter p
connected to the emitter of the np type transistor P _203, connection point between the collector and the base of the transistor P ₂₀₂ is connected to the emitter of the multi-emitter pnp type transistor P _204. A current mirror circuit is formed by these multi-emitter pnp transistors P ₂₀₃ and P ₂₀₄ , the bases of which are connected, and the transistor P ₂₀₃
Base and collector of ₂₀₃ is connected, the connection point is connected to the collector of the transistor Q _209. Also,
The collector of the transistor P ₂₀₄ is connected to the collector of the transistor Q _215, it serves as the output of the carrier frequency setting current generating circuit, the subsequent half-H
It is connected to the input terminal of the shift current generating circuit 3a.

Each of the transistors Q _210, Q _211, Q _212,
The bases of Q ₂₁₄ and Q ₂₁₅ are connected in series to the positive potential side of constant voltage source V ₂₀₃ , and transistors Q ₂₁₀ and Q ₂₁₅ are connected in series.
The emitters of _211, Q _212, Q ₂₁₄ and Q ₂₁₅ are connected to constant voltage sources V ₂₀₂ and V ₂₀₂ via resistance elements R _{212 to} R ₂₁₈ , respectively.
₂₀₃ is connected to the negative potential side. The transistors Q _{210 to} Q ₂₁₅ and the resistance elements R _{212 to} R ₂₁₈ constitute a so-called constant current circuit, and the reference current I generated by the above-described reference current generating circuit 1 and having no temperature dependency.
_REF is configured to be supplied to the base of the transistor Q _214.

In the carrier frequency setting current generating circuit 2 having such a configuration, the above-described transistors Q _{204 to} Q ₂₀₄
A differential amplifier of the two-stage configuration by _209, a so-called Gilbert amplifier G _m is formed, Gilbert amplifier G _m
The current that has undergone the predetermined amplification at
The output of _m , ie, the collector of the transistor Q ₂₀₉ , is turned back by the current mirror circuit constituted by the multi-emitter pnp transistor, and the element variation of the FM modulation circuit 6 is absorbed by the collector of the multi-emitter pnp transistor P _204. This appears as the carrier frequency setting current I _CAR whose frequency has been adjusted as described above, and is output to the half H shift current generating circuit 3 a and the adder 5. The adjustment for absorbing the variation of the VCO element of the FM modulation circuit 6 is performed by observing the output of the FM modulation circuit 6 with, for example, a frequency synthesizer and adjusting the adjustment terminal CARCON.
Done through T.

The half H shift current generating circuit 3a opens and closes in response to the input of the switching pulse SWP, and controls the output of the input carrier frequency setting current I _CAR , and the carrier input via the switch circuit 31 Divide the frequency setting current I _CAR to 1 / N and divide it by half H
It has a current 1 / N circuit 32 which generates a shift current I _HHS, and outputs a half-H-shift current I _HHS generated in the adder 5.

FIG. 4 shows a half H shift current generating circuit 3a.
FIG. 3 is a circuit diagram showing a specific configuration example of FIG. This half H shift current generating circuit 3a includes an npn transistor Q ₃₀₁
To Q ₃₀₅ , pnp transistors P _{301 to} P ₃₁₀ and resistance elements R _{301 to} R ₃₁₈ .

The carrier frequency setting current I _CAR output from the carrier frequency setting current generating circuit 2 is supplied to the base of the transistor Q ₃₀₁ . The emitter of the transistor Q ₃₀₁ is resistive element R _{30 1} , And the collector is connected to the collector of the transistor _P303 . The base of transistor Q ₃₀₂ is connected to the base of the transistor Q _304, the collector is connected to the collector of the transistor P _304, and the emitter is connected to the ground line GND via the resistance element R _302. Also, the transistor Q
The base and collector of ₃₀₂ are connected.

The supply terminal of the power supply voltage V _CC is connected to the resistance element R
The emitters of the transistors P _{301 and} P ₃₀₂ constituting the current mirror circuit via the resistors _{303 and} R ₃₀₄ , the emitter of the transistor P ₃₀₅ via the resistor R ₃₀₅ and the resistor R
Connected to the emitters of the transistors P _{307 and} P ₃₀₈ constituting the current mirror circuit via the transistors _{307 and} R ₃₀₈ , respectively.
It is connected to the collector of transistor _Q305 .

The bases of the transistors P ₃₀₁ and P ₃₀₂ are connected to each other, and the base and the collector of the transistor P ₃₀₂ are connected. The collector of the transistor P ₃₀₁ is connected to the emitter of the transistor P _303, connection point between the collector and the base of the transistor P ₃₀₂ is connected to the emitter of the transistor P _304. Is the current mirror circuit by the transistors P ₃₀₃ and P ₃₀₄ is configured, both base connected, base and collector of the transistor P ₃₀₃ is connected, the connection point is connected to the collector of the transistor Q ₃₀₁ as described above ing.

The collector of the transistor P ₃₀₅ is connected to the emitter of the transistor P ₃₀₆ via the resistance element R _306, and a predetermined switch SWPV is supplied to the base. The collector of the transistor P ₃₀₆ is ground line G
ND, switching pulse SWP at the base
Is supplied. That is, the transistor _P306 functions as the switch circuit 31.

The bases of transistors P ₃₀₇ and P ₃₀₈ are connected to each other, and the base and collector of transistor P ₃₀₇ are connected to each other. The connection point between the collector and the base of the transistor P ₃₀₇ is connected to the emitter of the transistor P _309, the collector of the transistor P ₃₀₈ is connected to the emitter of the transistor P _310. These current mirror circuits by the transistors P ₃₀₉ and P ₃₁₀ are configured, both base connected, base and collector of the transistor P ₃₁₀ is connected, the connection point is connected to the collector of the transistor Q _303. The collector of the transistor P ₃₀₉ is connected to the output end of the half H shift current generating circuit 3a.

The base of the transistor Q ₃₀₃ is connected to the connection point between the collector and the resistance element R ₃₀₆ of the transistor P _305, the emitter is connected to the emitter of the transistor Q _305, connection point of both the collector of the transistor Q ₃₀₄ It is connected to the. The emitter of the transistor Q ₃₀₄ is connected to the ground line GND via the resistance element R ₃₀₉ to R ₃₁₈ which are connected in series. These resistance elements R
_The total resistance value of _{309 to} R ₃₁₈ is set to, for example, about 500 kΩ, and carrier frequency setting current I _CAR input by resistance elements R _{309 to} R ₃₁₈ is _divided into 1 / N. That is, the current 1 / N by the resistance element R ₃₀₉ to R ₃₁₈
A circuit 32 is configured. Also, the transistor Q ₃₀₅
Is supplied with a predetermined signal VG.

[0042] In the half H shift current generating circuit 3a having such a configuration, when the carrier frequency setting current I _CAR outputted from the carrier frequency setting current generating circuit 2 is input to the base of the transistor Q _301, the transistor Q ₃₀₁ The current that appears at the collector of the transistor P ₃₀₁
Is folded by the current mirror circuit of the first stage consisting to P ₃₀₄ are appeared on the collector of the transistor P _304. This current is supplied to the base of the transistor Q ₃₀₄ through the base of the transistor Q _302. As a result, the input current I _CAR is divided into 1 / N of the input value by the current 1 / N circuit 32 including the resistance elements R _{309 to} R ₃₁₈ and appears at the collector of the transistor Q ₃₀₄ and further at the collector of the transistor Q _303. , This current is applied to the transistors P ₃₀₇ -P
Folded in the next stage of the current mirror circuit composed of ₃₁₀ appeared in the collector of the transistor P _309, is output as the output current I _HHS of the circuit. Note that the output of the half H shift current I _HHS is controlled by turning on / off the transistor Q ₃₀₃ in accordance with the input state of the switching pulse SWP to the base of the transistor P ₃₀₆ constituting the switch circuit 31, so that the output timing thereof Is controlled.

The luminance signal voltage / current conversion circuit 4 adjusts a predetermined frequency shift amount with respect to the luminance signal Y of the video signal separated by the Y / C separation circuit (not shown), and adjusts the amount of the frequency shift according to the amplitude of the input luminance signal Y. The frequency deviation setting current I _DEV is generated and output to the adder 5.

The adder 5 merges the input carrier frequency setting current I _CAR , the half H shift current I _HHS and the frequency deviation setting current I _DEV, and merges the combined current I (I _CAR
+ I _HHS + I _DEV ) to the FM modulation circuit 6

The FM modulation circuit 6 receives the input combined current I
Based on _{(I CAR + I HHS + I} DEV), 1 / 2f H performs frequency modulation on the luminance signal which is shifted and output to the limiter (not shown) resulting modulation current Y _FM modulation.

FIG. 5 is a circuit diagram showing a specific configuration example of the FM modulation circuit 6. The FM modulating circuit 6 includes a constant voltage source V ₆₀₁ ~V _{60 4} , Npn-type transistors Q _{601 to} Q ₆₁₃
And resistance elements R _{601 to} R ₆₀₆ .

The drive current I (I _CAR + I _HSS + I _DEV ) output from the adder 5 is supplied to the base of the transistor Q ₆₀₁ and the collector of the transistor Q ₆₀₂ . The emitter of the transistor Q ₆₀₁ is connected to the base of the transistor Q ₆₀₂ and Q _606, the collector thereof is connected to the collector of the transistor Q _603, the collector and the base of the transistor Q _607, to the collector of the transistor Q ₆₀₈ and Q _611. The base of transistor Q ₆₀₂ is connected to the base of the transistor Q _606, the emitter is connected to the resistance element R ₆₀₂ and R ₆₀₆ via a resistor R _601.

The emitter of the transistor Q ₆₀₃ is connected to the collector of the transistor Q _604, and is connected to the emitter of the transistor Q ₆₀₇ through a resistor R _603.
The emitter of the transistor Q ₆₀₄ is connected to the collector of the transistor Q _605, and is connected to the emitter of the transistor Q ₆₀₉ through the capacitor C _601. The base of the transistor Q ₆₀₄ is connected to the emitter of the transistor Q _611. The emitter of the transistor Q ₆₀₅ is connected to the emitter of the transistor Q _610, a connection point therebetween is connected to the collector of the transistor Q _606, the base is connected to the positive potential side of the constant voltage source V _601. Further, the emitter of the transistor Q ₆₀₆ is connected to the resistor R ₆₀₂ .

The emitter of the transistor Q _{608 is connected to} the collector of the transistor Q ₆₀₉ , the base of the transistor Q ₆₁₁ , and the connection point between the emitter of the transistor Q ₆₀₇ and the resistor R ₆₀₃ via the resistor R ₆₀₄ .
The positive potential side of the constant voltage source V ₆₀₂ is connected to the bases of the transistors Q ₆₀₃ and Q ₆₀₈ , and the positive potential side of the constant voltage source V ₆₀₃ is connected to the base of the transistor Q ₆₀₉ .

The connection point between the base of the emitter and the transistor Q ₆₀₄ of the transistor Q ₆₁₁ is the transistor Q ₆₁₂
Connected to the collector. Also, the transistor Q
The collector and the base of the transistor ₆₁₂ are connected, the emitter is connected to the base of the transistor Q ₆₁₀ via the resistor R _605, and the connection point between them is connected to the collector of the transistor Q ₆₁₃ . The emitter of the transistor Q ₆₁₂ is connected to the output terminal of the circuit. The emitter of the transistor Q ₆₁₃ is connected to the resistance element R _606, the base is connected to the positive potential side of the constant voltage source V _604.

In the FM modulation circuit 6 mainly including a VCO including a capacitor C ₆₀₁ , frequency modulation is performed based on the input current I to the transistors Q ₆₀₁ and Q ₆₀₂ , and is １ ／ of the horizontal synchronization frequency f _H. the luminance signal Y _FM which receives the shifting action of the frequency is output from the emitter <br/> other transistor Q _612. The oscillation frequency f of the VCO in the FM modulation circuit 6 is expressed by the following equation. f = I ₀ / 4V ₀ C ₆₀₁ Actually, 5 to 1 of the capacitor C ₆₀₁ as the internal capacitance
A capacity variation of about 0% cannot be avoided. Therefore, Even if there is no variation in the I ₀ and V _0, also varies about 5-10% oscillation frequency f of the VCO. However, the half H shift current I _HHS included in the driving current, while observing the output Y _FM of the FM modulation circuit 6, based on the carrier frequency setting current I _CAR tuned to absorb element variation of VCO Since it is generated, it is not affected by the device variation of the VCO. As a result, the shift amount of the output luminance signal Y _FM of the FM modulation circuit 6 does not vary, a stable output can be obtained.

Next, the operation of the above configuration will be described. A reference current I _REF having no temperature dependency generated by a reference current generating circuit 1 which is a current source whose current value can be selected by an external external resistor is supplied to a carrier frequency setting current generating circuit 2.

In the carrier frequency setting current generating circuit 2,
In response to the reference current I _REF , a carrier frequency setting current I _CAR whose frequency has been adjusted so as to absorb the variation in the VCO of the FM modulation circuit 6 is generated and output to the half H shift current generation circuit 3 a and the adder 5. You.

In the half H shift current generating circuit 3a, the input carrier frequency setting current I _CAR is input to the current 1 / N circuit 32 via the switch circuit 31 which opens and closes according to the switching pulse SW of a predetermined cycle. In the current 1 / N circuit 32, the carrier frequency setting current I _CAR is _divided into 1 / N to generate a half H shift current I _HHS , and this half H shift current I _HHS is output to the adder 5.
Note that the half H shift current I _HHS generated by the half H shift current generation circuit 3a is based on the reference current I _REF having no temperature dependency generated by the reference current generation circuit 1 based on the VCO of the FM modulation circuit 6. Since it is generated based on the carrier frequency setting current I _CAR whose frequency is adjusted to absorb the device variation and is generated, there is no temperature dependency, and it is affected by sensitivity variation due to VCO device variation. There is no. That is, 1 /
VCO of FM modulation circuit 6 without deviation in absolute value of 2f _H
Is output as a high-precision half H shift current I _HHS corresponding to the sensitivity variation of.

In the luminance signal voltage / current conversion circuit 4,
A predetermined frequency shift amount is adjusted for the luminance signal Y of the video signal separated by the Y / C separation circuit (not shown),
Frequency deviation setting current I according to the amplitude of input luminance signal Y
_DEV is generated and output to the adder 5.

In the adder 5, the input carrier frequency setting current I _CAR , the half H shift current I _HHS and the frequency shift amount setting current I _DEV are merged, and the merged current I (I
_CAR + _IHHS + _IDEV ) is output to the FM modulation circuit 6.

In the FM modulation circuit 6, the input combined current I
Based on _{(I CAR + I HHS + I} DEV), 1 / 2f frequency modulation for _H shifted luminance signal is performed, modulated luminance signal Y _FM which results in modulation obtained is output to the limiter, not shown. As a result, the luminance signal Y FM-modulated and offset by 1 / 2f _H is recorded on the magnetic tape by a recording head (not shown).

[0058] In this case, the half H shift current I _HHS, as described above, no deviation to the absolute value of 1 / 2f _H, FM
Since the current has a high accuracy corresponding to the variation in the sensitivity of the VCO of the modulation circuit 6, the crosstalk component generated at the time of reproduction from an adjacent track is reliably removed by the comb filter arranged in the reproduction system.

As described above, according to the present embodiment,
V of the FM modulation circuit 6 with no deviation in the absolute value of 1 / 2f _H
A highly accurate half H shift current I _HHS corresponding to the sensitivity variation of CO can be obtained, whereby the crosstalk component from the adjacent track generated at the time of reproduction is
The comb-shaped filter arranged in the reproduction system surely removes the image, and it is possible to obtain a high-precision image free from beat interference or the like.

The circuit configurations of the reference current generating circuit 1, the carrier frequency setting current generating circuit 2, the half H shift current generating circuit 3a and the FM modulation circuit 6 shown in this embodiment are shown in FIGS. It is needless to say that the circuit is not limited to the circuit.

[0061]

As described above, according to the present invention,
The effect of sensitivity variations due to VCO device variations can be suppressed, a highly accurate offset current can be generated, and crosstalk components from adjacent tracks generated during playback can be reliably removed by the comb filter arranged in the playback system. High-accuracy video without beat interference can be obtained.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing one embodiment of a frequency modulation current generation circuit according to the present invention.

FIG. 2 is a circuit diagram showing a configuration example of a reference current generation circuit according to the present invention.

FIG. 3 is a circuit diagram showing a specific configuration example of a carrier frequency setting current generation circuit according to the present invention.

FIG. 4 is a circuit diagram showing a specific configuration example of a half H shift current generation circuit according to the present invention.

FIG. 5 is a circuit diagram showing a specific configuration example of an FM modulation circuit according to the present invention.

FIG. 6 is a diagram illustrating an example of a signal recording pattern in an SP mode of an 8 mm video tape recorder.

FIG. 7 is an explanatory diagram of a crosstalk component from a track adjacent to a track to be reproduced on which a luminance signal is recorded.

FIG. 8 is a diagram for describing a basic recording / reproducing operation of a luminance signal in a video tape recorder.

FIG. 9 is a block diagram showing a configuration example of a conventional FM modulation current generation circuit in a recording system of a video tape recorder.

FIG. 10 is a graph showing an oscillation frequency characteristic with respect to a drive current of a VCO in the FM modulation circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Reference current generation circuit 2 ... Carrier frequency setting current generation circuit 3a ... Half H shift current generation circuit 4 ... Brightness signal voltage current conversion circuit 5 ... Adder 6 ... FM modulation circuit

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04N 5/91-5/956 H04N 9/79-9/898 H03C 3/16

Claims (2)

(57) [Claims] 1. A carrier current generating circuit for generating a carrier current having no temperature dependency, and a carrier current from the carrier current generating circuit is reduced by a predetermined reduction amount, and a horizontal synchronizing frequency of 1 is added to a video signal component.
A shift current generating circuit for generating a half H shift current for adding an offset of 1/2, a frequency based on a carrier current from the carrier current generating circuit, a half H shift current from the shift current generating circuit, and a video signal component. A frequency modulation current generation circuit, comprising: a frequency modulation circuit that performs modulation. 2. A half-H shift current for generating a carrier current having no temperature dependency, reducing the carrier current by a predetermined reduction amount, and adding an offset of 1/2 of a horizontal synchronization frequency to a video signal component. And the half H from the carrier current and shift current generation circuit is generated.
A frequency modulation method for performing frequency modulation based on a shift current and a video signal component.