JP3168992B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to relates to a method of manufacturing a semiconductor equipment, and more particularly to a method of manufacturing a semiconductor equipment using the silicide gate polysilicon.

[0002]

2. Description of the Related Art A salicide process known as one of the conventional semiconductor device manufacturing methods is disclosed in
There is a method disclosed in JP-A-45923. Next, this conventional method will be described in the order of steps with reference to the longitudinal sectional views shown in FIGS.

As shown in FIG. 3A, first, a field oxide film 201 is formed on a semiconductor substrate as a field insulating film. In the active region surrounded by the field oxide film 201, a gate oxide film 202 and a gate polysilicon 203 are sequentially grown.

Then, gate polysilicon is patterned by photolithography and dry etching, which are known techniques, to form a gate electrode. Next, a sidewall 206 made of a silicon oxide film is formed on the side surface of the gate polysilicon 203 by using a known CVD technique and an etching technique. Next, the diffusion layer 207 is formed by photolithography and ion implantation.

Next, as shown in FIG. 3B, a gate polysilicon 203 serving as a gate electrode and a diffusion layer 207 are formed.
The native oxide film on the upper silicon surface is removed, and for example, titanium is sputter deposited. Next, 700 ° C. in a nitrogen atmosphere
By performing the following rapid heat treatment (hereinafter, RTA), only titanium in contact with silicon is silicided, and C49
A titanium silicide having a mold structure is formed. At this time, titanium in contact with field oxide film 201 and sidewall 206 and part of titanium on the semiconductor substrate are nitrided to become titanium nitride.

Next, wet etching is performed selectively using a mixed solution of ammonia water and hydrogen peroxide water, and the like.
Only unreacted titanium and titanium nitride are removed. Next, RTA at a higher temperature (800 ° C. or higher) than the above-described RTA is performed to form a titanium silicide 208 having a C54 type structure having a lower electric resistivity than that of the titanium silicide having a C49 type structure.

Next, as shown in FIG. 3C, an interlayer film 209 made of an oxide film is formed, and the interlayer film 209 is planarized by a CMP method or an etch-back method.

By using the salicide process described above, the gate polysilicon 203 and the diffusion layer 20 are formed.
7 is self-aligned to be silicided, so that the resistance is reduced and the speed of the device can be increased. The salicide process has an advantage that it can be selectively silicified only in a necessary region.

[0009]

However, with the advance of miniaturization and high integration of devices, a so-called system which integrates a DRAM and a logic device into one chip has been developed.
There is an increasing demand for an embedded device aiming at an on-chip (SOC), and in order to realize this embedded device, it is necessary to solve various newly generated problems. For example, in order to form a DRAM and a logic device on the same chip, it is necessary to simultaneously form a DRAM portion and a logic portion, which have completely different formation processes, and thus there is a problem that the number of manufacturing steps increases and the process becomes complicated. .

As a method for solving these problems, there is a method in which silicide is simultaneously formed on the gate electrodes and diffusion layers of the DRAM section and the logic section in a self-aligned manner. This method is based on the salicide method (Self Aligned Silicid method).
e: Salicide) with the aim of realizing high performance and high integration of transistors in logic devices.
This is a widely adopted method. By using this method, the DRAM section and the logic section can be simultaneously formed sequentially, so that the manufacturing process can be simplified and the number of steps can be reduced.

However, in this case, a new problem arises. That is, when silicide is simultaneously formed on the gate electrode and the diffusion layer of the DRAM section and the logic section as described above, it is generally common to perform the DRAM capacitance forming step after the silicide forming step. However, as a result of performing a high-temperature heat treatment in the capacitance forming step after forming the silicide film, the silicide film is agglomerated during the capacitance forming step to increase the resistance. There is a problem that the property is poor.

Here, the aggregation of the silicide film will be described. The silicide film is made up of a group of grains having the same crystallinity when viewed microscopically, and the interface between each grain is called a grain boundary. Aggregation of the silicide film is a phenomenon in which silicon in the silicide film precipitates at the grain boundaries, and the grain boundaries of the grains increase in resistance. It is generally known that the heat resistance of silicide affects the silicide formation film thickness, wiring width, crystallinity of underlying silicon, and the like.

In the silicide formation film thickness, as the silicide film thickness becomes thinner, the heat resistance deteriorates remarkably, and the shallow junction of the diffusion layer is progressing with miniaturization and high integration of devices. In addition, the thickness of the silicide that can be formed also becomes thinner, and the heat resistance deteriorates. In addition, the wiring width of the gate electrode and the diffusion layer also causes deterioration of heat resistance due to the progress of miniaturization. Further, regarding the crystallinity of the underlying silicon, there are polycrystalline silicon forming the gate electrode and single crystal silicon forming the diffusion layer, but the heat resistance of the silicide film formed on the gate electrode formed of the polycrystalline silicon is high. It has been found that sex is poor.

At present, the cause is that the presence of grain boundaries of silicon grains for polycrystalline silicon causes the formation of silicide grains by dragging the grains. Grains are formed unevenly, and the bonding state of the interface between the polycrystalline silicon and the silicide interface is weaker than the interface between the single crystal silicon and the silicide, and the silicon in the silicide film tends to precipitate on the underlying silicon It is believed that.

An object of the present invention is to improve the heat resistance of a silicide film formed on a gate and to provide a semiconductor device having high reliability.
An object of the present invention is to provide a method of manufacturing a device.

[0016]

Means for Solving the Problems] To solve the above problems
According to a first aspect of the present invention, a gate electrode is provided on a semiconductor substrate.
Forming a diffusion layer and a diffusion layer;
With a mask film to suppress the silicidation reaction
Pattern the gate electrode with the first high melting
Forming a point metal silicide film with a predetermined thickness;
Step of forming an interlayer film and flattening it, and forming it on the gate electrode
After the removed mask film is removed, the second refractory metal silicide is removed.
Forming an id film with a thickness larger than a predetermined thickness;
It is characterized by having.

According to a second aspect of the present invention, a semiconductor device is provided on a semiconductor substrate.
A high melting point metal silicide layer is
In a method of manufacturing a semiconductor device to be formed,
Forming a gate polysilicon in the
Step of ion implantation into the recon and gate polysilicon
Forming a nitride film on it and patterning the nitride film
Etch gate polysilicon to form gate electrode
And forming sidewalls on the side walls of the gate electrode
And ion implanting the semiconductor substrate,
Perform N-type gate electrode or P-type gate electrode
Forming a diffusion layer and a first high melting point on the diffusion layer
Forming a metal silicide film to a predetermined thickness;
Step of depositing a film and flattening the interlayer film on the gate electrode
Exposing the nitride film and removing the nitride film
And placing a second refractory metal silicide film on the gate electrode.
Forming at a thickness larger than a predetermined thickness.
And features.

According to a third aspect of the present invention, a semiconductor device is provided on a semiconductor substrate.
A high melting point metal silicide layer is
In a method of manufacturing a semiconductor device to be formed,
Forming a Gate polysilicon, gate policy
Step of ion implantation into the recon and gate polysilicon
Forming an oxide film on the oxide film and forming a nitride film on the oxide film
And patterning the oxide and nitride films to
Etch gate polysilicon to form gate electrode
Process and forming sidewalls on sidewalls of gate electrode
Process, a process of implanting ions into the semiconductor substrate, and a heat treatment
To expand with the N-type gate electrode or the P-type gate electrode.
Forming a diffused layer; and forming a first refractory metal on the diffused layer.
Forming a silicide film with a predetermined thickness;
Depositing process and planarizing the interlayer film to form a nitride film on the gate electrode.
Exposing the nitride film, removing the nitride film,
A second refractory metal silicide film having a predetermined thickness
Forming a layer with a thickness greater than
Sign.

According to a fourth aspect of the present invention, a semiconductor device is provided on a semiconductor substrate.
A high melting point metal silicide layer is
In a method of manufacturing a semiconductor device to be formed,
Forming a gate polysilicon in the
Step of ion implantation into the recon and gate polysilicon
A step of forming an oxide film thereon and patterning the oxide film
Etch gate polysilicon to form gate electrode
And forming sidewalls on the side walls of the gate electrode
And ion implanting the semiconductor substrate,
Perform N-type gate electrode or P-type gate electrode
Forming a diffusion layer and a first high melting point on the diffusion layer
Forming a metal silicide film to a predetermined thickness;
Step of depositing a film and flattening the interlayer film on the gate electrode
Exposing the oxide film and removing the oxide film
And placing a second refractory metal silicide film on the gate electrode.
Forming at a thickness larger than a predetermined thickness.
And features.

According to a fifth aspect of the present invention, a semiconductor device is provided on a semiconductor substrate.
A high melting point metal silicide layer is
In a method of manufacturing a semiconductor device to be formed,
Forming a gate polysilicon in the
Step of ion implantation into the recon and gate polysilicon
A step of forming an oxide film thereon and patterning the oxide film
Etch gate polysilicon to form gate electrode
Forming a step, the side wall on the side wall of the gate electrodes to
And ion implanting the semiconductor substrate,
Perform N-type gate electrode or P-type gate electrode
Forming a diffusion layer and a first high melting point on the diffusion layer
Forming a metal silicide film to a predetermined thickness;
Step of depositing a film and flattening the interlayer film to form a gate electrode
Exposing and forming a second refractory metal layer on the gate electrode.
A process to form a reside film with a thickness larger than the specified thickness
And characterized in that:

[0021]

Embodiments of the present invention will be described below in detail with reference to the accompanying drawings. As described above, the heat resistance of the silicide film formed on the gate is lower than that of the silicide film formed on the diffusion layer. For this reason, in this embodiment, the heat resistance of the silicide film formed on the gate is improved by forming a silicide film thicker than the silicide film formed on the diffusion layer on the gate.

As described above, in order to form a silicide film thicker than a silicide film formed on a diffusion layer on a gate, in the present embodiment, a mask for suppressing a silicidation reaction on a gate in advance is used. The gate is patterned with the film formed, and a first silicide film is formed only on the diffusion layer once. At this time, a thin silicide film is formed in accordance with the shallow junction. Next, after an interlayer film is formed and planarized, the mask film on the gate is removed, and a second silicide film is formed. In this case, since the silicide film can be formed without depending on the shallow junction, the silicide film formed on the gate can be thicker than the silicide film on the diffusion layer. As a result, the heat resistance of the silicide film formed on the gate can be improved, and a highly reliable semiconductor device can be realized.

Next, the method of manufacturing the semiconductor device according to the embodiment of the present invention will be described with reference to FIGS. 1 (a) to 1 (c) and 2 (d).
A description will be given with reference to vertical sectional views shown in the order of steps (f) to (f). First, as shown in FIG. 1A, a field oxide film 101 is formed as a field insulating film. In the active region surrounded by the field oxide film 101, a gate oxide film 102 and a gate polysilicon 103 are sequentially grown. Next, ions are implanted into the gate polysilicon by an ion implantation method to introduce impurities. Next, an oxide film 104 and a nitride film 105 are sequentially deposited.

Next, the oxide film 104 and the oxide film 104 are formed by known methods such as photolithography and dry etching.
By patterning the nitride film 105, these oxide films 10
4. Using the nitride film 105 as a mask, pattern the gate polysilicon 103 to form a nitride film, an oxide film, and a gate polysilicon gate electrode. Next, on the side surface of the gate polysilicon 103, for example, a sidewall 106 made of a silicon oxide film is formed by using a known CVD technique and an etching technique. Next, by performing a photolithography method, an ion implantation method, and a heat treatment, the impurities are activated to form a P-type gate electrode or an N-type gate electrode and the diffusion layer 107, respectively.

Next, as shown in FIG. 1B, the natural oxide film on the silicon surface on the diffusion layer 107 is removed, and for example, titanium is sputter deposited. Next, by performing RTA at 700 ° C. or lower in a nitrogen atmosphere, only titanium in contact with silicon is silicided, thereby forming titanium silicide having a C49 type structure. At this time, titanium in contact with the nitride film 105 existing on the field oxide film 101, the sidewalls 106, and the gate polysilicon 103 and part of titanium on the semiconductor substrate are nitrided into titanium nitride.

Next, wet etching is performed selectively using a mixed solution of ammonia water and hydrogen peroxide water, and the like.
Only unreacted titanium and titanium nitride are removed. Next, RTA at a higher temperature (800 ° C. or higher) than the above-mentioned RTA is performed, and the first titanium silicide film 108 having a C54 type structure having a lower electric resistivity than the above-described C49 type titanium silicide is formed to a predetermined thickness. Form. Next, as shown in FIG. 1C, an interlayer film 109a made of an oxide film is formed.

Next, as shown in FIG.
The first interlayer film 109 is formed by flattening the interlayer film 109a by an MP method or an etch back method, and etching back the interlayer film 109a until the nitride film 105 is exposed.

Next, as shown in FIG. 2E, the nitride film 105 is removed by, for example, a wet etching method.

Next, as shown in FIG. 2F, an oxide film 104 on the gate polysilicon 103 is formed, for example, by
After being removed by wet etching, titanium is deposited again as described above, and a two-step heat treatment and wet etching are performed to form a second titanium silicide film 110 on the gate electrode. At this time, the second titanium silicide film 110 is formed thicker than the first titanium silicide film 108. Next, an interlayer film is formed again, and the interlayer film is planarized by a CMP method or an etch-back method to form a second interlayer film 111.

In this embodiment, titanium (T
Cobalt (Co), nickel (Ni) instead of i)
Needless to say, the same effect can be obtained by using other refractory metals such as. Further, the first silicide film and the second silicide film do not need to be the same refractory metal, and any silicide material can be selected.

In this embodiment, the oxide film 1
04 and the nitride film 105 are sequentially formed, but only the oxide film or only the nitride film may be formed. In that case, after forming the gate electrode, the diffusion layer, and the interlayer film, the oxide film or the nitride film may be exposed and then removed.
In the case where only an oxide film is formed, the second titanium silicide may be formed after exposing the oxide film or exposing the gate electrode.

[0032]

As apparent from the above description, according to the semiconductor equipment manufacturing method of the present invention, the thickness of the refractory metal silicide formed on the gate electrode height is formed on the diffusion layer By making the thickness of the melting point metal silicide thicker, the heat resistance of the silicide film formed on the gate electrode can be improved, and a highly reliable semiconductor device can be realized.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a method of manufacturing a semiconductor device according to the present invention in the order of steps.

FIG. 2 is a cross-sectional view showing a continuation of a process order of the method for manufacturing the semiconductor device of FIG. 1;

FIG. 3 is a cross-sectional view showing a conventional method for manufacturing a semiconductor device in the order of steps.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 101 Field oxide film 102 Gate electrode 103 Gate polysilicon 104 Oxide film 105 Nitride film 106 Side wall 107 Diffusion layer 108 First titanium silicide 109 First interlayer film 110 Second titanium silicide 111 Second interlayer film

Claims (5)

(57) [Claims] A step of forming a gate electrode and a diffusion layer on a semiconductor substrate; and a step of patterning the gate electrode with a mask film for suppressing a silicidation reaction formed on the gate electrode. Forming a first refractory metal silicide film at a predetermined thickness, forming an interlayer film to planarize the film, removing the mask film formed on the gate electrode, and removing the second film. Forming the refractory metal silicide film with a thickness larger than the predetermined thickness. 2. A method of manufacturing a semiconductor device in which a refractory metal silicide layer is formed between insulating films selectively formed on a semiconductor substrate, wherein: a step of forming gate polysilicon on the semiconductor substrate; Performing ion implantation on polysilicon; forming a nitride film on the gate polysilicon; patterning the nitride film and etching the gate polysilicon to form a gate electrode; Forming a sidewall on a side wall; performing ion implantation on the semiconductor substrate; performing a heat treatment to form an N-type gate electrode or a P-type gate electrode and a diffusion layer; Forming a first refractory metal silicide film with a predetermined thickness, depositing an interlayer film, flattening the interlayer film, Exposing the nitride film on the gate electrode; removing the nitride film; and forming a second refractory metal silicide film on the gate electrode with a thickness greater than the predetermined thickness. A method for manufacturing a semiconductor device, comprising: 3. A method of manufacturing a semiconductor device in which a refractory metal silicide layer is formed between insulating films selectively formed on a semiconductor substrate, comprising: forming a gate polysilicon on the semiconductor substrate; Performing ion implantation on polysilicon; forming an oxide film on the gate polysilicon; forming a nitride film on the oxide film; patterning the oxide film and the nitride film to form the gate; A step of forming a gate electrode by etching polysilicon; a step of forming a sidewall on a side wall of the gate electrode; a step of ion-implanting the semiconductor substrate; and performing a heat treatment on an N-type gate electrode or a P-type. Forming a gate electrode and a diffusion layer, and forming a first refractory metal silicide film with a predetermined thickness on the diffusion layer; Depositing an interlayer film; planarizing the interlayer film to expose the nitride film on the gate electrode; removing the nitride film; and forming a second refractory metal silicide on the gate electrode. Forming a film with a thickness larger than the predetermined thickness. 4. A method of manufacturing a semiconductor device in which a refractory metal silicide layer is formed between insulating films selectively formed on a semiconductor substrate, wherein: a step of forming gate polysilicon on the semiconductor substrate; Performing ion implantation on polysilicon; forming an oxide film on the gate polysilicon; patterning the oxide film and etching the gate polysilicon to form a gate electrode; Forming a sidewall on a side wall; performing ion implantation on the semiconductor substrate; performing a heat treatment to form an N-type gate electrode or a P-type gate electrode and a diffusion layer; Forming a first refractory metal silicide film with a predetermined thickness, depositing an interlayer film, flattening the interlayer film, Exposing the oxide film on the gate electrode, removing the oxide film, and forming a second refractory metal silicide film on the gate electrode with a thickness larger than the predetermined thickness. A method for manufacturing a semiconductor device, comprising: 5. A method of manufacturing a semiconductor device in which a refractory metal silicide layer is formed between insulating films selectively formed on a semiconductor substrate, wherein: a step of forming a gate polysilicon on the semiconductor substrate; Performing ion implantation on polysilicon; forming an oxide film on the gate polysilicon; patterning the oxide film and etching the gate polysilicon to form a gate electrode; Forming a sidewall on a side wall; performing ion implantation on the semiconductor substrate; performing a heat treatment to form an N-type gate electrode or a P-type gate electrode and a diffusion layer; Forming a first refractory metal silicide film with a predetermined thickness, depositing an interlayer film, flattening the interlayer film, The method of manufacturing a semiconductor device comprising: the step of exposing the gate electrode, characterized in that the second refractory metal silicide film on the gate electrode and a step of forming at the predetermined thickness greater than the thickness of.