JP3175196B2 - Integrated circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

FIELD OF THE INVENTION The present invention relates to integrated circuits, and more particularly to large scale integrated circuits having thin film transistors.

[0002]

2. Description of the Related Art Thin film transistors have been mainly used in liquid crystal display devices and the like.
Use in large-scale integrated circuits such as ROMs has been studied. Such a thin film transistor is formed on an element such as a transistor provided on the surface of a semiconductor substrate in order to increase the degree of integration. However, the gate electrode is formed in the drain region because the gate electrode can be shared with the element of the base. , A channel region and a source region. One example of such an apparatus is shown in FIG.

[0005] A first insulating film 2 is formed on a semiconductor substrate 1. However, the elements formed on the surface of the semiconductor substrate are not shown. On the first insulating film 2, a conductor layer to be the gate electrode 3 of the thin film transistor is formed. As the conductor layer, for example, a polycrystalline silicon film to which an impurity is added is used. In the case where a thin-film pMOS transistor is used as a load of a CMOS type SRAM cell, this conductor layer has a driving nMOS transistor (an n-type diffusion layer provided on a surface portion of a semiconductor substrate as a source / drain region). ) Also serves as the gate electrode. On the conductor layer (3), a gate insulating film 4 is formed, and further, a semiconductor thin film (a drain region 5a, a channel region 5b, and a source region 5c) is formed. As a material of the semiconductor thin film, a polycrystalline silicon film obtained by recrystallizing an amorphous silicon film or the like is used. The drain region 5a, the channel region 5b, and the source region of the thin film transistor are formed in the semiconductor thin film. Although a method such as photolithography or ion implantation is used for forming these regions 5a and the like, they are not the gist of the present invention, and thus are omitted. Semiconductor thin film (5a, 5b, 5
c) An interlayer insulating film 10 is formed thereon, and a signal line 9 made of a metal film such as aluminum is formed thereon.

[0004]

In the integrated circuit described above, the parasitic capacitance C0 exists between the channel region and the signal line. When the potential of the signal line fluctuates rapidly, the potential of the channel region also fluctuates due to the effect of capacitive coupling, and as a result, there is a problem that the performance of the thin film transistor fluctuates with respect to a design value.

For example, a thin film transistor is a CM with a 5V power supply.
It is formed as a pMOS transistor of an OS circuit, and 0 V is applied to a drain region and a gate electrode, and 5 V is applied to a source region.
When V is applied, the thin film transistor is in a non-conductive state. At this time, if the signal line is 5 V, there is no problem at the same potential as the source. However, when the signal line changes to 0 V, the channel region is biased in the forward direction by capacitive coupling, a leakage current flows to the drain region, and power consumption increases. There is a problem.

[0006]

The integrated circuit of the present invention, in order to solve the problem] has a gate electrode made of the first conductive layer formed over the first insulating film on one principal surface of the semiconductor substrate, the first conducting a gate insulating film provided on layer, the gate insulating the channel region of the thin film transistor of a semiconductor thin film provided on the membrane, thickness 50 provided in the channel region
Second insulating film made of a silicon oxide film having a thickness of 100 nm
A shield electrode made of a second conductive layer provided on the second insulating film and connected to a fixed potential terminal, and a second electrode made of a silicon oxide film having a thickness of 100 to 500 nm provided on the shield electrode. 3 insulating film, and on the third insulating film
Possess a signal line composed of the third conductive layer provided on the front
The shield electrode is connected to the source region of the thin film transistor.
It is something that is connected .

[0007]

Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view of a semiconductor chip showing one embodiment of the present invention. A first insulating film 2 of silicon oxide or the like is formed on a semiconductor substrate 1 of silicon or the like, and a gate electrode 3 is formed of, for example, a polycrystalline silicon film (first conductor layer). A gate insulating film 4 is formed on the gate electrode 3. Next, for example, an n-type silicon thin film (5a-5
c) is formed. The drain region 5a and the source region 5a (P type) of the thin film transistor are formed by using photolithography, ion implantation, or the like. 5b is a channel region of the thin film transistor. 50 thickness on silicon thin film
A second insulating film 6 such as silicon oxide of about 100 nm is formed. On the second insulating film 6, a shield electrode 8 made of a metal silicide such as tungsten silicide or a metal film (second conductor layer) is formed at a position corresponding to the channel region 5b and a part of the source region 5c. Is done. Although not shown, the shield electrode 8 is supplied with a certain potential, for example, the same potential as the source region 5c of the thin film transistor by some method. For example, the source region 5c and the shield electrode may be connected to an aluminum wiring layer, and 5 V may be applied to the aluminum wiring layer. On the second insulating film 6 on which the shield electrode 8 is provided, a third insulating film 7 such as a silicon oxide film having a thickness of 100 to 500 nm is formed. The second and third insulating films correspond to the interlayer insulating film (10 in FIG. 2), and the greatest feature of the present invention is to have the shield electrode 8 in the middle. The signal line 7 such as an aluminum film is formed on the third insulating film 7.

The signal line 7 has a parasitic capacitance C1 between itself and the shield electrode 8. A parasitic capacitance C11 also exists between the channel region 5b and the shield electrode 8. Here, the shield electrode 8 is connected to the fixed potential end, and is not affected even if the potential of the signal line 7 fluctuates. Therefore, the potential of the channel region 5b coupled by the shield electrode 8 and the capacitor C11 does not change, and the performance of the thin film transistor is stabilized.

[0010]

As described above, according to the present invention, by providing a shield electrode between the channel region and the source region of the thin film transistor and the signal line, even if the potential of the signal line fluctuates rapidly, the channel of the thin film transistor is affected. Without this, the performance of the thin film transistor can be stabilized. Accordingly, there is an effect that characteristics of a circuit including the thin film transistor are stabilized. Although the potential of the shield electrode is the same as the source of the thin film transistor in the description, another potential, for example, a stable fixed potential such as a power supply may be used.

[Brief description of the drawings]

FIG. 1 is a sectional view showing one embodiment of the present invention.

FIG. 2 is a sectional view showing a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 First insulating film 3 Gate electrode 4 Gate insulating film 5a Drain region 5b Channel region 5c Source region 6 Second insulating film 7 Third insulating film 8 Shield electrode 9 Signal line 10 Interlayer insulating film

Claims (1)

(57) [Claims] A gate electrode comprising a first conductive layer provided on one main surface of a semiconductor substrate via a first insulating film;
Wherein the first conductive layer gate insulating provided on the membrane, the channel region of the thin film transistor made of a semiconductor thin film provided on the gate insulating film, set in the channel region
A second insulating film made of a silicon oxide film having a thickness of 50 to 100 nm, a shield electrode made of a second conductive layer provided on the second insulating film and connected to a fixed potential end, 100 to 50 thickness provided on the shield electrode
A third insulating film made of a silicon oxide film having a thickness of 0 nm ;
Have a third signal line comprising a conductive layer provided on the third insulating film, wherein the shield electrode is the thin film transistor
An integrated circuit, wherein the integrated circuit is connected to a source region .