JP3176107B2 - Digitally controlled temperature compensated crystal oscillator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a temperature-compensated crystal oscillator for compensating for temperature characteristics of a crystal unit, and more particularly to a digitally-controlled temperature-compensated crystal oscillator which measures ambient temperature and controls the temperature based on digital data.

[0002]

2. Description of the Related Art As a crystal oscillator, for example, an AT-cut crystal unit is generally used. Due to the temperature-frequency characteristics of the crystal unit, an oscillation whose period is highly stable from a low temperature region to a high temperature region is obtained. It is difficult to get.

[0003] This type of crystal oscillator has a cubic curve of temperature-
An oscillator that has frequency characteristics but compensates for the temperature-frequency characteristics is a temperature-compensated crystal oscillator.A conventional compensation method uses a capacitor and a crystal resonator connected to each other, and the crystal oscillation is controlled by the temperature characteristics of the capacitor. The temperature-frequency characteristics of the element have been compensated, and an element such as a thermistor whose resistance value changes with temperature has been used.

Further, in recent years, a digital control type temperature-compensated crystal oscillator which compensates the temperature-frequency characteristics of a crystal unit using digital technology has been used.

One of the problems is that the microcomputer calculates a cubic curve for compensating for the temperature-frequency characteristic (hereinafter referred to as a cubic temperature characteristic) of the cubic crystal resonator.

As another method, a ROM serving as a memory means stores compensation amount data at a certain time point around a specific crystal unit, and based on temperature information obtained by the surrounding temperature detecting means. Thus, the compensation amount data at that temperature was obtained from the ROM.

The compensation amount data is converted into a voltage value by a D / A converter, and the voltage is applied to a varicap diode connected to one end of the crystal unit to compensate for the third-order temperature characteristic of the crystal unit. I was (JP-A-63-24490)
In the above-described compensation method using ROM data, for example, using a sequential 256-bit ROM, for example, 120 ° C. from −35 ° C. to + 85 ° C. is divided into 51 temperature regions, and each temperature region is corresponded. The address holds 5-bit compensation data. That is, one compensation data is held for about 2 ° C., and compensation is performed in 32 steps.

[0008]

In recent years, a ROM having a large storage capacity has been made possible by the improvement of ROM integration technology, and therefore the number of divisions of the compensation temperature region can be increased from 51 to 100.

However, in order to compensate the third-order temperature characteristic of the crystal unit with high accuracy, for example, the temperature is detected at intervals of 0.25 ° C., and the compensation based on the temperature is compensated for about ± 0.5 PPM unit. Must. Assuming -35 ° C ~ +
Considering the above-mentioned high-precision compensation at 85 ° C., a temperature range of 480 (about 480 to 512 (converted into 9 bits)), ± 0.
To perform compensation in units of 5 PPM, compensation data of 7 bits is required. As a result, the capacity of the ROM is 512 × 7 bits =
A very large memory of 3584 bits is required.

[0010] For this reason, there is a problem in that even if the implementation is possible with a large memory capacity, the IC chip having the memory section becomes large and the cost increases.

Although any value of compensation data can be written in the ROM, if there is a large difference between compensation data in the adjacent compensation temperature region, a digital error increases, and a digitally controlled temperature compensated crystal oscillator is used. It was difficult to control the overall accuracy.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and has as its object to reduce the storage capacity of a ROM and to achieve highly accurate temperature compensation in a digitally controlled temperature compensation crystal. It is to provide an oscillator.

[0013]

SUMMARY OF THE INVENTION The present invention comprises a temperature pulse generator for generating a pulse whose cycle changes according to the ambient temperature, a reference pulse generator, and code data and count clock data. A memory unit that outputs both data, a timing generator that controls output of both data of the memory unit based on pulse signals of the reference pulse generator and the temperature pulse generator, and a timing generator that controls both data of the memory unit. An up / down counter for adding / subtracting the initial reference temperature compensation value, a D / A converter for controlling the operation result of the up / down counter to a predetermined voltage value, and a D / A converter connected to the D / A converter and controlled by the voltage value. This is a digital control type temperature-compensated crystal oscillator comprising a crystal oscillation circuit.

[0014]

According to the present invention, since the compensation data of the crystal oscillator stored in the ROM serving as the memory section is composed of the code data and the count clock data, only two bits of data are provided for one temperature compensation area. Is held. For this reason, for example, even if the range between −35 ° C. to + 85 ° C. is divided into 480 and one temperature compensation region is set to 0.25 ° C.,
An extremely small storage capacity of 480 (approximately 512 = 9 bits) × 2 bits = 1024 bits is required, and the crystal oscillator can perform highly accurate temperature compensation.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a digitally controlled temperature-compensated crystal oscillator according to the present invention. In the figure, reference numeral 1 denotes a reference pulse generator, 2 denotes a temperature pulse generator, 3 denotes a timing pulse generator, Is a ROM circuit as a memory unit, 5 is an up / down counter (U / D counter), 6 is a latch circuit, a digital-analog (D / A) converter, and 7 is a voltage controlled crystal oscillator. Incidentally, 21 is a hysteresis circuit.

The reference pulse generator 1 generates a stable pulse at an ambient temperature. Specifically, an astable multivibrator (for example, about 62.2 KHz) which is relatively stable at an ambient temperature. And a 9-bit binary counter. The reference pulse generator 1 generates two types of a reference pulse ts and a divided pulse PU thereof, and outputs the two to the timing pulse generator 3 respectively. The reference pulse PU is a pulse combined with the temperature pulse TT of the temperature pulse generator 2, and the reference pulse ts is a pulse of the clock pulse train CO having the number of pulses corresponding to the ambient temperature combined with the temperature pulse TT and the reference pulse PU. This is a reference pulse. This pulse ts generates a pulse number corresponding to the total number of addresses of the ROM 4, for example, 512 in one cycle of the reference pulse PU. The reference pulse ts is stored in the ROM
4 is also output to the ROM 4 as the address signal AD.

The temperature pulse generator 2 generates a pulse whose cycle changes according to the ambient temperature. Specifically, an astable multivibrator (for example, about 47.7 ± 2.3 kHz) which is relatively sensitive to the ambient temperature is set to 13
The frequency is divided by a binary counter of bits, and a pulse TT whose period decreases or increases linearly as the temperature rises is generated.

This temperature pulse TT is applied to the hysteresis circuit 2
1 to the timing pulse generator 3.

The timing pulse generator 3 generates a load signal LO, a latch signal LA, and a reset signal RE at predetermined intervals based on the reference pulse PU of the reference pulse generator 1, and generates the reference pulse PU, ts and temperature. The temperature pulse TT of the pulse generator 2 is combined to generate a clock pulse train CO of a pulse number corresponding to the detected ambient temperature.
Create These LO signal, LA signal, RE signal,
FIG. 2 shows the generation timing of the clock pulse train CO.

The ROM 4 stores temperature compensation data at each address. For example, the number of addresses of the ROM 4 is 512, and a compensation temperature range, for example, −35 ° C.
When the temperature is 85 ° C. and 120 ° C., the compensation data respectively defined about every 0.23 ° C. (one temperature compensation area) is held.

The temperature compensation data held at one address is composed of 1-bit sign (two types of "-" and "+") data VD indicating addition or subtraction by the U / D counter 5, and U / D
1-bit counter clock data that operates as a clock gate of the D counter 5 (two types of "1" and "0")
And SD. As these compensation data, three types of compensation data "-1", "0", and "+1" are created by a combination of the code data VD and the counter clock data SD. These compensation data are supplied to the gate 5 controlled by the timing pulse generator 3.
The clock signal is output to the clock terminal CP and the up / down terminal U / D of the U / D counter 5 in synchronization with the above-mentioned clock pulse train CO via the first and second clock pulses.

The U / D counter 5 has a clock pulse train C
The three types of compensation data and the timing pulse generator 3 output from the ROM 4 during the period from the occurrence of O to the end.
The initial reference compensation value Y loaded by the LO signal is counted (no addition, subtraction, change) to create a compensation amount for the ambient temperature at the time of detection. Then, in accordance with the LA signal of the timing pulse generator 3, the compensation amount (digital amount) is output to the latch / D / A converter 6. For example, if the 7-bit U / D counter 5 is used, the maximum frequency deviation in the compensation temperature range can be corrected in 128 steps.

The latch / D / A converter 6 changes the digital compensation amount of the U / D counter 5 to an analog voltage value.

The voltage controlled crystal oscillator 7 includes a crystal oscillator 7
Although not shown in the figure, an oscillator circuit having a variable capacitance 1 such as a varicap diode is connected to one end of the crystal unit 71.

Next, the operation of the digitally-controlled temperature-compensated crystal oscillator having the above configuration will be described.

In the timing chart of the timing pulse generator 3 of FIG. 2, first, an LO signal is generated in synchronization with the reference pulse PU. As a result, the U / D counter 5 is loaded with the initial reference compensation value Y.

Next, the reference temperature pulse PU and the temperature pulse T
In combination with T, a clock pulse train CO having the number of pulses corresponding to the detected temperature is generated. The compensation data stored in the ROM 4 is output to the U / D counter 5 in accordance with the pulse of the clock pulse train CO. U / D counter 5
Is “−1” sequentially given to the initial reference compensation value Y.
It is counted as either “0” or “+1” compensation data to obtain a compensation amount for compensating the frequency change of the crystal unit 71 corresponding to the detected ambient temperature. Next, after the end of the clock pulse train CO, LA A signal is generated. Thus, the above U / D
The compensation amount counted by the counter 5 is converted into a predetermined voltage value by a latch / D / A converter 6, and this voltage is applied to a varicap diode of a voltage controlled crystal oscillator 7,
The output of the oscillation frequency compensated based on the compensation amount is obtained.

Next, the temperature pulse generator 2 is reset by the RE signal, and the above operation is repeated by the next LO signal.

Next, the compensation data (code data VD and counter clock data SD) held in the ROM 4 will be described.

When 512 bits of address are used as the ROM 4, compensation data in a temperature range of about 0.23 ° C. is held per address, and the U / D is controlled by the LO signal.
The initial reference compensation value Y loaded into the counter 5 is “64”
And

The compensation data at address 0 is output to the U / D counter 5 by the first pulse of the clock pulse train CO, and the compensation data at address 1 is output by the second pulse of the clock pulse train CO. At the N-th pulse, the compensation data at address N-1 is output.

For example, the ambient temperature is the minimum compensation temperature.
At 35 ° C., the clock pulse train CO generates only one pulse, and the U / D counter 5 generates the initial reference compensation value Y of 6
4, the compensation data held at the address 0 is counted. For example, the code data VD “+” at address 0,
If the counter clock data SD is “1”, “65” is calculated as the compensation amount after counting. Similarly, if the clock pulse train CO corresponding to the detected temperature T is the Nth pulse, a compensation amount obtained by adding the result of adding the compensation data from address 0 to address N-1 and the initial reference compensation value Y is created. You.

That is, the address N has an initial reference compensation value Y
Do you want to obtain a compensation amount to be added by one, a compensation amount to be subtracted by one, or a compensation amount as it is with respect to the counting result of the compensation data from address 0 to address N-1? Is stored as one of compensation data “+1”, “−1”, and “0” based on a desired temperature compensation curve. Further, the initial reference compensation value Y is set to a predetermined value.

Next, the above operation will be briefly described with reference to FIGS. FIG. 3 shows a desired temperature compensation curve when the compensation temperature range is divided into 16 parts.

The case where the address of the ROM 4 is 16 and the initial reference compensation value Y is 4 will be described.

In FIG. 4, the reference temperature pulse ts is set so that 16 pulses are generated in one cycle of the reference temperature PU. In addition, addresses 0 to 0 of the ROM 4 include compensation data of +1, 0, +1, 0, 0, -1, -1,
-1, -1... Are held. Therefore, the code data V in the ROM 4 is synchronized with the clock pulse train CO.
D, counter clock data SD is derived.

For example, the LO of the timing pulse generator 3
The initial reference compensation value Y is supplied to the U / D counter 5 by the signal.
"4" is loaded.

Next, at the first pulse of the clock pulse train CO, the compensation data at address 0 + 1 (code data VD
“+”, Counter clock data SD “1”) is U / D
Output to the counter 5, the initial reference compensation values Y “4” and “+”
The compensation amount is added to the compensation data of "1", and the compensation amount of the digital amount "5" is created after all.

By the second pulse of the clock pulse train CO, the compensation data 0 (code data VD
The counter clock data SD “0”, which may be “+” or “−”, is output to the U / D counter 5, and the previous compensation amount “5” is created as it is as the compensation amount.

In the same manner, address 3 is applied by the third pulse.
Is output to the U / D counter 5 and is added to the compensation data of the digital amount "6", and eventually the compensation data of the digital amount "7" is created.

For example, when the clock pulse train CO has eight pulses corresponding to a certain ambient temperature, the address 0
The calculation result of the compensation data at the address 7 and the initial reference compensation value Y are counted, and eventually, compensation data of the digital amount "5" is created.

The temperature compensation value “5” of this digital quantity is LA
According to the signal, the latch / D / A converter 6 converts the voltage into a voltage value corresponding to the digital temperature compensation value “5”.

As described above, in the digital control type temperature-compensated crystal oscillator of the present invention, the compensation data held in the ROM 4 is counted up to the previous address for the unique temperature characteristic of the crystal unit 71. “0”, “−1”, and “+1” are held as compensation data for the amount of change with respect to the compensation amount. As a result, one bit of the code data VD and one bit of the counter clock data SD for one address are 2 in total. Only bits are required, and the data capacity can be greatly reduced.

As a result, the capacity of the ROM 4 can be largely saved, and the size of the IC chip constituting the ROM 4 can be reduced, and the cost can be reduced. That is, for example, temperature compensation can be performed at an extremely narrow temperature interval (one compensation temperature region) of about 0.23 ° C., and a crystal oscillator having excellent frequency characteristics can be achieved.

In the above-described compensation method, the compensation method of sequentially counting the compensation data of all addresses 0 to 511 of the ROM 4 has been described. However, actually, the actual digitally controlled temperature-compensated crystal oscillator is substantially at room temperature (25 ° C.). ) Is often used in the vicinity. Therefore, the number of pulses of the clock pulse train CO corresponding to the ambient temperature is about 256 pulses, which is the central value of the maximum 512 pulses.

Therefore, a compensation temperature range of -35 ° C. to 85 ° C.
Among them, a reference temperature To, for example, 25 ° C. (corresponding to 256 pulses of the clock pulse train CO) is set, and the clock pulse train CO corresponding to the reference temperature To and the ambient temperature is set.
May be derived to either the left or right of the reference temperature To.

In this case, as shown in FIG. 5, the timing pulse generator 3 outputs the LO signal and the clock pulse trains CO and L.
In addition to the A and RE signals, the clock pulse train C
O maximum pulse number (minimum temperature compensation temperature Tmin (−35
C) and the maximum temperature compensation temperature Tmax (pulse train signal appearing between + 85 ° C.) It is necessary to create a signal UD that rises at the 256th pulse (reference temperature To (corresponding to + 25 ° C.)) in 512 pulses. .

[0049] In FIG. 5, and all the signals are controlled based on the falling or rising of the reference pulse PU, LO signal, LO signal at the falling of the reference pulse PU ₈ of 8 pulses counted from a certain reference pulse PU Falls, at which point the U / D counter 5 is loaded with the initial reference compensation value Y.

Further, the UD signal is inverted from L to H by the rise of the _10th reference pulse PU10. A clock pulse train CO of a predetermined number of pulses corresponding to the ambient temperature detected within one cycle of the tenth pulse is generated.
The count processing is performed by the D counter 5.

[0051] Further 13 LA signal is generated by the fall of the pulse of the reference pulse PU _13, and extinguished by the fall of the 14-th pulse of the reference pulse PU _14, by further 15 fall of pulse of the reference pulse PU ₁₅ An LA signal is generated and disappears at the falling edge of the _16th reference pulse PU16.

In this compensation method, a UD signal for setting the reference temperature To (center value) is created, and the counting method for processing the compensation data on the low temperature region side and the high temperature region side with respect to the reference temperature To. different. Therefore, it is necessary to use an EX-OR gate or the like as the gate 52, and the configuration shown in FIG. 6 is obtained.

This UD signal is output to an EX-OR gate 52 connected to the input of the U / D counter 5. The EX-OR gate 52 receives the constantly scanned code data VD, and the counter clock data SD is input to the U / D counter 5 via the EX-OR gate 52.

The compensation temperature range (-35 ° C. to +85)
FIG. 7 shows the relationship between the clock pulse train CO and the ROM 4.

When the ambient temperature is the reference temperature To, the temperature pulse generator 2 is adjusted so that the number of pulses of the clock pulse train CO becomes 0 (ROM address 256). Reference temperature T
256 pulses are generated between o and Tmax. Further, 256 pulses are generated between the minimum compensation temperature Tmin and To.

Assuming that the left side which is higher than the reference temperature To is “−” and the right side which is lower than the reference temperature To is “+”, 1 to 51
The number of pulses of 2 is converted into the number of pulses of -256 to +256. For example, if the ambient temperature is + 55 ° C. (T ₁ ), the clock pulse train CO has a pulse number of −128. If the ambient temperature is −5 ° C. (T ₂ ), the clock pulse train CO has a pulse number of +128. .

Therefore, the clock pulse train CO corresponding to the ambient temperature T is compensated around the reference temperature To. Therefore, when the compensation data is stored in the ROM 4, the maximum temperature compensation temperature is centered around the temperature To. Tmax ~ T
o, at the minimum temperature compensation temperature Tmin to To, the code data V
D "+""-" and counter clock data SD "0"
It is necessary to consider "1".

The ROM 4 has, for example, 512 addresses, and holds compensation data for about 0.23 ° C. per address. For example, at address 0, compensation data at the maximum compensation temperature of 85 ° C. is held.
Address 1 holds the compensation data at 84.77 ° C., and address 511 holds the minimum compensation temperature −35.
Compensation data at ° C. is retained.

In this embodiment, since the compensation is performed by discriminating between the high temperature side and the low temperature side around the reference temperature To, between the reference temperature To and the maximum compensation temperature Tmax, the reference temperature T is set.
Between o and the maximum compensation temperature Tmax, the displacement of the n-th address relative to the total of the initial reference compensation value Y and the count of the compensation data held in the (n + 1) th compensation data to the 255th address, ie, “−” One of "1", "0" and "+1" is held.

Between the reference temperature To and the minimum compensation temperature Tmin, the n-th address contains the initial reference compensation value Y
And the displacement amount with respect to the total of the counts of the compensation data held at the 256th to (n-1) th addresses, that is, "-1"
“0” and “+1” are held.

As described above, even if the compensation data is held, the capacity of the ROM 4 is, for example, 512 addresses (for example, −35 ° C. to +8
To store 7 bits (providing the maximum frequency deviation in 128 steps) in 5 ° C. into 512 compensation temperature regions, 512 × 2 = 1024 bits may be used. On the other hand, a conventional memory size of 512 × 7 = 3584 bits is required, and a memory size of 2/7 is sufficient.

A description will be given under the same conditions based on the case where the compensation curve shown in FIG. 3 is obtained.

In FIG. 8, a maximum of 16 reference pulses ts (address signal AD) and clock pulse train CO are generated in one cycle of the reference pulse PU.

The UD signal is inverted in synchronization with the inversion of the reference pulse PU, that is, a pulse having a period of 16 × ts. By inverting the UD signal, the center value (reference temperature To) of the temperature compensable region is determined.

In the ROM 4, compensation data “+1”, “+1”, “0”, “0”,
"0", "-1", "-1", "-1", "-1",
"-1", "-1", "-1", "+1", "+1",
"+1" and "+1" are held. The left side of the center value is a high temperature region, and address 0 holds compensation data at the maximum compensation temperature Tmax. The right side of the center value is a low temperature region, and the address 15 holds compensation data at the maximum compensation temperature Tmax.

A clock pulse train CO corresponding to the ambient temperature T is generated by a combination of the reference pulse PU and the temperature pulse TT. When the ambient temperature T is higher than the reference temperature To, the ambient temperature is shifted leftward from the center value toward the center toward the center. A clock pulse train CO having a pulse number corresponding to T is generated. When the ambient temperature T is lower than the reference temperature To, a clock pulse train CO having a pulse number corresponding to the ambient temperature T is generated to the right of the center value toward the center. That is, up to 16
The pulse clock pulse train CO is converted into -8 to +8 pulses.

The counter clock data SD constituting the compensation data held in the ROM 4 is ANDed with the clock pulse train CO by the AND gate 51 and is input to the clock terminal CP of the U / D counter 5.

The code data VD is composed of the UD signal and the EX signal.
-The logical operation is performed by the OR gate 52 and the result is input to the U / D terminal of the UD counter 5.

In the timing pulse generator 3, LO
The signal causes the UD counter 5 to be loaded with the initial reference value 4.

FIG. 9A is a timing chart in the case where a low temperature region is at a certain temperature as a result of detecting a certain ambient temperature.

In the figure, a clock pulse train CO is a pulse corresponding to a detected ambient temperature which appears in synchronization with the reference pulse ts based on a combination of the reference pulse PU and the temperature pulse TT.

The clock pulse train CO appears by a predetermined number of pulses on the right side of the figure from the center value set by the inversion of the UD signal. Always ROM by address signal AD
Even if 4 is sequentially scanned with the compensation data of addresses 0 to 15, the compensation data of the address corresponding to the clock pulse train CO is actually supplied to the U / D counter 5.

The CP pulse is a pulse which performs a logical product of the counter clock data SD constituting the compensation data and the clock pulse train CO, and is supplied to the clock terminal CP of the U / D counter 5.

The pulse of U / D × CP is subjected to a logical operation by the EX-OR gate 52 and the code data VD constituting the compensation data, the UD signal (always in the L state because of the low temperature range), / D counter 5 up / down terminal U /
This is a combination of the pulse signal supplied to D and the above-described signal CP, and actually indicates a counting operation by the U / D counter 5.

In the figure, six pulses of the clock pulse train CO corresponding to a certain temperature in the low temperature region are generated. This appears on the right side of the figure from the center value set by the inversion of the UD signal, and appears in synchronization with the ninth to fourteenth pulses of the reference pulse ts. This allows the ROM
As for the compensation data 4, the compensation data at the address 8 to the compensation data at the address 13 are supplied to the U / D counter 5.

That is, in the U / D counter 5, U / D × C
As can be seen from the pulse of P, -1, -1, -1,-
The counting of 1, +1 and +1 is performed.

Actually, in the UD counter 5, the above-mentioned counting is performed on the initial reference compensation value Y of "4".
A digital compensation amount of “2” is obtained. This compensation amount “2” is converted into a voltage of a predetermined value by the latch / D / A converter 6 and supplied to the voltage-controlled crystal oscillator 7.
As a result, an oscillation output of the desired frequency can be obtained in which the fluctuation of the frequency at the ambient temperature is compensated.

Next, as a result of detecting a certain ambient temperature, a timing chart at a certain temperature in a high temperature region is shown in FIG.

The clock pulse train CO is generated such that the last pulse of the predetermined pulse train is synchronized with the center value set by inversion of the UD signal. That is, the falling of the last pulse of the clock pulse train CO and the inversion operation of the U / D signal are synchronized. Therefore, only a predetermined number of clock pulse trains CO appear on the left side of the center value in the figure in synchronization with the reference pulse ts. Always, R
Even if the compensation data of addresses 0 to 15 is sequentially scanned by the OM 4, the clock pulse train CO
The compensation data at the address corresponding to the U / D counter 5
Will be supplied.

In the figure, both CP and U / D × CP pulses are:
This is the same as FIG.

In the figure, seven pulses of the clock pulse train CO corresponding to a certain temperature in the high temperature region are generated. This is because eight pulses from the second pulse of the reference pulse ts are located on the left side of the center value so that the falling edge of the last seventh pulse of the clock pulse train CO coincides with the center value set by inversion of the UD signal. Appear synchronously to each eye.

As a result, the compensation data in the ROM 4 from the compensation data at the address 1 to the compensation data at the address 7 is counted by the U / D counter 5.

That is, in the U / D counter 5, U / D × C
As can be seen from the pulse of P, -1, 0, 0, 0, +
The counting of 1, +1 and +1 is performed.

Actually, in the UD counter 5, the above-mentioned counting is performed for the initial reference compensation value Y of "4".
A digital compensation amount of “6” is obtained. This compensation amount “6” is converted into a voltage of a predetermined value by the latch / D / A converter 6 and supplied to the voltage-controlled crystal oscillator 7.
As a result, an oscillation output of the desired frequency can be obtained in which the fluctuation of the frequency at the ambient temperature is compensated.

As described above, the compensation temperature regions Tmin to Tm
U at the center temperature of ax (reference temperature To)
By generating the / D signal and generating the clock pulse train CO based on the inversion of the U / D signal, for example, the compensation data is sequentially read from the compensation data at the address 0, for example.
The U / D counter 5 does not need to perform the counting process, and the load on the U / D counter 5 is reduced. In particular, most of the quartz oscillators 71 do not require compensation because the temperature change rate of the oscillation frequency is 0 ppm / ° C. at a temperature near the reference temperature To, for example, 25 ° C. (the temperature at which the temperature can be compensated is 35 to 85 ° C.). The fact that there is a temperature and that there are many temperature compensations near this temperature in the actual use of an oscillator are extremely useful in the operation of the circuit configuration.

Actually, as a condition of the crystal unit which can be digitally controlled with high accuracy, first, it is necessary that the crystal unit 71 has high aging characteristics and high reliability. Next, something with high reproducibility is required. If the temperature characteristics fluctuate during operation or thermal hysteresis is
This is because the compensation data fixedly held at No. 4 cannot follow.

According to the temperature characteristic specification of the crystal unit 71 to be used, a compensation temperature range (for example, -35 ° C. to + 85 ° C.)
, The maximum value and the minimum value of the frequency deviation Δf and the temperature gradient θt need to be defined. The maximum frequency deviation Δfmax and the maximum temperature gradient θt are given by Δfmax = (fmax−fmin) / fo × 10 ⁶ (PPM) θt = d (f / fo) / dt × 10 ⁶ (PPM / ° C.) Δfmax ≦ 30 (PPM) θt ≦ ± 1 (PPM / ° C.).

Here, Δfmax is the maximum frequency deviation, f
max is the highest frequency within the compensation temperature range, fmin is the lowest frequency within the compensation temperature range, f is the oscillation frequency, fo is the nominal frequency, and θt is the frequency temperature gradient.

The temperature change of these quartz oscillators is substantially “0”.
The compensation data to be corrected to the address 51 of the ROM 4
2 (approximately 0.23 ° C. per address) holds 2-bit data of code data VD (“+” “−”) and counter clock data SD (“1” “0”), respectively. I have. Further, the maximum frequency deviation Δfmax is divided into 7 bits (128) and is divided into 0.25 PPM (actually ±
The initial reference temperature compensation value is set to 64 (7 bits = half of 128) so that compensation of 0.375 PPM is possible.
The data of one address is the code data VD ("+""-")
Based on the counter clock data SD (“1” and “0”), whether to increment by 1, maintain the data as it is, or subtract 1 from the compensation data up to that point is sequentially counted. By adding or subtracting from the reference temperature compensation value 64, one compensation value of 1 to 128 types is calculated for the detected ambient temperature, and the compensation value is calculated by the D / A converter 6.
After converting to a voltage value, the voltage is applied to a varicap diode of a voltage controlled crystal oscillator to perform temperature compensation.

As described above, according to the present invention, the capacity of the ROM 4 can be significantly reduced (compensation stage is 7 bits (128 stages)) as compared with the conventional digitally controlled temperature-compensated crystal oscillator that performs temperature compensation with the same accuracy. Therefore, the size of the ROM 4 can be reduced, and the entire temperature-compensated crystal oscillator can be reduced in size. Further, since the price of the ROM 4 can be reduced, the manufacturing cost can be greatly reduced.

Further, since the difference from the data of the adjacent address is “1” at the maximum, it is possible to compensate for the accuracy of the frequency change per digital data within about ± 1.5 times.

In the present invention, the code data VD ("+"
"-") And counter clock data SD ("1")
“0”) is stored in the ROM 4, and the combination of the two data is added or subtracted by the U / D counter 5 to compensate for the temperature characteristic of the crystal unit. Various changes can be made to the specific control. For example, the hysteresis circuit 21 connected to the temperature pulse generator 2 can be omitted, and the configurations of the reference pulse generator 1, the temperature pulse generator 2, and the timing pulse generator 3 can be changed as needed. Needless to say, it is also possible to arbitrarily set the reference such as the rise and fall of various signals with respect to the reference pulse PU and ts, and also to load the initial reference compensation value Y by the LO signal during the counting process. Alternatively, it may be performed after completion.

Further, the initial reference compensation value Y is also “4” or “6”.
The present invention is not limited to 4 ", and may be arbitrarily set according to the temperature characteristics of the crystal unit 71. Also, RO
The number of addresses of M4 is not limited to “512” or “16”, and there is no need to hold compensation data in all addresses. Further, the scanning start point and scanning method of the address of the ROM 4 can be arbitrarily set using digital technology.

[0094]

As described above, according to the present invention, a highly accurate digital digital control type temperature-compensated crystal oscillator can be achieved by minimizing the storage capacity of the ROM circuit, which greatly contributes to cost reduction and downsizing of the oscillator. it can.

[Brief description of the drawings]

FIG. 1 is a block circuit diagram of a digitally controlled temperature compensated crystal oscillator according to the present invention.

FIG. 2 is a timing chart illustrating the relationship between a reference pulse PU controlled by a timing pulse generator, and LO signals, LA signals, RE signals, and a clock pulse train CO, which are timing pulses.

FIG. 3 is an explanatory diagram showing a compensation curve for a certain crystal resonator.

FIG. 4 is a diagram showing a relationship between a reference pulse PU, a ROM address, and compensation data.

FIG. 5 is a timing chart illustrating another compensation method of the present invention.

FIG. 6 is a block circuit diagram of a digital control type temperature compensated crystal oscillator for achieving the compensation method of FIG. 5;

FIG. 7 is a diagram for explaining a relationship between a compensation temperature range, a ROM address, and the number of pulses of a clock pulse train CO.

8 shows reference pulses PU and UD in the compensation method shown in FIG.
FIG. 5 is a diagram illustrating a relationship between signals, addresses of a ROM, and compensation data.

9A and 9B are diagrams illustrating a compensation method at a certain ambient temperature, wherein FIG. 9A is a diagram illustrating a compensation method on a low temperature side with respect to a reference temperature, and FIG. It is a figure showing a compensation method.

[Description of Signs] 1 ... Reference pulse generator 2 ... Temperature pulse generator 3 ... Timing pulse generator 4 ... ROM 5 ... U / D counter 5 6 ... Latch D / A converter 7: Voltage controlled crystal oscillator

Claims (1)

(57) [Claims] A temperature pulse generator for generating a pulse whose cycle changes according to an ambient temperature; a reference pulse generator; a memory unit for holding code data and count clock data and outputting both data simultaneously; A timing generator that controls the output of both data in the memory section based on pulse signals of the reference pulse generator and the temperature pulse generator; and adds and subtracts an initial reference temperature compensation value based on both data in the memory section. Digital control comprising: an up / down counter to be performed; a D / A converter for controlling an operation result of the up / down counter to a predetermined voltage value; and a crystal oscillation circuit connected to the D / A converter and controlled by the voltage value. Type temperature compensated crystal oscillator.