JP3200494B2 - SSB receiving circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an SSB receiving circuit which takes measures against no signal in an SSB receiver.

[0002]

2. Description of the Related Art A receiver is provided with an AGC circuit to compensate for transmission loss. The AGC circuit changes the gain (G) according to the fluctuation of the received input signal to obtain an output with a constant amplitude. The AGC control circuit controls the gain of the AGC circuit. FIGS. 2 and 3 show connection diagrams between the AGC circuit and the AGC control circuit. FIG. 2 shows an example in which the input of the AGC control circuit 2 is an SSB reception signal,
FIG. 3 shows an example in which the input of the AGC control circuit 2 is a demodulated signal. AGC control is possible for any of these inputs.

[0003]

One type of received signal is the SSB signal. In the receiver of the SSB signal, the signal is input only when the modulation is applied. Therefore, when there is no signal, the AGC control circuit 2 operates, and the gain of the AGC circuit 1 at that time is maximized. As a result, when the signal form changes from a no signal to a signal (SSB signal), when the signal becomes a signal, the gain must be instantaneously reduced.
The distortion occurs in the demodulated output. On the other hand, this gain
Otherwise, the gain will be maximum in the audio break, and AGC will not be applied at the beginning of the modulation,
The head of the received voice is distorted. Therefore, in the AGC control circuit 2, the charging time constant for generating the gain control signal needs to be as small as possible (several milliseconds or less) and the discharging time constant needs to be as large as possible (several seconds).

FIG. 4 shows a configuration of a conventional AGC control circuit 2. The AGC control circuit 2 includes an amplifier 3, a rectifier circuit 4, a backflow prevention diode 5, and a charge / discharge circuit 6. The charge / discharge circuit is a parallel circuit of a capacitor 7 and a resistor 8. The signal is amplified by the amplifier 3 and converted to DC by the rectifier circuit 4, and the charge / discharge circuit 6 charges and discharges the rectified output.

FIG. 5 shows an example of gain control of the AGC circuit 1 by the AGC control circuit 2. FIG. 5A shows a received signal (which is an input signal), and FIG. 5B shows an output of the AGC control circuit 2 which receives the received signal as an input signal.
(C) is the output of the AGC circuit 1. With this waveform, in the no-signal section (A) where there is no received signal, the discharge resistance 8
, The charge value of the capacitor 7 decreases with time. As a result, the AGC control in the AGC circuit 1 is performed by the reduced voltage.
The fidelity of the demodulated waveform in the AGC circuit 1 is reduced.
Further, the discharge time is determined by a time constant determined by the capacitor 7 and the resistor 8, but it is difficult to accurately determine the discharge time constant because the capacitance of the capacitor 7 greatly changes depending on the temperature. Here, the change in the temperature means a change in the ambient temperature (for example, in a receiver mounted on an airplane, −40 ° C. to + 7 ° C.).
It rapidly changes to 0 ° C. In this temperature range, a normal electrolytic capacitor has a capacitance change of 20% or more and cannot be ignored.) This is a temperature change due to heat radiation in the receiving circuit.

SUMMARY OF THE INVENTION An object of the present invention is to provide an SSB receiving circuit capable of suppressing charging and discharging at the time of no signal in SSB reception.

[0007]

According to the present invention, there is provided an AGC circuit for an SSB receiver, and an AGC control circuit for generating a gain control signal for the AGC circuit. (Or demodulated signal; the same applies hereinafter)
An amplifier that amplifies the rectifier circuit, a rectifier circuit that rectifies the amplifier output, a charge / discharge circuit that takes in the rectifier circuit output, and charges and discharges the
A comparator that compares the magnitude of the rectifier circuit output with the reference signal for no-signal determination, and is reset when the rectifier circuit output is greater than the reference voltage. A counter for generating a carry output when the clock count value corresponds to the no-signal reference period; and charging and discharging the charge / discharge circuit when the counter does not output a carry output. And control means for controlling the charge / discharge circuit so as to cause the AGC circuit to perform forced discharge, and means for outputting the charge / discharge circuit output to the AGC circuit as a gain control signal.

Further, according to the present invention, the charging / discharging circuit comprises a capacitor and a resistor and a switch provided in series between the resistor and the ground, and the control means performs charging by turning off the switch. In addition, the switch is controlled so that the discharge is forcibly performed by setting 0N (claim 2).

[0009]

According to the present invention, forcible discharge is performed only when the charge / discharge circuit is in the absence of a signal and this non-signal section continues for a certain reference value or more. As a result, when the no-signal section is below a certain reference value, charging and discharging are performed according to the time constant of the charging and discharging circuit, and when the non-signal section is above the reference value, rapid discharging is performed.

[0010]

FIG. 1 is an embodiment diagram of an AGC control circuit 2 according to the present invention. The AGC control circuit 2 includes an amplifier 3, a rectifier circuit 4,
It comprises a backflow prevention diode 5, a charge / discharge circuit 6, a reference voltage setter 15, a comparator 16, and a counter 17. Circuits 2-6
Is the same as FIG. The new configuration and its functions are as follows.

[0011] is used to set the threshold value V ₁ which is a reference voltage setter 15 ...... no signal or the signal present of criteria.

Comparator 16... Compares the magnitude of the rectified output with the reference value V ₁ of the setting unit 16 and generates “0” when the rectified output is large and “1” when the rectified output is small.

[0013] The output of the counter 17 ...... comparator 17 is reset to "0", "1" counts the clock signal by continuing interval of "1" the count value reaches a no-signal reference time T ₀ At times, a carry output "1" is generated. Here, the no-signal reference time T ₀ is equivalent to a no-signal (meaning of no-modulation) section in the SSB, and a section shorter than this section means that there is no non-modulation. This is defined as a non-signal section due to no modulation.

The charging / discharging circuit 6 is different from that of FIG. 4 in that a switch 18 is provided.
9 designates a capacitor and a resistor. Switch 18
Is 0N at the carry output "1" of the counter 17, and
This switch is turned OFF when no carry output is generated.

Next, the operation will be described. FIG. 6 shows a time chart. In FIG. 6, a signal a is an input signal, a signal b is a rectified output, a signal c is a comparator output, a signal d is a counter output, a signal e is an output of the charge / discharge circuit 6, and a signal f is controlled by the signal e. This is an output signal output from the AGC circuit 1.

The received signal a is amplified by the amplifier 3 and converted to a direct current by the rectifier circuit 4 to become a signal b. This signal b is sent to the charge / discharge circuit 6 via the backflow prevention diode 5, and the capacitor 14 is charged.

Meanwhile, rectified output b is sent to the comparator 16 is compared with a reference voltage V _1. The comparator 16 outputs the output b
> In V ₁ "0", to generate a "1" at the output b ≦ V _1. Thus, the comparator output c becomes as shown in FIG. Counter 1
7 continuously counts clock inputs only when the comparator output c is "1". Assuming that the section between the signals c ₁ and c ₂ in the signal c is shorter than T ₁ , no carry output occurs in this section. If the interval of the signal c ₃ is a T ₀ corresponding value Carry "1" at T ₀ the time of this signal c ₃ is generated as a signal d.

On the other hand, in a section where no carry output is generated with respect to the output of the counter 17, the switch 1
8 remains OFF. When the switch 18 is turned off, the charging / discharging circuit 6 has no discharging path, and therefore becomes a charging circuit including only the capacitor 14. On the other hand, when the carry output becomes "1", the switch 18 becomes 0N, and the charge / discharge circuit 6 becomes a parallel circuit of the capacitor 14 and the resistor 19. At this time, if the capacitor 14 has a charged value, the charged value of the capacitor 14 is rapidly discharged through the resistor 19 at the same time as the insertion of the resistor 19.

As is clear from the comparison between FIG. 5 and FIG.
In FIG. 5, the output of the charge / discharge circuit decreases due to the discharge in the sections A and B as shown in (b), but in FIG. 6, there is no decrease due to the discharge as shown by the signal e and at the end of the section T _0. , A rapid discharge is performed. Thus, as shown in FIG. 6, the output f of the AGC circuit 1 becomes a faithful demodulated signal.

Further, in this embodiment, the value of the capacitor 14 is set smaller than the value of the capacitor 7. Also, the value of the resistor 19 is set smaller than the value of the resistor 8. The reason for adopting the former is that there is no meaningless discharge in the no-signal section, there is no need to consider the time constant, and the value of the capacitor 14 can be reduced. The latter employed reason, discharge is at the end T ₀ period, since it is sufficient to rapidly discharge only when this is due to a be a small resistance value.

According to this embodiment, it is possible to generate a received AGC signal having excellent fidelity of a demodulated waveform. Further, since the time until the discharge is not affected by the temperature change, there is a great advantage in a receiver used in a place where the temperature change is large such as on an airplane. Also, since the discharge does not depend on the capacity of the capacitor,
There is an advantage that the capacity of the capacitor can be reduced. This not only contributes to downsizing of the device, but also shortens the charging time, so that the rising characteristics of the AGC can be made faster. This is a great advantage in data communication where the reception level changes rapidly.

The configuration of the AGC circuit 1 in the present embodiment is as follows.
Anything is acceptable. In addition, the output of the AGC circuit 1 is used as a demodulated signal, on the premise that the AGC circuit has a detection circuit after output. A without detection circuit
The output of the GC circuit itself can be used as an input of the AGC control circuit.

[0023]

According to the present invention, the charging / discharging circuit is discharged only when the voltage is equal to or lower than the no-signal reference voltage and is equal to or longer than the no-signal section. Therefore, a receiving circuit suitable for SSB reception can be provided.

[Brief description of the drawings]

FIG. 1 is an embodiment diagram of the present invention.

FIG. 2 is a diagram illustrating a conventional SSB receiving circuit.

FIG. 3 is a diagram illustrating a conventional SSB receiving circuit.

FIG. 4 is a diagram showing a conventional AGC control circuit.

FIG. 5 is a conventional time chart.

FIG. 6 is a time chart of the present invention.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 AGC circuit 2 AGC control circuit 3 Amplifier 4 Rectifier circuit 5 Backflow prevention diode 6 Charge / discharge circuit 14 Capacitor 15 No-signal reference voltage setting device 16 Comparator 17 Counter 18 Switch 19 Resistance

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04B 1/10 H04B 1/16 H03C 1/60

Claims (2)

(57) [Claims] An AGC circuit for an SSB receiver;
An AGC control circuit for generating a gain control signal for the C circuit; the AGC control circuit amplifies an SSB reception signal (or demodulated signal; the same applies hereinafter); a rectifier circuit for rectifying the amplifier output; A charge / discharge circuit that takes in the rectifier circuit output and charges / discharges; a comparator that compares the magnitude of the rectifier circuit output with the no-signal determination reference voltage;
A counter which is reset when the output of the rectifier circuit is larger than the reference voltage, and inputs and counts an external clock signal when the output is smaller than the reference voltage, and generates a carry output when a continuous clock count value of the clock signal is equivalent to a non-signal reference period; In the state where the counter does not output a carry output, the charge / discharge circuit is charged, and when the carry output is generated, the charge / discharge circuit is forcibly discharged.
An SSB receiving circuit comprising: control means for controlling a charge / discharge circuit; and means for outputting the charge / discharge circuit output to the AGC circuit as a gain control signal. 2. The charge / discharge circuit comprises a capacitor and a resistor and a switch provided in series between the resistor and the ground, and the control means turns off the switch to charge the battery and set it to 0N. 2. The switch according to claim 1, wherein the switch is controlled so that forced discharge is performed.
SB receiving circuit.