JP3201476B2 - Television deflection device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD OF THE INVENTION

The present invention relates to a control circuit of a deflection circuit in which the amplitude of a deflection current changes according to a control voltage.

[0002]

[Prior art]

For example, in a typical television receiver,
A B ⁺ voltage is applied to the primary winding of the horizontal flyback transformer to energize the horizontal deflection circuit and generate a deflection current in the horizontal deflection winding. The high voltage supplied to the anode of the cathode ray tube, that is, the ultor voltage is supplied from the high voltage retrace pulse voltage generated in the tertiary winding of the flyback transformer.

[0003] An AC (alternating current) mains voltage supplies the input power to a power regulator which produces a regulated rated B ⁺ voltage. If the adjustment operation is normal, the change in the main power supply voltage
It has only a negligible effect on the B ⁺ voltage. However, if the value of the mains voltage is lower than the lower limit of the rated range, the regulator may stabilize the B ⁺ voltage to the same value as if the mains voltage were within its normal range. May not be possible. Supplied to horizontal deflection circuit
When the B ⁺ voltage decreases, the amplitude of the horizontal deflection current is not small.
Also, such a decrease in the B ⁺ voltage will decrease the ultor voltage, ie, the final anode voltage. The reduction in deflection current attempts to reduce the raster width, while the reduction in ultor voltage increases the raster width, so that the raster width is virtually unaffected.

[0004]

[Problems to be solved by the invention]

Vertical deflection circuits are typically less sensitive to power supply voltage variations than in horizontal deflection circuits. Thus, a drop in the B ⁺ voltage does not affect the vertical deflection current as badly as the horizontal deflection current. However, when the ultor voltage decreases, the height of the raster increases even if the value of the vertical deflection current is the same.
When the raster height is increased in this manner, the amount of overscan increases, and the display image extends in the vertical direction and is distorted.

In order to prevent undesired changes in the horizontal to vertical dimensional ratio of an image displayed on a cathode ray tube (CRT), for example, B ⁺
If the voltage drops, it is desirable to reduce the vertical deflection current in the vertical deflection winding. In this way, the dimensional ratio of the image displayed on the CRT is maintained the same as before the reduction even when the B ⁺ voltage decreases.

[0006]

[Means for Solving the Problems]

In a deflection circuit embodying one feature of the present invention, a control voltage generated from a trace voltage generated in a secondary winding of a flyback transformer during a horizontal trace period is applied to a control terminal of a vertical deflection circuit. This control voltage controls the amplitude of the vertical deflection current. For example, as the B ⁺ voltage decreases, the control voltage is correspondingly reduced, followed by a decrease in the amplitude of the vertical deflection current in proportion to the decrease in the amplitude of the horizontal deflection current. This reduction in control voltage serves to reduce the proportional raster distortion described above.

In a deflection circuit having a mirror feedback configuration embodying one feature of the present invention, when the control voltage decreases by a certain amount, the vertical deflection current decreases proportionally more. It is desirable to provide better compensation so as to prevent the aforementioned dimensional raster distortion of the displayed image that occurs when the B ⁺ voltage drops. To do so, it is desirable to reduce the control voltage proportionally less than the B ⁺ voltage. In this way, a better vertical deflection compensation is obtained than if the proportional reductions are the same, for example.

A configuration of a main part of the television deflection apparatus according to the present invention will be described with reference numerals and reference symbols used in the illustrated embodiment described later for each component. A television deflection apparatus according to a first aspect of the present invention is a television deflecting device that is coupled to a voltage source (V _AC ) of a supply voltage (B ⁺ ) and is coupled to the voltage source of the supply voltage so that the supply voltage changes. A horizontal deflection circuit (100 including W1 and Q1) for generating a horizontal deflection current of varying amplitude in a horizontal deflection winding (L _H ); and representing the amplitude of the horizontal deflection current and the change in the horizontal deflection current. Means (W2) for generating a first control voltage (V) that changes when the voltage is generated, and vertical deflection in response to a second control voltage (10) that changes with the change of the first control voltage. In the winding (L _V ), a vertical deflection current having an amplitude determined according to the amplitude of the second control voltage is generated. At this time, a change in the second control voltage causes the vertical deflection current to be applied to the vertical deflection current. 1 which causes a change different from the change of the control voltage of the vertical deflection circuit (101). ) And the proportional change in the second control voltage is different from the proportional change in the first control voltage in order to prevent a change in the horizontal to vertical dimension ratio when the change occurs in the horizontal deflection current. Differently, the second control voltage is generated in response to the first control voltage, wherein the proportional change of the first control voltage and the proportional change of the second control voltage are performed. A second control voltage generating means (102) for compensating for a difference in response to a change in the supply voltage between the vertical deflection and the horizontal deflection.
And

The television deflection device according to the second invention of the present application is a voltage source (V _AC ) of a supply voltage (B ⁺ ) and is coupled to the voltage source of the supply voltage, and the supply voltage changes. A horizontal deflection circuit (100 including W1, Q1) for generating a horizontal deflection current whose amplitude changes in the horizontal deflection winding (L _H ) when the horizontal deflection current represents the amplitude of the horizontal deflection current. Means (W2) for generating a first control voltage (V) that changes when the change occurs, and substantially responding to the first control voltage even if the horizontal deflection current changes. Means (102) for generating a second control voltage (10) having a first portion that is kept constant and a second portion that changes with a change in the horizontal deflection current when the supply voltage changes.
In response to the second control voltage, generates a deflection current having an amplitude determined according to the second control voltage in the vertical deflection winding (L _V ).
The vertical deflection circuit (10) makes the vertical deflection follow the change in the horizontal deflection during the period when the supply voltage changes.
1).

[0010]

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, a detailed description will be given with reference to the accompanying drawings. FIG.
Shows a horizontal deflection circuit 100 that generates an output supply voltage V for a vertical deflection circuit. This output supply voltage V is the first
Is supplied to a vertical deflection circuit 101 via a circuit 102 for generating a second control voltage embodying one feature of the present invention.

[0011] In the horizontal deflection circuit 100, AC mains voltage V _AC is supplied to a bridge rectifier BR. Rectifier BR generates an unregulated power supply voltage V _UR and couples it to regulator 12. The regulator 12 generates a regulated B ⁺ voltage at its output terminal 11. The horizontal deflection circuit 100 has a flyback transformer T having a primary winding W1, which is connected to the output terminal of the regulator 12 and to a horizontal transistor switch Q1 operating at the horizontal deflection frequency.
Is coupled between the collector. The collector of the transistor Q1, a horizontal deflection winding L _H in the usual manner, is also coupled to a retrace capacitor C _R and a damper diode D1.

A baseband television signal 150 obtained from a video detector (not shown) is provided to a stage 13 that includes a sync separator, which in turn outputs a signal H _S containing the horizontal sync information of signal 150. Generate Signal H _S is applied to the horizontal oscillator and driver stage 14. The stage 14 is synchronized with the signal H _S, it generates a horizontal frequency control signal 15 for controlling the switching operation of transistor Q1.

[0013] The switching operation of transistor Q1 produces an ultor voltage U from the corresponding horizontal retrace voltage occurring on tertiary winding W3 of flyback transformer T. Further, for example, the supply voltage V for the vertical deflection circuit of +25 V is applied to the secondary winding.
Generated by the corresponding horizontal trace voltage occurring at W2. The supply voltage V, the ultor voltage U and the deflection current i _y in the horizontal deflection winding L _H are directly proportional to the B ⁺ voltage.

[0014] ⁺ voltage V _AC magnitude is regulated voltage as long as it is within a predetermined normal range B is substantially unchanged. Outside this normal range, especially the voltage V _AC is lower than the lower limit of the normal range required by regulator 12, B ⁺ voltage, hence the supply voltage V, and the horizontal deflection current i _y, the voltage V _AC Will be a corresponding level that is smaller than if it is within this normal range. Just as proportionally changed with respect to each of voltage V and U and the current i _y change in the voltage V _AC.

In the vertical deflection circuit 101 operating as a mirror feedback type,
A supply voltage V is applied to a supply voltage receiving terminal 18a of an integrated circuit (IC) IC1, such as an IC LA7831 manufactured by Sanyo Electric. Integrated circuit IC1 is a vertical amplifier 18 with a push-pull driver stage.
Contains. Amplifier 18 is responsive to an input signal 19 generated at inverting input terminal 16 by a negative feedback loop. Output terminal 17 of the vertical amplifier 18 is coupled to one terminal of a vertical deflection winding L _V for circulating vertical deflection current i _v. The other terminal 20 of the winding L _{V passes} through a direct current (DC) blocking capacitor C _V
One end is coupled to a deflection current sampling resistor R _S whose one end is coupled to a common potential point (referred to here as a ground point). During each vertical trace period, a voltage 22 develops across resistor R _S , ie, at terminal 21. This voltage is the downward ramp voltage that changes in a sawtooth shape that represents the waveform of the vertical deflection current i _v.

The resistors R 10 and R 11 that provide DC feedback to the vertical deflection circuit 101 are connected in series between the terminal 20 and the terminal 23 of the Miller integrating capacitor C 10. Capacitor C11 for S-shaped correction is resistor R10
And R11 are coupled between the interconnection point and the ground point. A resistor R is connected between the second terminal 24 of the capacitor C10 and the terminal 21 of the resistor _RS.
12 and the capacitor C12 are connected in series, and perform a linearity correction function. A resistor R13 is coupled between the interconnection terminal of the resistor R12 and the capacitor C12 and the ground point. A diode D3 forming a rapid discharge path in the capacitor C10 during the vertical retrace period is connected between the terminal 24 and the ground point.
A resistor R14 is coupled between the terminal 24 and the movable terminal of the resistor R15 to form a vertical dimension controller.
Cooperates with R16 to form a series body coupled across resistor _RS .

A pulse generator provided in stage 13 generates a vertical frequency signal V _RES in response to a corresponding vertical synchronization pulse of television signal 150. The transistor switch Q2 operates at the vertical frequency according to the vertical frequency signal _VRES . The collector electrode of transistor Q2 is coupled via resistor R17 to terminal 23 of capacitor C10, and the emitter electrode is grounded. Resistor R17 determines the discharge rate of capacitor C10 during vertical retrace when transistor switch Q2 is conducting. The terminal of resistor R17 remote from terminal 23 of capacitor C10 is coupled to non-inverting input terminal 25a of preamplifier 26. Preamplifier 26 has an output terminal coupled to input terminal 16 of vertical amplifier 18 through a 180 ohm resistor to complete the negative feedback loop.

The supply voltage V for the vertical deflection circuit generated in the horizontal deflection circuit 100 is supplied to the control terminal 1 of the control voltage generation circuit 102 for generating the second control voltage 10 at the output terminal 102b as the first control voltage V.
02a is also applied. The second control voltage 10 includes resistors R30 and R3
Is supplied to the inverting input terminal 25 of the preamplifier 26 through a resistive divider consisting of 1, it generates a control voltage V ₂₅ for controlling the amplitude of vertical deflection current i _v. The second control voltage 10 is supplied to a supply voltage receiving terminal of the preamplifier 26 for activation. The preamplifier 26, the resistors R30 and R31, and the transistor Q2 are contained in a Toshiba IC TA7777P.

When transistor switch Q2 conducts and a vertical retrace is initiated, capacitor C10 is connected to transistor switch Q2, resistor R17 and forward biased diode D3.
Is discharged through. The forward voltage of diode D3 prevents capacitor C10 from completely discharging during the vertical retrace, and capacitor C1 at the end of vertical retrace.
The voltage V _C10 during 0 has an initial non-zero value. At this time, the transistor Q2 becomes non-conductive according to the signal V _RES ,
Start a vertical trace. During the vertical trace, the capacitor C10 is charged via the resistor R11.

For convenience of explanation, it is assumed that the voltage V _{C11 of the} capacitor C ₁₁ is the same (unchanged) during the entire vertical deflection. Such an assumption ignores a change in the voltage _VC11 for performing the S-shaped correction, but such a change is relatively small. The predetermined vertical trace interval in the capacitor C10 occurs current i _C10 voltage V _C11 is applied to charge the capacitor C10. The negative feedback circuit, the voltage V ₂₃ is coupled to the non-inverting input terminal 25a of the voltage V ₂₃ That preamplifier 26 at the terminals 23 of the capacitor C10, the voltage V ₂₅ substantially caused to the inverting input terminal 25 of the preamplifier 26 Are kept equal. Voltage V ₂₃ and V
₂₅ are equal because the offset voltage of the preamplifier 26 is low. Since the voltage V ₂₅ and V _C11 is a constant for a given vertical trace, the voltage V _C10 across the capacitor C10 increases linearly to approximately upward ramp form. In order to keep the voltages at both input terminals of the preamplifier 26 virtually the same, the feedback circuit applies a vertical ramping portion of the vertical sawtooth voltage V _{V to} the vertical amplifier 18.
Generate 28. The voltage V _V is the deflection current i _v flowing in the winding L _V
Generate The vertical deflection current i _v generates a corresponding voltage 22 in the form of a downward ramp on the resistor _RS . The sum of the downward ramp voltage 22 applied to the lower end of the capacitor C10 and the upward ramp voltage V _C10 of the capacitor C10 is kept constant by the negative feedback loop as described above. Therefore, the current i _{v is} also the voltage V _C10
Changes linearly according to the rate of change of The rate of change of the voltage V _C10 is determined by the level of current i _c10, current i _c10 is determined by the voltage at the terminal 24 of the capacitor C10.

The capacitor C10 after the transistor Q2 is turned off
The initial non-zero value of the voltage V _C10 of the diode D3
Is determined by the forward voltage drop. Initial non-zero value of the voltage V _C10 is the current i _c10 initial value of the voltage V _C10 and smaller than the value that is to have been zero.

Due to the smaller value of voltage V ₂₅ at terminal 25 of preamplifier 26 resulting from the decrease in the B ⁺ voltage as a result of the negative feedback, at certain moments in the vertical trace, such as immediately after transistor Q 2 is turned off. voltage at the terminal 24 of the capacitor C10 becomes a value smaller than the decrease earlier above such voltage V ₂₅ at. However, the magnitude of this decrease in the voltage at terminal 24 is proportionally greater than the decrease in the voltage V _25. Proportional reduction of the voltage of the terminal 25, because the voltage is small positive than the voltage V ₂₅ at the terminal 24 as a result of the level shifting caused by the initial non-zero value of the voltage V _C10, larger. Accordingly, the current i _c10 and deflection current i _v is decreased by a rate greater than the voltage V _25. So, the voltage V ₂₅ is the reduced, so that the amplitude of vertical deflection current i _v is decreased proportionally more significant as a result of the reduction in example B ⁺ voltage.

Since the supply voltage V for the vertical deflection circuit decreases in the same proportion as the decrease of the horizontal deflection current i _y induced by the B ⁺ voltage, the supply voltage V is reduced at a smaller rate than this proportional decrease in the supply voltage V. It is desirable to reduce the second control voltage 10. In this manner, reduction of the vertical deflection current i _v is the same ratio as the reduction of the horizontal deflection current i _y, the ratio of width to height of the image on a raster is maintained constant.

In order to obtain the above-mentioned constant ratio, the supply voltage V for the vertical deflection circuit is supplied as a first control voltage to a series circuit of the resistors R18 and R19 and the Zener diode D4. The interconnection point of resistors R18 and R19, acting as a voltage divider for the supply voltage V, is coupled to the base electrode of transistor Q3. Transistor Q3 performs an emitter follower operation. Base voltage V
_According to _{bQ3, a} second control voltage 10 is generated at the emitter of transistor Q3. Base voltage _VbQ3 is approximately equal to the sum of the voltage across Zener diode D4 and the voltage across resistor R19. Thus, the second control voltage 10 has a first portion that maintains a constant value and a second portion that changes when the supply voltage V that is the first control voltage changes. Therefore, the supply voltage V functions as the first control voltage of the control voltage generation circuit 102.

Assuming that the main power supply voltage _VAC has dropped to a value lower than the lower limit required for proper operation of the regulator 12, a state at that time will be considered. As a result of this reduction, the value of the B ⁺ voltage will be lower than the adjusted value obtained during normal operation. Therefore, each value of the horizontal deflection current i _y and supply voltage V for the vertical deflection circuit is referred to as the first rate subsequent to changes in the mains voltage V _AC, decreases respectively at approximately the same rate that corresponds. The decrease in the horizontal deflection current i _y reduces the ultor voltage, so that during the corresponding portion of each scan line where an image is displayed, the horizontal electron beam sweep length (horizontal) of the CRT (not shown). Width) does not substantially change.

However, the vertical electron beam sweep length (vertical height) at which an image is displayed during a corresponding portion of the vertical trace tends to increase with decreasing ultor voltage,
Distortion is generated in proportion to this. Main power supply voltage as above
For V _AC to prevent above such distortion of the ratio of the horizontal length to the vertical length of the image displayed on the CRT when low, the vertical deflection current i _v
Is proportionally reduced at the same ratio as the first ratio described above. In this way, the ratio of the horizontal length to the vertical length of the displayed image remains the same even if the B ⁺ voltage decreases.

According to one feature of the present invention, the control voltage generation circuit 102 includes a second control voltage generation circuit 102 that decreases proportionally at a rate smaller than the first rate.
To generate the control voltage 10. In this way, the aforementioned effect on the image ratio by the diode D3 is compensated.

The ratio between the values of the resistors R18 and R19 and the Zener diode
The value of the voltage across D4 gives two circuit parameters 9 which, for example, make the ratio of the required horizontal length to the vertical length of the displayed image invariant with respect to the two corresponding levels of the supply voltage V Is chosen empirically to maintain One level of the supply voltage V is chosen to be i.e. normal operation values of the rated, second level is selected to a value corresponding to a predetermined low amplitude of the voltage V _AC. Voltage V
Is also halfway between the two voltages V described above. This compensation provided by the control voltage generation circuit 102 has the advantage that it is better than if the second control voltage 10 is changed proportionally as well as the B ⁺ voltage.

[Brief description of the drawings]

FIG. 1 is a diagram showing a vertical and horizontal deflection circuit and a control voltage generation circuit according to an embodiment of the present invention.

[Explanation of symbols]

10 Second control voltage 100 Horizontal deflection circuit 101 Vertical deflection circuit 102 Second control voltage generation means B ⁺ Supply voltage V _AC Voltage source V of supply voltage B ⁺ V First control voltage W2 First control voltage generation means L _H Horizontal deflection winding L _V Vertical deflection winding i _y Vertical deflection current i _v Vertical deflection current

Continuation of the front page (72) Inventor James Albert Wilbur Indianapolis, Indiana, United States of America North Arlington Avenille 931 (56) References JP-A-64-78074 (JP, A) U)

Claims (2)

(57) [Claims] 1. A voltage source for a supply voltage, and a horizontal deflection current coupled to the voltage source for the supply voltage for generating a horizontal deflection current in the horizontal deflection winding that changes in amplitude when the supply voltage changes. A deflection circuit; means for generating a first control voltage representing the amplitude of the horizontal deflection current and changing when the change occurs in the horizontal deflection current; and changing with the change in the first control voltage. In response to the second control voltage, a vertical deflection current having an amplitude determined according to the amplitude of the second control voltage is generated in the vertical deflection winding. Causing a change in the vertical deflection current that is different from the change in the first control voltage, and for preventing a change in the horizontal-to-vertical dimension ratio when the change occurs in the horizontal deflection current. , The second control The second control voltage is generated in response to the first control voltage so that the proportional change in the voltage is different from the proportional change in the first control voltage. The difference between the proportional change in the control voltage and the proportional change in the second control voltage compensates for the difference in response to the change in the supply voltage between the vertical deflection and the horizontal deflection. And a control voltage generating means. 2. A voltage source for a supply voltage, and a horizontal deflection current coupled to the voltage source for the supply voltage for generating a horizontal deflection current in the horizontal deflection winding that changes in amplitude when the supply voltage changes. A deflecting circuit, a means for representing an amplitude of the horizontal deflection current and generating a first control voltage that changes when the change occurs in the horizontal deflection current, and responsive to the first control voltage, A second portion having a first portion that is kept substantially constant even when a change occurs in the horizontal deflection current, and a second portion that changes in accordance with the change in the horizontal deflection current when the supply voltage changes. Means for generating a control voltage; responsive to the second control voltage, generating a deflection current having an amplitude determined in accordance with the second control voltage in a vertical deflection winding; The second part provides vertical deflection as described above. A vertical deflection circuit adapted to follow a change in horizontal deflection during a period in which the supply voltage changes.